* ========== Copyright Header Begin ==========================================
* OpenSPARC T2 Processor File: interrupt_INT_MAN_thread_all.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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* ========== Copyright Header End ============================================
#define MAIN_PAGE_HV_ALSO
#define SYNC_THREADS 0xff
#define DIAG_NUM_THREADS 8
#define H_HT0_Interrupt_0x60
#define My_HT0_Interrupt_0x60 \
/************************************************************************
************************************************************************/
! Determine thread running on
be main_t0 ! Branch if thread 0
ba main_t1_to_t63 ! Branch if not thread 0
/************************************************************************
************************************************************************/
/* Initialize the NCU for the interrupt. */
xor %g7, 0x2, %g7 ! Reset interrupt enable
! Initially set all the Interrupt Management Registers
! Later will set all those not used to have a different vector number
setx INT_MAN, %g1, %g2 ! %g2 = INT_MAN reg. addr.
setx INT_MAN_COUNT, %g1, %g4 ! %g4 = INT_MAN reg. count value
add %g2, INT_MAN_STEP, %g2
! Initialize the NIU for TX DMA interrupt.
NIU_TX_LD_IM0_INTR_ON_MARK( 0, %g1, %g2, %g3, %g4, 0, 0 )
or %g7, 0x2, %g7 ! Set interrupt enable
! Wait for other threads to be ready
SYNC_THREAD_MAIN( local_test_failed, %g1, %g2, %g3 )
! Generate the interrupt via PIO write
setx TDMC_INTR_DBG, %g1, %g2
mov %g0, %g7 ! DMA channel 0
stxa %g4, [%g2]ASI_PRIMARY_LITTLE
! Wait for an interrupt to occur
setx old_intr_count, %g1, %g3
setx user_data_start, %g1, %g5
st %g7, [%g3] ! update old_intr_count
! Branch back to do next interrupt.
setx user_data_start, %g1, %g3
cmp %g2, DIAG_NUM_THREADS
/************************************************************************
************************************************************************/
! Sync up with other threads
SYNC_THREAD_OTHER( %o1, %g1, %g2 )
! Wait for interrupt to this thread
setx user_data_start, %g1, %g7
add %o1, 1, %o1 ! Thread id is incremented on interrupt
! Read related interrupt registers to aid debugging
ldxa [%g0]ASI_INTR_RECEIVE, %i0
ldxa [%g0]ASI_SWVR_INTR_R, %i1
set 32, %g3 ! index for logical device number
setx LDG_NUM_STEP, %g1, %g4
ldxa [%g2]ASI_PRIMARY_LITTLE, %i3
ldxa [%g2]ASI_PRIMARY_LITTLE, %i4
ldxa [%g2]ASI_PRIMARY_LITTLE, %i5
ldxa [%g2]ASI_PRIMARY_LITTLE, %i6
set 32, %g3 ! index for logical device number
setx LD_IM0_STEP, %g1, %g4
ldxa [%g2]ASI_PRIMARY_LITTLE, %i7
ldxa [%g2]ASI_PRIMARY_LITTLE, %o1
ldxa [%g2]ASI_PRIMARY_LITTLE, %o2
ldxa [%g2]ASI_PRIMARY_LITTLE, %o3
setx TX_ENT_MSK, %g1, %g2
ldxa [%g2]ASI_PRIMARY_LITTLE, %o4
ldxa [%g2]ASI_PRIMARY_LITTLE, %o5
setx TDMC_INTR_DBG, %g1, %g2
ldxa [%g2]ASI_PRIMARY_LITTLE, %o6
/**********************************************************************
**********************************************************************/
ta T_RD_THID ! %o1 = thread id
! Check that interrupt went to correct thread.
setx user_data_start, %l2, %l6
! Change the thread id to use in the NCU for next interrupt
sllx %l5, 8, %l5 ! put thread id in proper position
setx INT_MAN, %l1, %l2 ! %g2 = INT_MAN reg. addr.
! The following order is important, if reversed a second
! interrupt occurs on same condition.
! Re-enable the interrupt in the NIU
setx TX_CS, %g1, %g2 ! TX_CS, Tx DMA channel 0
ldxa [%g2]ASI_PRIMARY_LITTLE, %g1 ! Reset MK
! Re-enable the interrupt in the NIU
setx LDGIMGN, %g1, %g2 ! logical device group 0
setx 0x80000001, %g1, %g3
stxa %g3, [%g2]ASI_PRIMARY_LITTLE
! Clear the interrupt in the core.
ldxa [%g0]ASI_SWVR_INTR_R, %l3
! Increment the interrupt count.
setx user_data_start, %l2, %l6
/************************************************************************
************************************************************************/
/* These initialization is temporary, as there looks some bug in mempli */
SECTION SetRngConfig_init data_va=0x100000000
Name = SetRngConfig_init,
.xword 0x0060452301000484
/************************************************************************/
SECTION SetTxRingKick_init data_va=0x100000100
Name = SetTxRingKick_init,
.xword 0x0060452301000484
/************************************************************************/
SECTION SetTxLPMask1_init data_va=0x100000200
Name = SetTxLPMask1_init,
.xword 0x0060452301000484
/************************************************************************/
SECTION SetTxLPValue1_init data_va=0x100000300
Name = SetTxLPValue1_init,
.xword 0x0060452301000484
/************************************************************************/
SECTION SetTxLPRELOC1_init data_va=0x100000400
Name = SetTxLPRELOC1_init,
.xword 0x0060452301000484
/************************************************************************/
SECTION SetTxLPMask2_init data_va=0x100000500
Name = SetTxLPMask2_init,
.xword 0x0060452301000484
/************************************************************************/
SECTION SetTxLPValue2_init data_va=0x100000600
Name = SetTxLPValue2_init,
.xword 0x0060452301000484
/************************************************************************/
SECTION SetTxLPRELOC2_init data_va=0x100000700
Name = SetTxLPRELOC2_init,
.xword 0x0060452301000484
/************************************************************************/
SECTION SetTxLPValid_init data_va=0x100000800
Name = SetTxLPValid_init,
.xword 0x0060452301000484
/************************************************************************/