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* OpenSPARC T2 Processor File: err_handlers.s
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#ifndef __HTRAPS_HAS_ERR_HANDLERS__
.global INST_ACCESS_MMU_ERROR_HANDLER
.global INST_ACCESS_ERROR_HANDLER
.global INT_PROC_ERR_HANDLER
.global DATA_ACCESS_MMU_ERROR_HANDLER
.global DATA_ACCESS_ERROR_HANDLER
.global HW_CORRECTED_ERROR_HANDLER
.global SW_RECOVERABLE_ERROR_HANDLER
.global STORE_ERROR_HANDLER
! For ITTM, ITTP, ITDP errors, err_type is < 4. Issue demap all to the VA in TPC[TL].
! (Demap pg requires context knowledge - too much work)
! For ITMU (err_type = 4), rd sfar to chk MRA index.
! For ITL2U and ITL2ND errors issue retry.
INST_ACCESS_MMU_ERROR_HANDLER:
be,a chk_sfar !! sfar stores the MRA index
stxa %g0, [%g3]ASI_IMMU_DEMAP
INST_ACCESS_ERROR_HANDLER:
and %g3, 0x3, %g3 !! get the tca index
ldxa [%g3]ASI_TICK_ACCESS, %g5 !! read ecc
or %g3, 0x20, %g3 !!set NP bit to read data
ldxa [%g3]ASI_TICK_ACCESS, %g5 !! read data
setx ipe_clr_tcc_err, %g1, %g3
wr %g0, %g5, %sys_tick_cmpr
wrhpr %g0, %g5, %hsys_tick_cmpr
and %g3, 0x7, %g3 !! get stb_index
ldxa [%g3]ASI_STB_ACCESS, %g2
ldxa [%g3]ASI_STB_ACCESS, %g2
ldxa [%g3]ASI_STB_ACCESS, %g2
ldxa [%g3]ASI_STB_ACCESS, %g2
add %g0, 0x100, %g1 !! read the stb ptr
ldxa [%g1]ASI_STB_ACCESS, %g2
and %g3, 0x7, %g3 !! get mra_index
setx ipe_rd_mra, %g1, %g4
add %g0, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_0, %g1
ldxa [%g1]ASI_MMU_ZERO_CONTEXT_TSB_CONFIG, %g2
add %g0, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2, %g1
ldxa [%g1]ASI_MMU_ZERO_CONTEXT_TSB_CONFIG, %g2
add %g0, ASI_MMU_NONZERO_CONTEXT_TSB_CONFIG_0, %g1
ldxa [%g1]ASI_MMU_NONZERO_CONTEXT_TSB_CONFIG, %g2
add %g0, ASI_MMU_NONZERO_CONTEXT_TSB_CONFIG_2, %g1
ldxa [%g1]ASI_MMU_NONZERO_CONTEXT_TSB_CONFIG, %g2
add %g0, ASI_MMU_PHYSICAL_OFFSET_0, %g1
ldxa [%g1]ASI_MMU_PHYSICAL_OFFSET, %g2
add %g0, ASI_MMU_PHYSICAL_OFFSET_1, %g1
ldxa [%g1]ASI_MMU_PHYSICAL_OFFSET, %g2
add %g0, ASI_MMU_PHYSICAL_OFFSET_2, %g1
ldxa [%g1]ASI_MMU_PHYSICAL_OFFSET, %g2
add %g0, ASI_MMU_PHYSICAL_OFFSET_3, %g1
ldxa [%g1]ASI_MMU_PHYSICAL_OFFSET, %g2
and %g3, 0x7, %g3 !! get sca_index
ldxa [%g3]ASI_SCRATCHPAD_ACCESS, %g5 !! read ecc
or %g3, 0x40, %g3 !!set NP bit to read data
ldxa [%g3]ASI_SCRATCHPAD_ACCESS, %g5 !! read data
stxa %g5, [%g4]ASI_HYP_SCRATCHPAD
and %g3, 0x7, %g3 !! get tsa_index
rdpr %tl, %g1 !! store the current tl
wrpr %g0, %g2, %tstate !! shd clear the error
add %g0, ASI_CPU_MONDO_QUEUE_HEAD, %g1
ldxa [%g2]ASI_IRF_ECC_REG, %g4
rdpr %gl, %g7 !! read the current gl
bg ipe_rd_array !! err not in global
cmp %g2, 0x3 !! If gl of err reg is less then max gl then clr the err
wrpr %g0, %g2, %gl !! restore the gl to error gl
setx ipe_rd_err_reg, %g4, %g5
stxa %r0, [%g0]ASI_SCRATCHPAD
stxa %r1, [%g0]ASI_SCRATCHPAD
stxa %r2, [%g0]ASI_SCRATCHPAD
stxa %r3, [%g0]ASI_SCRATCHPAD
stxa %r4, [%g0]ASI_SCRATCHPAD
stxa %r5, [%g0]ASI_SCRATCHPAD
stxa %r6, [%g0]ASI_SCRATCHPAD
stxa %r7, [%g0]ASI_SCRATCHPAD
stxa %r8, [%g0]ASI_SCRATCHPAD
stxa %r9, [%g0]ASI_SCRATCHPAD
stxa %r10, [%g0]ASI_SCRATCHPAD
stxa %r11, [%g0]ASI_SCRATCHPAD
stxa %r12, [%g0]ASI_SCRATCHPAD
stxa %r13, [%g0]ASI_SCRATCHPAD
stxa %r14, [%g0]ASI_SCRATCHPAD
stxa %r15, [%g0]ASI_SCRATCHPAD
stxa %r16, [%g0]ASI_SCRATCHPAD
stxa %r17, [%g0]ASI_SCRATCHPAD
stxa %r18, [%g0]ASI_SCRATCHPAD
stxa %r19, [%g0]ASI_SCRATCHPAD
stxa %r20, [%g0]ASI_SCRATCHPAD
stxa %r21, [%g0]ASI_SCRATCHPAD
stxa %r22, [%g0]ASI_SCRATCHPAD
stxa %r23, [%g0]ASI_SCRATCHPAD
stxa %r24, [%g0]ASI_SCRATCHPAD
stxa %r25, [%g0]ASI_SCRATCHPAD
stxa %r26, [%g0]ASI_SCRATCHPAD
stxa %r27, [%g0]ASI_SCRATCHPAD
stxa %r28, [%g0]ASI_SCRATCHPAD
stxa %r29, [%g0]ASI_SCRATCHPAD
stxa %r30, [%g0]ASI_SCRATCHPAD
stxa %r31, [%g0]ASI_SCRATCHPAD
ldxa [%g0]ASI_SCRATCHPAD, %r0
ldxa [%g0]ASI_SCRATCHPAD, %r1
ldxa [%g0]ASI_SCRATCHPAD, %r2
ldxa [%g0]ASI_SCRATCHPAD, %r3
ldxa [%g0]ASI_SCRATCHPAD, %r4
ldxa [%g0]ASI_SCRATCHPAD, %r5
ldxa [%g0]ASI_SCRATCHPAD, %r6
ldxa [%g0]ASI_SCRATCHPAD, %r7
ldxa [%g0]ASI_SCRATCHPAD, %r8
ldxa [%g0]ASI_SCRATCHPAD, %r9
ldxa [%g0]ASI_SCRATCHPAD, %r10
ldxa [%g0]ASI_SCRATCHPAD, %r11
ldxa [%g0]ASI_SCRATCHPAD, %r12
ldxa [%g0]ASI_SCRATCHPAD, %r13
ldxa [%g0]ASI_SCRATCHPAD, %r14
ldxa [%g0]ASI_SCRATCHPAD, %r15
ldxa [%g0]ASI_SCRATCHPAD, %r16
ldxa [%g0]ASI_SCRATCHPAD, %r17
ldxa [%g0]ASI_SCRATCHPAD, %r18
ldxa [%g0]ASI_SCRATCHPAD, %r19
ldxa [%g0]ASI_SCRATCHPAD, %r20
ldxa [%g0]ASI_SCRATCHPAD, %r21
ldxa [%g0]ASI_SCRATCHPAD, %r22
ldxa [%g0]ASI_SCRATCHPAD, %r23
ldxa [%g0]ASI_SCRATCHPAD, %r24
ldxa [%g0]ASI_SCRATCHPAD, %r25
ldxa [%g0]ASI_SCRATCHPAD, %r26
ldxa [%g0]ASI_SCRATCHPAD, %r27
ldxa [%g0]ASI_SCRATCHPAD, %r28
ldxa [%g0]ASI_SCRATCHPAD, %r29
ldxa [%g0]ASI_SCRATCHPAD, %r30
ldxa [%g0]ASI_SCRATCHPAD, %r31
ipe_get_frf_even_syndrome:
ipe_get_frf_odd_syndrome:
ldxa [%g1]ASI_FRF_ECC_REG, %g3
DATA_ACCESS_MMU_ERROR_HANDLER:
stxa %g0, [%g3]ASI_DMMU_DEMAP
DATA_ACCESS_ERROR_HANDLER:
HW_CORRECTED_ERROR_HANDLER:
ldxa [%g0]ASI_DESR, %g1 !! Also clears desr
retry !! Can't do much for l2c errors
sllx %g2, 4, %g2 !! index is in bits 10:4 of addr
sllx %g1, 2, %g1 !! for reading data, bit 13 of index shd be 1
ldxa [%g2]ASI_DC_TAG, %g3
ldxa [%g2+%g1]ASI_DC_DATA, %g4
or %g2, 0x8, %g2 !! read MSB 8 bytes from cache line
ldxa [%g2+%g1]ASI_DC_DATA, %g4
sllx %g2, 5, %g2 !! index is in bits 10:5 of addr for tag read
sllx %g2, 1, %g1 !! index is in bits 11:6 of addr for data read
ldxa [%g0+%g2]ASI_IC_TAG, %g3
ldxa [%g1]ASI_IC_INSTR, %g4
and %g1, 0x7, %g3 !! get stb_index
ldxa [%g3]ASI_STB_ACCESS, %g2
ldxa [%g3]ASI_STB_ACCESS, %g2
ldxa [%g3]ASI_STB_ACCESS, %g2
ldxa [%g3]ASI_STB_ACCESS, %g2
!! The sw_recoverable_err trap is taken mostly for uncorrectable errors.
!! Most of these are due to errors on L2c returns. Can't chk much in the
!! trap handler for these.
SW_RECOVERABLE_ERROR_HANDLER:
ldxa [%g0]ASI_DESR, %g1 !! Also clears desr
ldxa [%g1]ASI_DFESR, %g2 !! read the DFESR