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* OpenSPARC T2 Processor File: system_init_pcie_wait.s
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#include "dmu_peu_regs.h"
! Skip the wait for link training if in Riesling.
#ifdef SKIP_PCIE_LINK_WAIT
! wait for the "Link Up" status bit to get set in the PEU
setx FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ADDR, %g2, %g3
mov FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR__LUP_P, %l1
nop ! $EV trig_pc_d(1, @VA(.RED_EXT_SEC.LinkTrainingLoop)) -> printf("\nIn loop_LinkTraining \n")
brnz %l0, LinkTrainingLoop
nop ! $EV trig_pc_d(1, @VA(.RED_EXT_SEC.LinkTrainingDone)) -> printf("\nPCI LinkTraining done\n")
#if defined(FC_NO_PEU_VERA)