* ========== Copyright Header Begin ==========================================
* OpenSPARC T2 Processor File: FcNiuPeuRand_1.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
* For the avoidance of doubt, and except that if any non-GPL license
* choice is available it will apply instead, Sun elects to use only
* the General Public License version 2 (GPLv2) at this time for any
* software where a choice of GPL license versions is made
* available with the language indicating that GPLv2 or any later version
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* ========== Copyright Header End ============================================
#define MAIN_PAGE_HV_ALSO
#define RCRSTAT_A_Addr mpeval(DMC_ADDRESS_RANGE+0x00050)
#define RBR_STAT_Addr mpeval(DMC_ADDRESS_RANGE+0x00028)
#define ENABLE_PCIE_LINK_TRAINING
#define ENABLE_PCIE_MPS_512
#define MAIN_PAGE_HV_ALSO
#define MEM32_RD_ADDR mpeval(N2_PCIE_BASE_ADDR + MEM32_OFFSET_BASE_REG_DATA)
#define DMA_DATA_ADDR 0x0000000050000000
#define PEU_DEVICE_CNTRL_REG_ADDR FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_ADDR
#define PEU_DEVICE_CNTRL__MPS_128 0
#define PEU_DEVICE_CNTRL__MPS_256 0x20
#define PEU_DEVICE_CNTRL__MPS_512 0x40
setx FIRE_DLC_MMU_CSR_A_CTL_ADDR, %g1, %g2
setx FIRE_DLC_MMU_CSR_A_CTL__BYPASS_EN, %g1, %g3
! branch to main by comparing thread id.
setx 0x0000000000000001, %o0, %g3 ! thread-group bits for the template
setx 0x0000000000000010, %o0, %g3 ! thread-group bits for the template
nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxInitDma)) -> NIU_InitRxDma(1, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA, RX_INITIAL_KICK, NIU_Xlate_On)
setx NIU_PKTGEN_CSR_EV2A_RBR_KICK, %g7, %g2
setx RX_DESC_RING_LENGTH, %g1, %o1
setx RX_COMPL_RING_LEN, %g1, %o2
setx RBR_CONFIG_B_DATA, %g1, %o3
setx RX_INITIAL_KICK, %g1, %o4
nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxPkt_Conf)) -> NIU_RxPktConf(RXMAC_PKTCNT)
ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
setx RXMAC_PKTCNT, %g1, %g6
setx RBR_STAT_Addr, %g7, %g2
ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
nop ! $EV trig_pc_d(1, @VA(.MAIN.Rx_pktcnt_loop)) -> NIU_RxGenPkt(MAC_ID, 1, RXMAC_PKTCNT, 0x5dc, 0x0, RX_NIU_MULTI_DMA, 1)
ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
setx RCRSTAT_A_Addr, %g7, %g2
ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
cmp %g5, RXMAC_PKTCNT - RXMAC_PKTCNT%8
nop ! $EV trig_pc_d(1, @VA(.MAIN.Init_flow)) -> pktGenConfig(MAC_ID, FRAME_TYPE, FRAME_CLASS, 5dc)
nop ! $EV trig_pc_d(1, @VA(.MAIN.P_TxDMAActivate)) -> NIU_TxDMAActivate (MAC_ID, 8000)
setx XMAC0_MAX_addr, %g7, %g2
nop ! $EV trig_pc_d(1, @VA(.MAIN.P_AddTxChannels)) -> NIU_AddTxChannels(MAC_ID, f)
ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
setx SetTxMaxBurst_Data, %g1, %o1
nop ! $EV trig_pc_d(1, @VA(.MAIN.P_SetTxMaxBurst)) -> NIU_SetTxMaxBurst (MAC_ID, f, TxMaxBurst_Data)
ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
nop ! $EV trig_pc_d(1, @VA(.MAIN.P_InitTxDma)) -> NIU_InitTxDma (MAC_ID, f, NIU_Xlate_On)
ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
nop ! $EV trig_pc_d(1, @VA(.MAIN.Gen_Packet)) -> TxPktGen(MAC_ID, f, 0xcf, 0, 0)
ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
setx NIU_PKTGEN_CSR_EV2A_TX_RNG_KICK, %g1, %g2 ! $EV trig_pc_d(1, @VA(.MAIN.SetTxRingKick)) -> NIU_SetTxRingKick(MAC_ID, f)
setx TX_RING_KICK_Addr, %g1, %g2
stxa %g3, [%g2]ASI_PRIMARY_LITTLE
setx TX_CS_Data, %g1, %g3
setx TX_CS_Addr, %g1, %g2
stxa %g3, [%g2]ASI_PRIMARY_LITTLE
setx loop_count, %g1, %g4
ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
setx loop_count, %g1, %g4
ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
nop ! $EV trig_pc_d(1, @VA(.MAIN.test_passed_tx)) -> NIU_EXIT_chk(MAC_ID)
setx RX_INITIAL_KICK, %g1, %o4
setx RBR_STAT_Addr, %g7, %g2
ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
!Initializing integer registers
setx 0xffffffff0000003f, %r30, %r28
_DMAWr_t_DMA_store_exword_0: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
_DMAWr_t_DMA_write_0: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_0)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_1: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_store_exword_2: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd4408005 ! 4: LDSW_R ldsw [%r2 + %r5], %r10
_DMAWr_t_DMA_write_1: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_1)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_3: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_write_2: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_2)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_4: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_write_3: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_3)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_5: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_write_4: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_4)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_6: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_write_5: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_5)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_7: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_store_exword_8: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd2288006 ! 16: STB_R stb %r9, [%r2 + %r6]
_DMAWr_t_DMA_store_exword_9: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd0704004 ! 18: STX_R stx %r8, [%r1 + %r4]
_DMAWr_t_DMA_store_exword_10: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd670c005 ! 20: STX_R stx %r11, [%r3 + %r5]
_DMAWr_t_DMA_store_exword_11: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd2280007 ! 22: STB_R stb %r9, [%r0 + %r7]
_DMAWr_t_DMA_store_exword_12: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd040c005 ! 24: LDSW_R ldsw [%r3 + %r5], %r8
_DMAWr_t_DMA_write_6: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_6)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_13: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_store_exword_14: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd4288004 ! 28: STB_R stb %r10, [%r2 + %r4]
_DMAWr_t_DMA_store_exword_15: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd6408004 ! 30: LDSW_R ldsw [%r2 + %r4], %r11
_DMAWr_t_DMA_store_exword_16: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd0304005 ! 32: STH_R sth %r8, [%r1 + %r5]
_DMAWr_t_DMA_write_7: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_7)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_17: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_write_8: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_8)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_18: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_store_exword_19: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd6704007 ! 38: STX_R stx %r11, [%r1 + %r7]
_DMAWr_t_DMA_store_exword_20: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd2284004 ! 40: STB_R stb %r9, [%r1 + %r4]
_DMAWr_t_DMA_write_9: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_9)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_21: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_store_exword_22: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd640c004 ! 44: LDSW_R ldsw [%r3 + %r4], %r11
_DMAWr_t_DMA_write_10: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_10)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_23: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_store_exword_24: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd470c007 ! 48: STX_R stx %r10, [%r3 + %r7]
_DMAWr_t_DMA_write_11: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_11)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_25: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_write_12: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_12)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_26: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_store_exword_27: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd0584005 ! 54: LDX_R ldx [%r1 + %r5], %r8
_DMAWr_t_DMA_store_exword_28: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd0304004 ! 56: STH_R sth %r8, [%r1 + %r4]
_DMAWr_t_DMA_write_13: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_13)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_29: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_write_14: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_14)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_30: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_write_15: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_15)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_31: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_store_exword_32: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd4404007 ! 64: LDSW_R ldsw [%r1 + %r7], %r10
_DMAWr_t_DMA_write_16: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_16)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_33: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_store_exword_34: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd4200004 ! 68: STW_R stw %r10, [%r0 + %r4]
_DMAWr_t_DMA_write_17: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_17)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_35: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_write_18: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_18)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_36: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_store_exword_37: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd4700006 ! 74: STX_R stx %r10, [%r0 + %r6]
_DMAWr_t_DMA_write_19: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_19)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_38: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_store_exword_39: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd2400005 ! 78: LDSW_R ldsw [%r0 + %r5], %r9
_DMAWr_t_DMA_store_exword_40: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd4208006 ! 80: STW_R stw %r10, [%r2 + %r6]
_DMAWr_t_DMA_write_20: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_20)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_41: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_store_exword_42: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd2704006 ! 84: STX_R stx %r9, [%r1 + %r6]
_DMAWr_t_DMA_store_exword_43: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd070c006 ! 86: STX_R stx %r8, [%r3 + %r6]
_DMAWr_t_DMA_store_exword_44: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd4280004 ! 88: STB_R stb %r10, [%r0 + %r4]
_DMAWr_t_DMA_store_exword_45: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd430c007 ! 90: STH_R sth %r10, [%r3 + %r7]
_DMAWr_t_DMA_store_exword_46: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd2400007 ! 92: LDSW_R ldsw [%r0 + %r7], %r9
_DMAWr_t_DMA_store_exword_47: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd4400007 ! 94: LDSW_R ldsw [%r0 + %r7], %r10
_DMAWr_t_DMA_write_21: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_21)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_48: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_store_exword_49: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd2308007 ! 98: STH_R sth %r9, [%r2 + %r7]
_DMAWr_t_DMA_store_exword_50: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd2284005 ! 100: STB_R stb %r9, [%r1 + %r5]
_DMAWr_t_DMA_store_exword_51: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd2308006 ! 102: STH_R sth %r9, [%r2 + %r6]
_DMAWr_t_DMA_write_22: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_22)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_52: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_write_23: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_23)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_53: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_store_exword_54: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd6288004 ! 108: STB_R stb %r11, [%r2 + %r4]
_DMAWr_t_DMA_write_24: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_24)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_55: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_store_exword_56: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd0308007 ! 112: STH_R sth %r8, [%r2 + %r7]
_DMAWr_t_DMA_store_exword_57: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd4584007 ! 114: LDX_R ldx [%r1 + %r7], %r10
_DMAWr_t_DMA_write_25: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_25)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_58: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
_DMAWr_t_DMA_store_exword_59: .word 0xf871c019 ! STX_R stx %r28, [%r7 + %r25]
.word 0xd2704007 ! 118: STX_R stx %r9, [%r1 + %r7]
_DMAWr_t_DMA_write_26: nop
! $EV trig_pc_d(1, @VA(.MAIN._DMAWr_t_DMA_write_26)) -> EnablePCIeIgCmd("DMAWR", fffc000000000000,fffc000050000000, "64'h1ff", 1)
_DMAWr_t_DMA_store_partial_60: .word 0xfc2a001b !STB_R stb %r30,[%r8+%r27]
! select a MEM32 address in PCI address range and transmit the command to NCU
setx MEM32_RD_ADDR, %g1, %g2
setx 0x080, %g1, %g4 ! loop 128 times
stx %g2, [%g2] ! MEM32 PIO Write
ldx [%g2], %l0 ! MEM32 PIO READ
add %g2, 8, %g2 ! increment PIO address
dec %g4 ! decrement counter
brnz %g4, delay_loop_pcie ! loop if not zero
SECTION descriptor data_va=DMA_DATA_ADDR
.xword 0x1011121314151617
.xword 0x18191a1b1c1d1e1f
.xword 0x2021222324252627
.xword 0x28292a2b2c2d2e2f
.xword 0x3031323334353637
.xword 0x38393a3b3c3d3e3f
.xword 0x4041424344454647
.xword 0x48494a4b4c4d4e4f
.xword 0xffffffffffffffff
.xword 0xffffffffffffffff
.xword 0x1011121314151617
.xword 0x18191a1b1c1d1e1f
.xword 0x2021222324252627
.xword 0x28292a2b2c2d2e2f
.xword 0x3031323334353637
.xword 0x38393a3b3c3d3e3f
.xword 0x4041424344454647
.xword 0x48494a4b4c4d4e4f
.xword 0xffffffffffffffff
.xword 0xffffffffffffffff
.xword 0x1011121314151617
.xword 0x18191a1b1c1d1e1f
.xword 0x2021222324252627
.xword 0x28292a2b2c2d2e2f
.xword 0x3031323334353637
.xword 0x38393a3b3c3d3e3f
.xword 0x4041424344454647
.xword 0x48494a4b4c4d4e4f
.xword 0xffffffffffffffff
.xword 0xffffffffffffffff
.xword 0x1011121314151617
.xword 0x18191a1b1c1d1e1f
.xword 0x2021222324252627
.xword 0x28292a2b2c2d2e2f
.xword 0x3031323334353637
.xword 0x38393a3b3c3d3e3f
.xword 0x4041424344454647
.xword 0x48494a4b4c4d4e4f
.xword 0xffffffffffffffff
.xword 0xffffffffffffffff
.xword 0x1011121314151617
.xword 0x18191a1b1c1d1e1f
.xword 0x2021222324252627
.xword 0x28292a2b2c2d2e2f
.xword 0x3031323334353637
.xword 0x38393a3b3c3d3e3f
.xword 0x4041424344454647
.xword 0x48494a4b4c4d4e4f
.xword 0xffffffffffffffff
.xword 0xffffffffffffffff
.xword 0x1011121314151617
.xword 0x18191a1b1c1d1e1f
.xword 0x2021222324252627
.xword 0x28292a2b2c2d2e2f
.xword 0x3031323334353637
.xword 0x38393a3b3c3d3e3f
.xword 0x4041424344454647
.xword 0x48494a4b4c4d4e4f
.xword 0xffffffffffffffff
.xword 0xffffffffffffffff
.xword 0x1011121314151617
.xword 0x18191a1b1c1d1e1f
.xword 0x2021222324252627
.xword 0x28292a2b2c2d2e2f
.xword 0x3031323334353637
.xword 0x38393a3b3c3d3e3f
.xword 0x4041424344454647
.xword 0x48494a4b4c4d4e4f
.xword 0xffffffffffffffff
.xword 0xffffffffffffffff
.xword 0x1011121314151617
.xword 0x18191a1b1c1d1e1f
.xword 0x2021222324252627
.xword 0x28292a2b2c2d2e2f
.xword 0x3031323334353637
.xword 0x38393a3b3c3d3e3f
.xword 0x4041424344454647
.xword 0x48494a4b4c4d4e4f
.xword 0xffffffffffffffff
.xword 0xffffffffffffffff
.xword 0x1011121314151617
.xword 0x18191a1b1c1d1e1f
.xword 0x2021222324252627
.xword 0x28292a2b2c2d2e2f
.xword 0x3031323334353637
.xword 0x38393a3b3c3d3e3f
.xword 0x4041424344454647
.xword 0x48494a4b4c4d4e4f
.xword 0xffffffffffffffff
.xword 0xffffffffffffffff