Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / diaglists / fc / fc_adv_err.diaglist
// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: fc_adv_err.diaglist
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
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// ========== Copyright Header End ============================================
<sys(fc_all)>
<sys(all)>
<sys(daily)>
// Applied for ALL Error diags
// esr mon off
<runargs -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+500000 -vcs_run_args=+mcu_fmon_disable -vcs_run_args=+mcu_errmon_disable >
<sys(ios-mss_adv_ras) name=sys(ios-mss_adv_ras)>
<runargs -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+ios_0in_ras_chk_off -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1 -vcs_run_args=+MAC_SPEED0=10000 -vcs_run_args=+MAC_SPEED1=10000 -vcs_run_args=+GET_MAC_PORTS=0 -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr -vcs_run_args=+ORIG_META -vcs_run_args=+TX_TEST -midas_args=-DTX_TEST -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING -vcs_run_args=+DISABLE_L2_CHECKER -vcs_run_args=+nb_crc_mon_disable -vcs_run_args=+mcu_errmon_disable -vcs_run_args=+lsu_mon_off -vcs_run_args=+dmusiu_bid_chk_off -vcs_run_args=+siu_order_chk_off -vcs_run_args=+sio_dmu_ras_chk_off -vcs_run_args=+sio_niu_ras_chk_off>
L2_Drc_Mcu_Io_err Drc_Mcu_Io_err.s
L2_Ldac_Mcu_Io_err Ldac_Mcu_Io_err.s -nosas -vcs_run_args=+siu_mon_l2err
L2_Ldrc_Mcu_Io_err Ldrc_Mcu_Io_err.s -nosas -vcs_run_args=+siu_mon_l2err
L2_Lvc_Mcu_Io_err Lvc_Mcu_Io_err.s -nosas
</runargs>
</sys(ios-mss_adv_ras)>
<sys(ios_adv_dmu_ras) name=sys(ios_adv_dmu_ras)>
<runargs -vcs_run_args=+DISABLE_L2_CHECKER -vcs_run_args=+PEU_TEST >
n2_err_adv_DmuWrm_DP n2_err_adv_DmuWrm_DP.s -nosas
n2_err_adv_DmuWri_DP n2_err_adv_DmuWri_DP.s
n2_err_adv_Dmu_AP_Bank0 n2_err_adv_Dmu_AP.s -midas_args=-DBANK0
n2_err_adv_Dmu_AP_Bank1 n2_err_adv_Dmu_AP.s -midas_args=-DBANK1
n2_err_adv_Dmu_AP_Bank2 n2_err_adv_Dmu_AP.s -midas_args=-DBANK2
n2_err_adv_Dmu_AP_Bank3 n2_err_adv_Dmu_AP.s -midas_args=-DBANK3
n2_err_adv_Dmu_AP_Bank4 n2_err_adv_Dmu_AP.s -midas_args=-DBANK4
n2_err_adv_Dmu_AP_Bank5 n2_err_adv_Dmu_AP.s -midas_args=-DBANK5
n2_err_adv_Dmu_AP_Bank6 n2_err_adv_Dmu_AP.s -midas_args=-DBANK6
n2_err_adv_Dmu_AP_Bank7 n2_err_adv_Dmu_AP.s -midas_args=-DBANK7
n2_err_adv_dmu_CtagUe n2_err_adv_dmu_CtagUe.s -vcs_run_args=+dmusiu_bid_chk_off
n2_err_adv_mcuUe_piuRd_L2_0 n2_err_adv_mcuUe_piuRd.s -midas_args=-DL2_0
n2_err_adv_mcuUe_piuRd_L2_1 n2_err_adv_mcuUe_piuRd.s -midas_args=-DL2_1
n2_err_adv_mcuUe_piuRd_L2_2 n2_err_adv_mcuUe_piuRd.s -midas_args=-DL2_2
n2_err_adv_mcuUe_piuRd_L2_3 n2_err_adv_mcuUe_piuRd.s -midas_args=-DL2_3
n2_err_adv_mcuUe_piuRd_L2_4 n2_err_adv_mcuUe_piuRd.s -midas_args=-DL2_4
n2_err_adv_mcuUe_piuRd_L2_5 n2_err_adv_mcuUe_piuRd.s -midas_args=-DL2_5
n2_err_adv_mcuUe_piuRd_L2_6 n2_err_adv_mcuUe_piuRd.s -midas_args=-DL2_6
n2_err_adv_mcuUe_piuRd_L2_7 n2_err_adv_mcuUe_piuRd.s -midas_args=-DL2_7
n2_err_adv_L2Ue_piuRd n2_err_adv_L2Ue_piuRd.s -nosas
n2_err_adv_Dmu_AP_synd n2_err_adv_Dmu_AP_synd.s -vcs_run_args=+dmusiu_bid_chk_off
n2_err_adv_DmuWrRd_mult_err n2_err_adv_DmuWrRd_mult_err.s -vcs_run_args=+dmusiu_bid_chk_off -vcs_run_args=+siu_order_chk_off -vcs_run_args=+sio_dmu_ras_chk_off -vcs_run_args=+sio_niu_ras_chk_off
n2_err_adv_DmuRd_mult_ce n2_err_adv_DmuRd_mult_ce.s -vcs_run_args=+sio_dmu_ras_chk_off
n2_err_adv_mcuUe_SiiDmuctagUe_L2_0 n2_err_adv_mcuUe_SiiDmuctagUe.s -midas_args=-DL2_0 -vcs_run_args=+dmusiu_bid_chk_off
n2_err_adv_mcuUe_SiiDmuctagUe_L2_1 n2_err_adv_mcuUe_SiiDmuctagUe.s -midas_args=-DL2_1 -vcs_run_args=+dmusiu_bid_chk_off
n2_err_adv_mcuUe_SiiDmuctagUe_L2_2 n2_err_adv_mcuUe_SiiDmuctagUe.s -midas_args=-DL2_2 -vcs_run_args=+dmusiu_bid_chk_off
n2_err_adv_mcuUe_SiiDmuctagUe_L2_3 n2_err_adv_mcuUe_SiiDmuctagUe.s -midas_args=-DL2_3 -vcs_run_args=+dmusiu_bid_chk_off
n2_err_adv_mcuUe_SiiDmuctagUe_L2_4 n2_err_adv_mcuUe_SiiDmuctagUe.s -midas_args=-DL2_4 -vcs_run_args=+dmusiu_bid_chk_off
n2_err_adv_mcuUe_SiiDmuctagUe_L2_5 n2_err_adv_mcuUe_SiiDmuctagUe.s -midas_args=-DL2_5 -vcs_run_args=+dmusiu_bid_chk_off
n2_err_adv_mcuUe_SiiDmuctagUe_L2_6 n2_err_adv_mcuUe_SiiDmuctagUe.s -midas_args=-DL2_6 -vcs_run_args=+dmusiu_bid_chk_off
n2_err_adv_mcuUe_SiiDmuctagUe_L2_7 n2_err_adv_mcuUe_SiiDmuctagUe.s -midas_args=-DL2_7 -vcs_run_args=+dmusiu_bid_chk_off
// Error Injection using User events
n2_err_adv_DMUSII_CCE n2_err_adv_DMUSII_CCE.s
n2_err_adv_DMUSII_CUE n2_err_adv_DMUSII_CUE.s -midas_args=-DERR_TYPE=DMUSII_CUE -midas_args=-DERR_FIELD=SiiDmuCtagUe -midas_args=-DSII_SYND=0x8100010123456000 -vcs_run_args=+dmusiu_bid_chk_off
n2_err_adv_DMUSII_AP n2_err_adv_DMUSII_CUE.s -midas_args=-DERR_TYPE=DMUSII_AP -midas_args=-DERR_FIELD=SiiDmuAParity -midas_args=-DSII_SYND=0x8700010123456000
n2_err_adv_DMUSII_CMDP n2_err_adv_DMUSII_CUE.s -midas_args=-DERR_TYPE=DMUSII_CMDP -midas_args=-DERR_FIELD=SiiDmuCtagUe -midas_args=-DSII_SYND=0x8100010123456000 -vcs_run_args=+dmusiu_bid_chk_off -vcs_run_args=+ios_ras_interrupt_chk_off
n2_err_adv_SIODMU_CCE n2_err_adv_SIODMU_CCE.s
n2_err_adv_SIODMU_CUE n2_err_adv_SIODMU_CUE.s -vcs_run_args=+dmusiu_bid_chk_off
n2_err_adv_SIODMU_DP n2_err_adv_SIODMU_DP.s -vcs_run_args=+sio_dmu_ras_chk_off
n2_err_adv_L2SIO_CCE n2_err_adv_L2SIO_CCE.s
n2_err_adv_L2SIO_CUE n2_err_adv_L2SIO_CUE.s -vcs_run_args=+dmusiu_bid_chk_off
// n2_err_adv_L2SIO_DP n2_err_adv_L2SIO_DP.s
n2_err_adv_SIIDMU_WRACK_P n2_err_adv_SIIDMU_WRACK_P.s -midas_args=-DBANK0
n2_err_adv_NCUDMU_MONDO_IDP n2_err_adv_NCUDMU_MONDO_IDP.s -midas_args=-DERR_FIELD=DmuNcuCredit -midas_args=-DTT=0x40
// for coverage
n2_err_adv_piu_mix_1 n2_err_adv_piu_mix_1.s -vcs_run_args=+L2DA_1Bit_ERR_ENABLE -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -midas_args=-DBANK0 -vcs_run_args=+sio_dmu_ras_chk_off
// Stream of transactions
n2_err_adv_piu_strm_wri_DMUSII_AP n2_err_adv_piu_strm_wri_DMUSII_UEV.s -midas_args=-DERR_TYPE=DMUSII_AP -midas_args=-DERR_FIELD=SiiDmuAParity
n2_err_adv_piu_strm_wri_DMUSII_DP n2_err_adv_piu_strm_wri_DMUSII_UEV.s -midas_args=-DERR_TYPE=DMUSII_DP -midas_args=-DERR_FIELD=SiiDmuDParity
n2_err_adv_piu_strm_wri_SiiDmuCtagUe n2_err_adv_piu_strm_wri_ejr.s -midas_args=-DERR_FIELD=SiiDmuCtagUe -midas_args=-DSII_SYND=0x8100000000000000 -nosas
n2_err_adv_piu_strm_wri_SiiDmuAParity n2_err_adv_piu_strm_wri_ejr.s -midas_args=-DERR_FIELD=SiiDmuAParity -midas_args=-DSII_SYND=0x8700000000000000 -nosas
//n2_err_adv_piu_strm_wri_SiiDmuDParity n2_err_adv_piu_strm_wri_ejr.s -midas_args=-DERR_FIELD=SiiDmuDParity -midas_args=-DSII_SYND=0x8500000000000000
n2_err_adv_piu_strm_wri_DmuSiiCredit n2_err_adv_piu_strm_wri_ejr.s -midas_args=-DERR_FIELD=DmuSiiCredit -midas_args=-DSII_SYND=0x0 -nosas
n2_err_adv_piu_strm_wrm_SiiDmuCtagUe n2_err_adv_piu_strm_wrm_ejr.s -midas_args=-DERR_FIELD=SiiDmuCtagUe -midas_args=-DSII_SYND=0x8100000000000000 -nosas
n2_err_adv_piu_strm_wrm_SiiDmuAParity n2_err_adv_piu_strm_wrm_ejr.s -midas_args=-DERR_FIELD=SiiDmuAParity -midas_args=-DSII_SYND=0x8700000000000000
//n2_err_adv_piu_strm_wrm_SiiDmuDParity n2_err_adv_piu_strm_wrm_ejr.s -midas_args=-DERR_FIELD=SiiDmuDParity -midas_args=-DSII_SYND=0x8500000000000000
n2_err_adv_piu_strm_wrm_DmuSiiCredit n2_err_adv_piu_strm_wrm_ejr.s -midas_args=-DERR_FIELD=DmuSiiCredit -midas_args=-DSII_SYND=0x0 -nosas
n2_err_adv_piu_strm_rdd_SiiDmuCtagUe n2_err_adv_piu_strm_rdd_ejr.s -midas_args=-DERR_FIELD=SiiDmuCtagUe -vcs_run_args=+dmusiu_bid_chk_off -midas_args=-DSII_SYND=0x8100000000000000
n2_err_adv_piu_strm_rdd_SiiDmuAParity n2_err_adv_piu_strm_rdd_ejr.s -midas_args=-DERR_FIELD=SiiDmuAParity -midas_args=-DSII_SYND=0x8700000000000000
n2_err_adv_piu_strm_rdd_SioCtagUe n2_err_adv_piu_strm_rdd_ejr.s -midas_args=-DERR_FIELD=SioCtagUe -vcs_run_args=+dmusiu_bid_chk_off -midas_args=-DSII_SYND=0x0
n2_err_adv_piu_strm_rdd_DmuCtagUe n2_err_adv_piu_strm_rdd_ejr.s -midas_args=-DERR_FIELD=DmuCtagUe -vcs_run_args=+sio_dmu_ras_chk_off -midas_args=-DSII_SYND=0x0
// dmu-ras chkr fail n2_err_adv_piu_strm_rdd_DmuDataParity n2_err_adv_piu_strm_rdd_ejr.s -midas_args=-DERR_FIELD=DmuDataParity
// New
n2_err_adv_pio_SiiDmuCtagCe n2_err_adv_pio_err.s -midas_args=-DERR_FIELD=SiiDmuCtagCe -vcs_run_args=+ios_0in_ras_chk_off -nosas
n2_err_pio_DMUSII_CMDP n2_err_pio_DMUSII_CMDP.s -midas_args=-DERR_FIELD=SiiDmuCtagUe -vcs_run_args=+ios_0in_ras_chk_off -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=2 -vcs_run_args=+ios_ras_interrupt_chk_off
</runargs>
</sys(ios_adv_dmu_ras)>
<sys(ios_adv_niu_ras) name=sys(ios_adv_niu_ras)>
// NIU TX
<runargs -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1 -vcs_run_args=+MAC_SPEED0=10000 >
<runargs -vcs_run_args=+MAC_SPEED1=10000 >
<runargs -vcs_run_args=+GET_MAC_PORTS=0 >
<runargs -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr >
<runargs -vcs_run_args=+ORIG_META -vcs_run_args=+TX_TEST >
<runargs -midas_args=-DTX_TEST -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES >
<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
n2_err_adv_NIUSII_CCE n2_err_adv_tx_uev.s -midas_args=-DERR_FIELD=SiiNiuCtagCe -midas_args=-DERR_TYPE=NIUSII_CCE -midas_args=-DCE -vcs_run_args=+ios_ras_interrupt_chk_off
n2_err_adv_NIUSII_CUE n2_err_adv_tx_uev.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -vcs_run_args=+ios_ras_interrupt_chk_off
// To be added after NIU UE infrastructure is done. n2_err_adv_NIUSII_CUE_INT n2_err_adv_tx_uev_INT.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE
n2_err_adv_NIUSII_AP n2_err_adv_tx_uev.s -midas_args=-DERR_FIELD=SiiNiuAParity -midas_args=-DERR_TYPE=NIUSII_AP -vcs_run_args=+ios_ras_interrupt_chk_off -vcs_run_args=+ios_ras_interrupt_chk_off
n2_err_adv_SIONIU_CCE n2_err_adv_tx_uev.s -midas_args=-DERR_FIELD=NiuCtagCe -midas_args=-DERR_TYPE=SIONIU_CCE -midas_args=-DCE -vcs_run_args=+ios_ras_interrupt_chk_off
n2_err_adv_SIONIU_CUE n2_err_adv_tx_uev.s -midas_args=-DERR_FIELD=NiuCtagUe -midas_args=-DERR_TYPE=SIONIU_CUE
// To be added after NIU UE infrastructure is done. n2_err_adv_SIONIU_CUE_INT n2_err_adv_tx_uev_INT.s -midas_args=-DERR_FIELD=NiuCtagUe -midas_args=-DERR_TYPE=SIONIU_CUE
n2_err_adv_SIONIU_DP n2_err_adv_tx_uev.s -midas_args=-DERR_FIELD=NiuDataParity -midas_args=-DERR_TYPE=SIONIU_DP
n2_err_adv_L2SIO_CCE n2_err_adv_tx_uev.s -midas_args=-DERR_FIELD=SioCtagCe -midas_args=-DERR_TYPE=L2SIO_CCE -midas_args=-DCE -vcs_run_args=+ios_ras_interrupt_chk_off
n2_err_adv_L2SIO_CUE n2_err_adv_tx_uev.s -midas_args=-DERR_FIELD=SioCtagUe -midas_args=-DERR_TYPE=L2SIO_CUE
// n2_err_adv_L2SIO_DP n2_err_adv_tx_uev.s -midas_args=-DERR_FIELD=NiuDataParity -midas_args=-DERR_TYPE=L2SIO_DP
n2_err_adv_tx_memerr n2_err_adv_tx_memerr.s -midas_args=-DERR_FIELD=SiiNiuCtagCe -midas_args=-DERR_TYPE=NIUSII_CCE
n2_err_adv_Tx_NIUSII_CUE_B1 n2_err_adv_tx_uev_banks.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=3456040 -midas_args=-DERR_CTAG=0401 -vcs_run_args=+TX_PKT_LEN=512 -midas_args=-DTX_PKT_LEN=0x200
n2_err_adv_Tx_NIUSII_CUE_B2 n2_err_adv_tx_uev_banks.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=3456080 -midas_args=-DERR_CTAG=0402 -vcs_run_args=+TX_PKT_LEN=512 -midas_args=-DTX_PKT_LEN=0x200
n2_err_adv_Tx_NIUSII_CUE_B3 n2_err_adv_tx_uev_banks.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=34560c0 -midas_args=-DERR_CTAG=0403 -vcs_run_args=+TX_PKT_LEN=512 -midas_args=-DTX_PKT_LEN=0x200
n2_err_adv_Tx_NIUSII_CUE_B4 n2_err_adv_tx_uev_banks.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=3456100 -midas_args=-DERR_CTAG=0404 -vcs_run_args=+TX_PKT_LEN=512 -midas_args=-DTX_PKT_LEN=0x200
n2_err_adv_Tx_NIUSII_CUE_B5 n2_err_adv_tx_uev_banks.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=3456140 -midas_args=-DERR_CTAG=0405 -vcs_run_args=+TX_PKT_LEN=512 -midas_args=-DTX_PKT_LEN=0x200
n2_err_adv_Tx_NIUSII_CUE_B6 n2_err_adv_tx_uev_banks.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=3456180 -midas_args=-DERR_CTAG=0406 -vcs_run_args=+TX_PKT_LEN=512 -midas_args=-DTX_PKT_LEN=0x200
n2_err_adv_Tx_NIUSII_CUE_B7 n2_err_adv_tx_uev_banks.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=34561c0 -midas_args=-DERR_CTAG=0407 -vcs_run_args=+TX_PKT_LEN=512 -midas_args=-DTX_PKT_LEN=0x200
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
// NIU RX
<runargs -sas -midas_args=-DCMP_THREAD_START=0x1 -vcs_run_args=+MAC_SPEED0=10000 -finish_mask=1 >
<runargs -vcs_run_args=+MAC_SPEED1=10000 >
<runargs -vcs_run_args=+GET_MAC_PORTS=0 >
<runargs -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr >
<runargs -vcs_run_args=+ORIG_META -midas_args=-DRX_TEST >
<runargs -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES >
<runargs -midas_args=-DRXMAC_PKTCNT=0xa -vcs_run_args=+RXMAC_PKTCNT=10 >
<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
// Talking with MAQ: -vcs_run_args=+no_verilog_finish to NP writes only; as NP wrtes completion are not checked by checker
// Posted writes are checked by checker; so turned off
<runargs -vcs_run_args=+RX_TEST>
n2_err_adv_rx_NPwr_SIONIU_CUE n2_err_adv_rx.s -midas_args=-DERR_FIELD=NiuCtagUe -midas_args=-DERR_TYPE=SIONIU_CUE -midas_args=-DERR_ADDR=d3b40000 -midas_args=-DERR_TAG=a000 -vcs_run_args=+no_verilog_finish
n2_err_adv_rx_NPwr_SIONIU_CUE_INT n2_err_adv_rx_INT.s -midas_args=-DERR_FIELD=NiuCtagUe -midas_args=-DERR_TYPE=SIONIU_CUE -midas_args=-DERR_ADDR=d3b40000 -midas_args=-DERR_TAG=a000 -vcs_run_args=+no_verilog_finish
n2_err_adv_rx_NPwr_NIUSII_CUE n2_err_adv_rx.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=d3b40000 -midas_args=-DERR_TAG=a000 -vcs_run_args=+no_verilog_finish
n2_err_adv_rx_NPwr_NIUSII_CUE_INT n2_err_adv_rx_INT.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=d3b40000 -midas_args=-DERR_TAG=a000 -vcs_run_args=+no_verilog_finish
n2_err_adv_rx_NPwr_NIUSII_AP n2_err_adv_rx.s -midas_args=-DERR_FIELD=SiiNiuAParity -midas_args=-DERR_TYPE=NIUSII_AP -midas_args=-DERR_ADDR=d3b40000 -midas_args=-DERR_TAG=a000 -vcs_run_args=+no_verilog_finish
n2_err_adv_rx_NPwr_NIUSII_DP n2_err_adv_rx.s -midas_args=-DERR_FIELD=SiiNiuDParity -midas_args=-DERR_TYPE=NIUSII_DP -midas_args=-DERR_ADDR=d3b40000 -midas_args=-DERR_TAG=a000 -vcs_run_args=+no_verilog_finish
n2_err_adv_rx_NPwr_L2SIO_CUE n2_err_adv_rx.s -midas_args=-DERR_FIELD=SioCtagUe -midas_args=-DERR_TYPE=L2SIO_CUE -midas_args=-DERR_ADDR=d3b40000 -midas_args=-DERR_TAG=a000 -vcs_run_args=+no_verilog_finish
</runargs>
n2_err_adv_rx_Pwr_NIUSII_CUE n2_err_adv_rx.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=5829b000 -midas_args=-DERR_TAG=9800
n2_err_adv_rx_Pwr_NIUSII_AP n2_err_adv_rx.s -midas_args=-DERR_FIELD=SiiNiuAParity -midas_args=-DERR_TYPE=NIUSII_AP -midas_args=-DERR_ADDR=5829b000 -midas_args=-DERR_TAG=9800
n2_err_adv_rx_Pwr_NIUSII_DP n2_err_adv_rx.s -midas_args=-DERR_FIELD=SiiNiuDParity -midas_args=-DERR_TYPE=NIUSII_DP -midas_args=-DERR_ADDR=5829b000 -midas_args=-DERR_TAG=9800
// add a testcase not to expect error logging as the resonse is thrown out for Posted write
// n2_err_adv_rx_Pwr_L2SIO_CUE n2_err_adv_rx.s -midas_args=-DERR_FIELD=SioCtagUe -midas_args=-DERR_TYPE=L2SIO_CUE -midas_args=-DERR_ADDR=5829b000 -midas_args=-DERR_TAG=9800
n2_err_adv_rx_Pwr_NIUSII_CUE_B1 n2_err_adv_rx.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=58298040 -midas_args=-DERR_TAG=8001 -midas_args=-DMAC_PKT_LEN=0x300
n2_err_adv_rx_Pwr_NIUSII_CUE_B2 n2_err_adv_rx.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=58298080 -midas_args=-DERR_TAG=8002 -midas_args=-DMAC_PKT_LEN=0x300
n2_err_adv_rx_Pwr_NIUSII_CUE_B3 n2_err_adv_rx.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=582980c0 -midas_args=-DERR_TAG=8003 -midas_args=-DMAC_PKT_LEN=0x300
n2_err_adv_rx_Pwr_NIUSII_CUE_B4 n2_err_adv_rx.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=58298100 -midas_args=-DERR_TAG=8004 -midas_args=-DMAC_PKT_LEN=0x300
n2_err_adv_rx_Pwr_NIUSII_CUE_B5 n2_err_adv_rx.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=58298140 -midas_args=-DERR_TAG=8005 -midas_args=-DMAC_PKT_LEN=0x300
n2_err_adv_rx_Pwr_NIUSII_CUE_B6 n2_err_adv_rx.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=58298180 -midas_args=-DERR_TAG=8006 -midas_args=-DMAC_PKT_LEN=0x300
n2_err_adv_rx_Pwr_NIUSII_CUE_B7 n2_err_adv_rx.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=582981c0 -midas_args=-DERR_TAG=8007 -midas_args=-DMAC_PKT_LEN=0x300
//for coverage
n2_err_adv_niu_mix_rx_1 n2_err_adv_niu_mix_rx_1.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DERR_TYPE=NIUSII_CUE -midas_args=-DERR_ADDR=5829b000 -midas_args=-DERR_TAG=9800 -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</sys(ios_adv_niu_ras)>
<sys(ios_adv_ncu_ras) name=sys(ios_adv_ncu_ras)>
<runargs -vcs_run_args=+ios_0in_ras_chk_off >
//NCU: using EJR
n2_err_adv_NcuCtagCe_ld_trap n2_err_adv_ncuctagce.s -midas_args=-DERR_FIELD=NcuCtagCe -vcs_run_args=+PEU_TEST
n2_err_adv_NcuCtagUe_ld_trap n2_err_adv_ncuctague.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=NcuCtagUe -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=2
n2_err_adv_NcuCtagUe_int n2_err_adv_piu_int_ejr.s -midas_args=-DERR_FIELD=NcuCtagUe -midas_args=-DTT=0x40 -vcs_run_args=+lsu_mon_off
n2_err_adv_NcuCtagCe_int n2_err_adv_piu_int_ejr.s -midas_args=-DERR_FIELD=NcuCtagCe -midas_args=-DTT=0x63
n2_err_adv_NcuDataParity_mondo n2_err_adv_piu_int_ejr_nomondo.s -midas_args=-DERR_FIELD=NcuDataParity -vcs_run_args=+PEU_TEST
n2_err_adv_NcuDmuUe_st n2_err_adv_NcuDmuUe_st.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=NcuDmuUe -nosas
//NCU: using userevents
n2_err_adv_DMUSII_TOUT n2_err_adv_peu_piord_uev.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_TYPE=DMUSII_TOUT
n2_err_adv_DMUSII_IOAE n2_err_adv_peu_piord_uev.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_TYPE=DMUSII_IOAE
n2_err_adv_DMUSII_IOUE n2_err_adv_peu_piord_uev.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_TYPE=DMUSII_IOUE
n2_err_pio_DMUSIIDP_NcuDP_UEV n2_err_pio_DMUSIIDP_NcuDP.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=SiiDmuDParity -midas_args=-DERR_FIELD_DETECT=NcuDataParity -midas_args=-DUEV -nosas -vcs_run_args=+ios_ras_interrupt_chk_off
n2_err_pio_DMUSIIDP_NcuDP_EJR n2_err_pio_DMUSIIDP_NcuDP.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=SiiDmuDParity -midas_args=-DERR_FIELD_DETECT=NcuDataParity -midas_args=-DEJR -nosas
//DMU
n2_err_adv_DmuNcuCredit_int n2_err_adv_piu_int_ejr.s -midas_args=-DERR_FIELD=DmuNcuCredit -midas_args=-DTT=0x40
</runargs>
</sys(ios_adv_ncu_ras)>
/////////////////////// Diags with follow up of Silicon Level Testing ////////////////////////////
<sys(mcu_si_ras) name=sys(mcu_si_ras)>
n2_mcu_si_DSC n2_mcu_si_DSC.s -vcs_run_args=+l2cpx_mon_off -midas_args=-DMCU0
</sys(mcu_si_ras)>
// for all diags
</runargs>
</sys(daily)>
</sys(all)>
</sys(fc_all)>