Initial commit of OpenSPARC T2 design and verification files.

[OpenSPARC-T2-DV] / verif / env / ilu_peu / vera / N2fc / N2fcPiuShadowRegs.vr

// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: N2fcPiuShadowRegs.vr
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class N2fcPiuShadowRegs {

 bit [63:0]     piuPcie64Offset;

 bit [63:0]     piuMsi32Address;
 bit [63:0]     piuMsi64Address;
 integer        piuMaxPayloadSize;
 
 bit [63:0]     ncuBaseAddr [3];
 
 bit [15:0]     piuREQ_ID;
 
 bit [63:0]     EQBaseAddr;
 
 bit [6:0]      EQTail [36];
 bit [6:0]      EQHead [36];
 
 bit [63:0]     MSIMapping [256];
 
 bit [63:0]     IoMmuControl;
 
 bit [63:0]     IoMmuTsbControl;
 
 bit [63:0]     IoMmuDev2Iotsb [16];
 
 bit [63:0]     IoMmuIoTsbDesc [32];
 
 task new ();
 
 function bit MsiIsValid(integer MSInum) {
   bit[63:0] temp = MSIMapping[MSInum];
   MsiIsValid = temp[63];
 }
 
 function bit MsiIsEqWr(integer MSInum) {
   bit[63:0] temp = MSIMapping[MSInum];
   MsiIsEqWr = temp[62];
 }
 
 function bit[5:0] GetMsiEqNum(integer MSInum) {
   bit[63:0] temp = MSIMapping[MSInum];
   GetMsiEqNum = temp[5:0];
 }
 
 task SetMsiEqWr(integer MSInum) {
   bit[63:0] temp = MSIMapping[MSInum];
   temp[62] = 1;
   MSIMapping[MSInum] = temp;
 }
 task ClearMsiEqWr(integer MSInum) {
   bit[63:0] temp = MSIMapping[MSInum];
   temp[62] = 0;
   MSIMapping[MSInum] = temp;
 }
}


//---------------------------------------------------------------
// "new" task. 
//---------------------------------------------------------------
task N2fcPiuShadowRegs::new ()
{
 integer i;
 
 piuPcie64Offset   = 0;
 piuMsi32Address   = 0;
 piuMsi64Address   = 0;
 piuMaxPayloadSize = 128;
 ncuBaseAddr[0]    = 0;
 ncuBaseAddr[1]    = 0;
 ncuBaseAddr[2]    = 0;
 piuREQ_ID         = 0;
 EQBaseAddr        = 0;
 for(i=0; i<36; i++) {
   EQTail[i] = 0;
   EQHead[i] = 0;
 }
 for(i=0; i<256; i++) {
   MSIMapping[i] = 0;
 }
}