design/sys/iop/pcie_common/rtl/pcie_common_srq_qci.v

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// OpenSPARC T2 Processor File: pcie_common_srq_qci.v
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module pcie_common_srq_qci (
                            vld,
                            empty,
                            full,
                            afull
                            );

// ----------------------------------------------------------------------------
// Parameters
// ----------------------------------------------------------------------------
  parameter     QD = 4;                         // queue depth

// ----------------------------------------------------------------------------
// Ports
// ----------------------------------------------------------------------------
  input  [QD-1:0]       vld;                    // valid

  output                empty;                  // empty
  output                full;                   // full
  output                afull;                  // almost full

// ----------------------------------------------------------------------------
// Combinational
// ----------------------------------------------------------------------------

  wire                  empty = ~vld[0];
  wire                  full  = &vld[QD-1:1];
  wire                  afull =  vld[QD-2];

endmodule // pcie_common_srq_qci