Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / diaglists / misc / spc_mbist.diaglist
// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: spc_mbist.diaglist
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
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// ========== Copyright Header End ============================================
<spc2_mbist sys=spc2 -sunv_run -config_cpp_args=-DMBIST -zeroIn_build CONFIG_ARG1 -config_rtl=ZIN_CORE_MBIST>
<core_mbist name=core_mbist>
<runargs -tg_seed=1 -config_cpp_args=-DMBIST>
//--------------------------------------
// Long diags - run once a week
<spc_secondary_all>
<core_mbist_long>
mbist_default spc2_hboot_test.s -vcs_run_args=+mbist_mode=4 -max_cycle=1336000 -drm_cpufreq='1200 ..'
mbist_user_mb0_icd spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=1 -max_cycle=690000 -drm_cpufreq='1200 ..'
mbist_user_mb2_irfsh spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=100 -vcs_run_args=+user_array=4 -max_cycle=288000 -drm_cpufreq='1200 ..'
//mbist_default_mb0_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=4 -max_cycle=1336000 -drm_cpufreq='1200 ..' -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=507452 -vcs_run_args=+mbist_force_array=1ffe000
//mbist_default_mb1_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=4 -max_cycle=1336000 -drm_cpufreq='1200 ..' -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=61056 -vcs_run_args=+mbist_force_array=0001fc0
//mbist_default_mb2_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=4 -max_cycle=1336000 -drm_cpufreq='1200 ..' -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=85696 -vcs_run_args=+mbist_force_array=000003f
mbist_user_mb0_icd_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=1 -max_cycle=690000 -drm_cpufreq='1200 ..' -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=294912 -vcs_run_args=+mbist_force_array=0004000
mbist_user_mb2_irfsh_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=100 -vcs_run_args=+user_array=4 -max_cycle=288000 -drm_cpufreq='1200 ..' -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=39872 -vcs_run_args=+mbist_force_array=0000010
</core_mbist_long>
//--------------------------------------
// Short diags - run nightly
<spc_secondary_nightly>
<core_mbist_fast>
mbist_bisi spc2_hboot_test.s -vcs_run_args=+mbist_mode=6 -max_cycle=14000
mbist_ubisi_mb0_dva spc2_hboot_test.s -vcs_run_args=+mbist_mode=7 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=6 -max_cycle=300
mbist_ubisi_mb1_tca spc2_hboot_test.s -vcs_run_args=+mbist_mode=7 -vcs_run_args=+mb_enable=010 -vcs_run_args=+user_array=2 -max_cycle=300
mbist_ubisi_mb2_irfsh spc2_hboot_test.s -vcs_run_args=+mbist_mode=7 -vcs_run_args=+mb_enable=100 -vcs_run_args=+user_array=4 -max_cycle=13000
mbist_user_mb0_dta_LP spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=5 -max_cycle=8000 -vcs_run_args=+user_loop_mode=1 -vcs_run_args=+user_loop_count=3 -vcs_run_args=+user_addr_mode=1 -vcs_run_args=+user_start_addr=0 -vcs_run_args=+user_stop_addr=3f -vcs_run_args=+user_incr_addr=1 -vcs_run_args=+ten_n_mode=1
mbist_user_mb1_tsa0_LP spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=010 -vcs_run_args=+user_array=0 -max_cycle=82000 -vcs_run_args=+user_loop_mode=1 -vcs_run_args=+user_loop_count=3
mbist_user_mb2_rrf_LP spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=100 -vcs_run_args=+user_array=1 -max_cycle=2500 -vcs_run_args=+user_loop_mode=1 -vcs_run_args=+user_loop_count=3 -vcs_run_args=+user_addr_mode=1 -vcs_run_args=+user_start_addr=3 -vcs_run_args=+user_stop_addr=1b -vcs_run_args=+user_incr_addr=4
mbist_ubisi_mb0_lru_LP spc2_hboot_test.s -vcs_run_args=+mbist_mode=7 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=b -max_cycle=3100 -vcs_run_args=+user_loop_mode=1 -vcs_run_args=+user_loop_count=10
mbist_ubisi_mb1_scp1_LP spc2_hboot_test.s -vcs_run_args=+mbist_mode=7 -vcs_run_args=+mb_enable=010 -vcs_run_args=+user_array=4 -max_cycle=1800 -vcs_run_args=+user_loop_mode=1 -vcs_run_args=+user_loop_count=10 -vcs_run_args=+user_addr_mode=1 -vcs_run_args=+user_start_addr=0 -vcs_run_args=+user_stop_addr=1f -vcs_run_args=+user_incr_addr=1
mbist_ubisi_mb2_frf_LP spc2_hboot_test.s -vcs_run_args=+mbist_mode=7 -vcs_run_args=+mb_enable=100 -vcs_run_args=+user_array=5 -max_cycle=6000 -vcs_run_args=+user_loop_mode=1 -vcs_run_args=+user_loop_count=10 -vcs_run_args=+user_data_mode=1 -vcs_run_args=+user_data=be
mbist_user_mb0_ict spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=0 -max_cycle=87000
mbist_user_mb0_icv spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=2 -max_cycle=6000
mbist_user_mb0_itb spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=3 -max_cycle=45000
mbist_user_mb0_dca spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=4 -max_cycle=174000
mbist_user_mb0_dta spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=5 -max_cycle=87000
mbist_user_mb0_dva spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=6 -max_cycle=6000
mbist_user_mb0_dtlb spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=7 -max_cycle=46000
mbist_user_mb0_cpq spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=8 -max_cycle=12000
mbist_user_mb0_stbcam spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=9 -max_cycle=12000
mbist_user_mb0_stbram spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=a -max_cycle=34000
mbist_user_mb0_lru spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=b -max_cycle=22000
mbist_user_mb1_tsa0 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=010 -vcs_run_args=+user_array=0 -max_cycle=28000
mbist_user_mb1_tsa1 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=010 -vcs_run_args=+user_array=1 -max_cycle=28000
mbist_user_mb1_tca spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=010 -vcs_run_args=+user_array=2 -max_cycle=17000
mbist_user_mb1_scp0 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=010 -vcs_run_args=+user_array=3 -max_cycle=17000
mbist_user_mb1_scp1 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=010 -vcs_run_args=+user_array=4 -max_cycle=17000
mbist_user_mb1_mra0 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=010 -vcs_run_args=+user_array=5 -max_cycle=23000
mbist_user_mb1_mra1 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=010 -vcs_run_args=+user_array=6 -max_cycle=23000
mbist_user_mb2_arf spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=100 -vcs_run_args=+user_array=0 -max_cycle=6000
mbist_user_mb2_rrf spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=100 -vcs_run_args=+user_array=1 -max_cycle=12000
mbist_user_mb2_mam spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=100 -vcs_run_args=+user_array=2 -max_cycle=28000
mbist_user_mb2_irf spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=100 -vcs_run_args=+user_array=3 -max_cycle=23000
mbist_user_mb2_frf spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=100 -vcs_run_args=+user_array=5 -max_cycle=45000
mbist_user_mb0_ict_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=0 -max_cycle=87000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=36864 -vcs_run_args=+mbist_force_array=0002000
mbist_user_mb0_icv_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=2 -max_cycle=6000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=2304 -vcs_run_args=+mbist_force_array=0008000
mbist_user_mb0_itb_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=3 -max_cycle=46000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=18432 -vcs_run_args=+mbist_force_array=0010000
mbist_user_mb0_dca_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=4 -max_cycle=174000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=73728 -vcs_run_args=+mbist_force_array=0020000
mbist_user_mb0_dta_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=5 -max_cycle=87000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=36864 -vcs_run_args=+mbist_force_array=0040000
mbist_user_mb0_dva_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=6 -max_cycle=6000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=2304 -vcs_run_args=+mbist_force_array=0080000
mbist_user_mb0_dtlb_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=7 -max_cycle=46000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=18432 -vcs_run_args=+mbist_force_array=0100000
mbist_user_mb0_cpq_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=8 -max_cycle=12000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=4608 -vcs_run_args=+mbist_force_array=0200000
mbist_user_mb0_stbcam_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=9 -max_cycle=12000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=4608 -vcs_run_args=+mbist_force_array=0400000
mbist_user_mb0_stbram_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=a -max_cycle=34000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=12672 -vcs_run_args=+mbist_force_array=0800000
mbist_user_mb0_lru_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_array=b -max_cycle=22000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=6912 -vcs_run_args=+mbist_force_array=1000000
mbist_user_mb1_tsa0_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=010 -vcs_run_args=+user_array=0 -max_cycle=28000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=11520 -vcs_run_args=+mbist_force_array=0000040
mbist_user_mb1_tsa1_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=010 -vcs_run_args=+user_array=1 -max_cycle=28000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=11520 -vcs_run_args=+mbist_force_array=0000080
mbist_user_mb1_tca_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=010 -vcs_run_args=+user_array=2 -max_cycle=17000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=6912 -vcs_run_args=+mbist_force_array=0000100
mbist_user_mb1_scp0_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=010 -vcs_run_args=+user_array=3 -max_cycle=17000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=6912 -vcs_run_args=+mbist_force_array=0000200
mbist_user_mb1_scp1_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=010 -vcs_run_args=+user_array=4 -max_cycle=17000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=6912 -vcs_run_args=+mbist_force_array=0000400
mbist_user_mb1_mra0_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=010 -vcs_run_args=+user_array=5 -max_cycle=23000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=8640 -vcs_run_args=+mbist_force_array=0000800
mbist_user_mb1_mra1_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=010 -vcs_run_args=+user_array=6 -max_cycle=23000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=8640 -vcs_run_args=+mbist_force_array=0001000
mbist_user_mb2_arf_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=100 -vcs_run_args=+user_array=0 -max_cycle=6000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=2304 -vcs_run_args=+mbist_force_array=0000001
mbist_user_mb2_rrf_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=100 -vcs_run_args=+user_array=1 -max_cycle=12000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=4608 -vcs_run_args=+mbist_force_array=0000002
mbist_user_mb2_mam_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=100 -vcs_run_args=+user_array=2 -max_cycle=28000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=11520 -vcs_run_args=+mbist_force_array=0000004
mbist_user_mb2_irf_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=100 -vcs_run_args=+user_array=3 -max_cycle=23000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=8960 -vcs_run_args=+mbist_force_array=0000008
mbist_user_mb2_frf_err spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=100 -vcs_run_args=+user_array=5 -max_cycle=45000 -vcs_run_args=+mbist_errinj -vcs_run_args=+mbist_fail_count=18432 -vcs_run_args=+mbist_force_array=0000020
cbist_user_dtlb_ctest0 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=0 -vcs_run_args=+user_cam_test_sel=0 -max_cycle=825
cbist_user_dtlb_ctest1 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=0 -vcs_run_args=+user_cam_test_sel=1 -max_cycle=825
cbist_user_dtlb_ctest2 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=0 -vcs_run_args=+user_cam_test_sel=2 -max_cycle=825
cbist_user_dtlb_ctest3 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=0 -vcs_run_args=+user_cam_test_sel=3 -max_cycle=825
cbist_user_dtlb_ctest4 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=0 -vcs_run_args=+user_cam_test_sel=4 -max_cycle=825
cbist_user_dtlb_ctest5 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=0 -vcs_run_args=+user_cam_test_sel=5 -max_cycle=825
cbist_user_dtlb_ctest6 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=0 -vcs_run_args=+user_cam_test_sel=6 -max_cycle=575
cbist_user_dtlb_ctest7 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=0 -vcs_run_args=+user_cam_test_sel=7 -max_cycle=575
cbist_user_dtlb_ctest8 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=0 -vcs_run_args=+user_cam_test_sel=8 -max_cycle=575
cbist_user_dtlb_ctest9 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=0 -vcs_run_args=+user_cam_test_sel=9 -max_cycle=575
cbist_user_dtlb_ctest10 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=0 -vcs_run_args=+user_cam_test_sel=a -max_cycle=1000
cbist_user_dtlb_ctest11 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=0 -vcs_run_args=+user_cam_test_sel=b -max_cycle=1250
cbist_user_dtlb_ctest12 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=0 -vcs_run_args=+user_cam_test_sel=c -max_cycle=1600
cbist_user_dtlb_ctest13 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=0 -vcs_run_args=+user_cam_test_sel=d -max_cycle=70000
cbist_user_itlb_ctest0 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=1 -vcs_run_args=+user_cam_test_sel=0 -max_cycle=550
cbist_user_itlb_ctest1 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=1 -vcs_run_args=+user_cam_test_sel=1 -max_cycle=550
cbist_user_itlb_ctest2 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=1 -vcs_run_args=+user_cam_test_sel=2 -max_cycle=550
cbist_user_itlb_ctest3 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=1 -vcs_run_args=+user_cam_test_sel=3 -max_cycle=550
cbist_user_itlb_ctest4 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=1 -vcs_run_args=+user_cam_test_sel=4 -max_cycle=550
cbist_user_itlb_ctest5 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=1 -vcs_run_args=+user_cam_test_sel=5 -max_cycle=550
cbist_user_itlb_ctest6 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=1 -vcs_run_args=+user_cam_test_sel=6 -max_cycle=375
cbist_user_itlb_ctest7 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=1 -vcs_run_args=+user_cam_test_sel=7 -max_cycle=375
cbist_user_itlb_ctest8 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=1 -vcs_run_args=+user_cam_test_sel=8 -max_cycle=375
cbist_user_itlb_ctest9 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=1 -vcs_run_args=+user_cam_test_sel=9 -max_cycle=375
cbist_user_itlb_ctest10 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=1 -vcs_run_args=+user_cam_test_sel=a -max_cycle=575
cbist_user_itlb_ctest11 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=1 -vcs_run_args=+user_cam_test_sel=b -max_cycle=375
cbist_user_itlb_ctest12 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=1 -vcs_run_args=+user_cam_test_sel=c -max_cycle=1000
cbist_user_itlb_ctest13 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=1 -vcs_run_args=+user_cam_test_sel=d -max_cycle=17000
cbist_user_stb_ctest0 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=2 -vcs_run_args=+user_cam_test_sel=0 -max_cycle=400
cbist_user_stb_ctest1 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=2 -vcs_run_args=+user_cam_test_sel=1 -max_cycle=425
cbist_user_stb_ctest2 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=2 -vcs_run_args=+user_cam_test_sel=2 -max_cycle=425
cbist_user_stb_ctest3 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=2 -vcs_run_args=+user_cam_test_sel=3 -max_cycle=425
cbist_user_stb_ctest4 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=2 -vcs_run_args=+user_cam_test_sel=4 -max_cycle=425
cbist_user_stb_ctest5 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=2 -vcs_run_args=+user_cam_test_sel=5 -max_cycle=425
cbist_user_stb_ctest6 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=2 -vcs_run_args=+user_cam_test_sel=6 -max_cycle=775
cbist_user_stb_ctest7 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=2 -vcs_run_args=+user_cam_test_sel=7 -max_cycle=325
cbist_user_stb_ctest8 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=2 -vcs_run_args=+user_cam_test_sel=8 -max_cycle=1800
cbist_user_stb_ctest9 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=2 -vcs_run_args=+user_cam_test_sel=9 -max_cycle=375
cbist_user_stb_ctest10 spc2_hboot_test.s -vcs_run_args=+mbist_mode=5 -vcs_run_args=+mb_enable=001 -vcs_run_args=+user_cam_mode=1 -vcs_run_args=+user_cam_sel=2 -vcs_run_args=+user_cam_test_sel=a -max_cycle=3000
</core_mbist_fast>
</spc_secondary_nightly>
</spc_secondary_all>
</runargs>
</core_mbist>
</spc2_mbist>