verif/env/common/coverage/mcusat/mcu_fc_err_send_l2t0_window.vrhpal

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// OpenSPARC T2 Processor File: mcu_fc_err_send_l2t0_window.vrhpal
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sample mcu_l2_err_2McuSend_Secc_window             (mcu0_mcu1_secc_counter)
  {
     state s_2MCU_secc (1:20);
  }

sample mcu_l2_err_2McuSend_ScbSecc_window          (mcu0_mcu1_scb_secc_counter)
  {
     state s_2MCU_scb_secc (1:20);
  }

sample mcu_l2_err_2McuSend_Mecc_window             (mcu0_mcu1_mecc_counter)
  {
     state s_2MCU_mecc (1:20);
  }

sample mcu_l2_err_2McuSend_ScbMecc_window          (mcu0_mcu1_scb_mecc_counter)
  {
     state s_2MCU_scb_mecc (1:20);
  }

sample mcu_l2_err_2McuSend_Secc_ScbSecc_window     (mcu0_mcu1_secc_scbs_counter)
  {
     state s_MCU_secc_scb_secc (1:20);
  }

sample mcu_l2_err_2McuSend_Secc_Mecc_window        (mcu0_mcu1_secc_mecc_counter)
  {
     state s_MCU_secc_mecc (1:20);
  }

sample mcu_l2_err_2McuSend_Secc_ScbMecc_window     (mcu0_mcu1_secc_scbm_counter)
  {
     state s_MCU_secc_scb_mecc (1:20);
  }

sample mcu_l2_err_2McuSend_ScbSecc_Mecc_window     (mcu0_mcu1_scb_mecc1_counter)
  {
     state s_MCU_scb_secc_scb_mecc (1:20);
  }

sample mcu_l2_err_2McuSend_ScbSecc_ScbMecc_window  (mcu0_mcu1_scb_scbm_counter)
  {
     state s_MCU_scb_secc_sdb_mecc (1:20);
  }

sample mcu_l2_err_2McuSend_Mecc_ScbMecc_window     (mcu0_mcu1_mecc_scbm_counter)
  {
     state s_MCU_mecc_scb_mecc (1:20);
  }

sample mcu_l2_err_3McuSend_Secc_window             (mcu0_mcu1_mcu2_secc_counter)
  {
     state s_3MCU_secc (1:30);
  }

sample mcu_l2_err_3McuSend_ScbSecc_window          (mcu0_mcu1_mcu2_scb_secc_counter)
  {
     state s_3MCU_scb_secc (1:30);
  }

sample mcu_l2_err_4McuSend_Secc_window             (mcu0_mcu1_mcu2_mcu3_secc_counter)
  {
     state s_4MCU_secc (1:50);
  }

sample mcu_l2_err_4McuSend_ScbSecc_window          (mcu0_mcu1_mcu2_mcu3_scb_secc_counter)
  {
     state s_4MCU_scb_secc (1:50);
  }

sample mcu_l2_err_4McuSend_Secc_ScbSecc_Mecc_ScbMecc_window  (mcu0_mcu1_mcu2_mcu3_all_counter)
  {
     state s_4MCU_all      (1:100);
  }