verif/env/common/vera/classes/MCUStub_class.vrh

// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: MCUStub_class.vrh
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#ifndef INC__TMP_MCUSTUB_CLASS_VRH
#define INC__TMP_MCUSTUB_CLASS_VRH

extern class ReadPacket {
  bit [511:0] cacheline;
  bit [39:0] address;
  rand integer req_to_ack_delay;
  rand integer ack_to_data_delay;
  //rand integer intra_data_delay [3];
  rand integer intra_data_delay;
  integer req_id;
  task new (
  );
}

extern class MCUStub_class {
  task new (
    mcu_port portvar, mcu_data_port dataportvar, integer instance
  );
}

#endif