verif/env/common/vera/include/bench_utils.vri

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//
// OpenSPARC T2 Processor File: bench_utils.vri
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#ifndef INC__TMP_BENCH_UTILS_VRI
#define INC__TMP_BENCH_UTILS_VRI

#include <vera_defines.vrh>

#define KILLSIM 49
#define PRINTFULL 100
#define PRINTDEBUG 50
#define PRINTINFO 20
#define PRINTSTAT 10
#define PRINTWARN  5
#define PRINTALWAYS 0


extern class DBG {
  integer verbosity;
  integer errorCount;
  integer HoldNew;
  integer startTime;
  task new (
    integer verb = 20
  );
  task dispmon (
    integer FILE,
    integer level,
    string context,
    string value
  );
  task errorLog (
    integer level,
    string message
  );
  virtual task dumpFailing (
  );
  task startTimer (
  );
  virtual task dumpstats (
  );
}

extern task timeout_monitor (var DBG dbg);
extern task good_end_handler (var DBG dbg, string scope, string message);
extern task error_handler (var DBG dbg, string scope, string message);
extern function bit[7:0] get_thread_enables (string thrstr);
extern function bit file_exists (string filename, string mode);


#endif