// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: rand_defines.vri
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
// For the avoidance of doubt, and except that if any non-GPL license
// choice is available it will apply instead, Sun elects to use only
// the General Public License version 2 (GPLv2) at this time for any
// software where a choice of GPL license versions is made
// available with the language indicating that GPLv2 or any later version
// may be used, or where a choice of which version of the GPL is applied is
// otherwise unspecified.
// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
// CA 95054 USA or visit www.sun.com if you need additional information or
// ========== Copyright Header End ============================================
#define l2_src_addr0 48'h0101_0101_0101
#define l2_src_addr1 48'h0303_0303_0303
#define l2_src_addr2 48'h0707_0707_0707
#define l2_src_addr3 48'h0f0f_0f0f_0f0f
#define l2_src_addr4 48'h00ff_00ff_00ff
#define l2_src_addr5 48'h0000_ffff_0000
#define l2_src_addr6 48'h0000_00ff_ffff
#define l2_src_addr7 48'hffff_ff00_0000
#define bmac_l2_dest_addr0 48'h0101_0101_0101
#define bmac_l2_dest_addr1 48'h0303_0303_0303
#define bmac_l2_dest_addr2 48'h0707_0707_0707
#define bmac_l2_dest_addr3 48'h0f0f_0f0f_0f0f
#define bmac_l2_dest_addr4 48'h00ff_00ff_00ff
#define bmac_l2_dest_addr5 48'h0000_ffff_0000
#define bmac_l2_dest_addr6 48'h0000_00ff_ffff
#define bmac_l2_dest_addr7 48'hffff_ff00_0000
#define xmac_l2_dest_addr0 48'h0101_0101_0101
#define xmac_l2_dest_addr1 48'h0303_0303_0303
#define xmac_l2_dest_addr2 48'h0707_0707_0707
#define xmac_l2_dest_addr3 48'h0f0f_0f0f_0f0f
#define xmac_l2_dest_addr4 48'h00ff_00ff_00ff
#define xmac_l2_dest_addr5 48'h0000_ffff_0000
#define xmac_l2_dest_addr6 48'h0000_00ff_ffff
#define xmac_l2_dest_addr7 48'hffff_ff00_0000
#define xmac_l2_dest_addr8 48'h1111_1111_1111
#define xmac_l2_dest_addr9 48'h3333_3333_3333
#define xmac_l2_dest_addr10 48'h7777_7777_7777
#define xmac_l2_dest_addr11 48'hffff_ffff_ffff
#define xmac_l2_dest_addr12 48'hff00_ff00_ff00
#define xmac_l2_dest_addr13 48'hffff_ff00_0000
#define xmac_l2_dest_addr14 48'habcd_ef01_2345
#define xmac_l2_dest_addr15 48'hffff_ff00_0000
#define l2_dest_pause 48'h0180_C200_0001
#define rx_frame_class_0 CL_ARP
#define rx_frame_class_1 CL_RARP
#define rx_frame_class_2 CL_RSVP
#define rx_frame_class_3 CL_IGMP
#define rx_frame_class_4 CL_ICMP
#define rx_frame_class_5 CL_PIM
#define rx_frame_class_6 CL_GRE
#define rx_frame_class_7 CL_IP
#define rx_frame_class_8 CL_IP_OPT
#define rx_frame_class_9 CL_IP_FRAG
#define rx_frame_class_10 CL_IP_ROUTE
#define rx_frame_class_11 CL_IP_SEC_AH
#define rx_frame_class_12 CL_IP_SEC_ESP
#define rx_frame_class_13 CL_UDP
#define rx_frame_class_14 CL_UDP_FRAG
#define rx_frame_class_15 CL_UDP_OPT
#define rx_frame_class_16 CL_TCP
#define rx_frame_class_17 CL_TCP_FRAG
#define rx_frame_class_18 CL_TCP_OPT
#define rx_frame_class_19 CL_SCTP
#define rx_frame_class_20 CL_SCTP_OPT
#define rx_frame_class_21 CL_SCTP_FRAG
#define rx_frame_class_22 CL_ARP_IP_V6
#define rx_frame_class_23 CL_RARP_IP_V6
#define rx_frame_class_24 CL_RSVP_IP_V6
#define rx_frame_class_25 CL_IGMP_IP_V6
#define rx_frame_class_26 CL_ICMP_IP_V6
#define rx_frame_class_27 CL_PIM_IP_V6
#define rx_frame_class_28 CL_GRE_IP_V6
#define rx_frame_class_29 CL_IP_V6
#define rx_frame_class_30 CL_IP_V6_OPT
#define rx_frame_class_31 CL_IP_V6_FRAG
#define rx_frame_class_32 CL_IP_V6_ROUTE
#define rx_frame_class_33 CL_IP_V6_SEC_AH
#define rx_frame_class_34 CL_IP_V6_SEC_ESP
#define rx_frame_class_35 CL_UDP_IP_V6
#define rx_frame_class_36 CL_UDP_FRAG_IP_V6
#define rx_frame_class_37 CL_UDP_OPT_IP_V6
#define rx_frame_class_38 CL_TCP_IP_V6
#define rx_frame_class_39 CL_TCP_FRAG_IP_V6
#define rx_frame_class_40 CL_TCP_OPT_IP_V6
#define rx_frame_class_41 CL_IP_TUN_V4_V4
#define rx_frame_class_42 CL_IP_TUN_V4_V6
#define rx_frame_class_43 CL_IP_TUN_V6_V4
#define rx_frame_class_44 CL_IP_TUN_V6_V6
#define rx_frame_class_45 CL_USER1
#define rx_frame_class_46 CL_USER2
#define rx_frame_class_47 CL_USER3
#define rx_frame_class_funct_0 CLF_SRC
#define rx_frame_class_funct_1 CLF_DST
#define rx_frame_class_funct_2 CLF_OR
#define rx_frame_class_funct_3 CLF_AND
#define rx_tcp_flags_0 6'b00_0010
#define rx_tcp_flags_1 6'b00_0100
#define rx_tcp_flags_2 6'b00_0001
#define rx_tcp_flags_3 6'b00_1000
#define rx_tcp_flags_4 6'b01_0000
#define rx_tcp_flags_5 6'b10_0000
projects / OpenSPARC-T2-DV / blob