verif/env/common/verilog/monitors/monitors_soc.flist

// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: monitors_soc.flist
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
//
// For the avoidance of doubt, and except that if any non-GPL license
// choice is available it will apply instead, Sun elects to use only
// the General Public License version 2 (GPLv2) at this time for any
// software where a choice of GPL license versions is made
// available with the language indicating that GPLv2 or any later version
// may be used, or where a choice of which version of the GPL is applied is
// otherwise unspecified.
//
// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
// CA 95054 USA or visit www.sun.com if you need additional information or
// have any questions.
//
// ========== Copyright Header End ============================================
+incdir++
monitors_soc.v

iosras/iosras_mon.v
ncu_ucbmon.v
mcu_errmon.v
mcu_fmon.v
nb_crc_mon.v
ddr2_monitor.v
l2esr_mon.v
l2/l2_tagstate_mon.v

//removed this because of PEU
//pcie_intx_mon.v
//removed the following because it is not needed
//dmu_int_relocation_cov_mon.v
mcu/mcuesr_mon.v

//removed the following because it is not needed
//fsrserdes_l0mon.v
//removed this to exclude PEU serdes
//psrserdes_l0mon.v
//removed this to exclude NIU serdes
//esrserdes_l0mon.v
// added this file here, see the comment inside
// :/verif/env/common/verilog/soc_sync/soc_sync.flist
// ../soc_sync/fc_niu_csr_probe.v