verif/env/config/peu_common.config

// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: peu_common.config
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
//
// For the avoidance of doubt, and except that if any non-GPL license
// choice is available it will apply instead, Sun elects to use only
// the General Public License version 2 (GPLv2) at this time for any
// software where a choice of GPL license versions is made
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// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
// CA 95054 USA or visit www.sun.com if you need additional information or
// have any questions.
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// ========== Copyright Header End ============================================
#ifdef AXIS_BUILD
    -config_rtl=AXIS
    -sunv_args=-keepSectionSym=AXIS_SMEM
    -sunv_args=-keepSectionSym=EMUL_COSIM
    -axis_build_args="-scope n2_ccm -map_udp "
   -vcs_build_args=+tran
   -vcs_build_args=+tran_force
   -vcs_build_args=+dutexcl+delay_n+delay_n_w_stalling
   -vcs_build_args=" -pl -R/import/freetools/local/gcc/3.3.2/lib "
   -vcs_build_args=" /import/freetools/local/gcc/3.3.2/lib/libstdc++.so"
   -vcs_build_args=" /import/freetools/local/gcc/3.3.2/lib/libgcc_s.so "
#endif

    -asm_diag_root=$DV_ROOT/verif/diag
        -vera_diag_root=$DV_ROOT/verif/diag
        -vera_config_root=$DV_ROOT/verif
        -image_diag_root=$DV_ROOT/verif
        -wait_cycle_to_kill=10
        -post_process_cmd="regreport -1 > status.log"
    -model=peu
        -flist=$DV_ROOT/verif/env/ilu_peu/ilu_peu_daemon.flist
        -flist=$DV_ROOT/verif/env/ilu_peu/ilu_peu_verif.flist
        -config_rtl=NO_DMC
        -config_rtl=NO_DSN
        -config_rtl=NO_MB0
        -config_rtl=NO_CB0
        -vera_vcon_file=ilu_peu_top.vcon
        -env_base=$DV_ROOT/verif/env/ilu_peu
    -drm_disk=[/export/home/bw=30]
        -drm_type=vcs
        -drm_freeram=1500
        -drm_freeprocessor=1.0
    SUNVFORCEOPTS
    -sunv_args=-topcell=cpu
        -sunv_args=-define=SIM
        -sunv_args=-define=LIB
        -sunv_args=-define=INITLATZERO
        -sunv_use_nonprim
        -sunv_nonprim_list=$DV_ROOT/verif/env/ilu_peu/nonprimitive.list
        -sunv_args=-excludecell=dmu
        -sunv_args=-excludecell=peu
        -sunv_args=-excludecell=psr
        -sunv_args=-excludepreload
        -sunv_args=-out=cpu.v
        -sunv_args=-path=SUNV_RTL_PATH
//Int 6 -sunv_args=-preload=LIBFILE1
//Int 6 -sunv_args=-preload=LIBFILE2
//Int 6 -sunv_args=-preload=LIBFILE3
//Int 6 -sunv_args=-preload=LIBFILE4
//Int 6 -sunv_args=-preload=LIBFILE5
//Int 6 -sunv_args=-preload=SUNVLIB
        -sunv_args=-preload=SUNVLIBS_SUNV
        -sunv_args=-perlinclude=SUNVPERLINC
        -sunv_args=-showCompiledOutCode=off
    -vlint_top=peu
// Skip encrypted code
        -vlint_args=-skip_all_protect
        -vlint_args=-merge_bus_repor
        -vlint_args=-turn_unspecified_off
        -vlint_args=-binary
        -vlint_args=-vlint
        -vlint_args=-depth 999
        -vlint_args=-vr $DV_ROOT/verif/env/config/asic_vlint.rc
        -vlint_args=-turn_unspecified_off
//Int 6 -vlint_args=-v LIBFILE1
//Int 6 -vlint_args=-v LIBFILE2
//Int 6 -vlint_args=-v LIBFILE3
//Int 6 -vlint_args=-v LIBFILE4
//Int 6 -vlint_args=-v LIBFILE5
//Int 6 -vlint_args=-v SUNVLIB
        -vlint_args=SUNVLIBS_OTHER
        -vlint_args=-binary_only
        -illust_run
        -illust_args=-b -c $DV_ROOT/verif/env/config/filter_vlint.rc
    -zeroIn_build_args=-d cpu
#ifdef AXIS_BUILD
        -zeroIn_build_args=-sim axis
#else
        -zeroIn_build_args=-sim vcs
// -added for AXIS build and caused regressions to fail investigate later
//        -zeroIn_build_args=-exit_on_directive_errors
#endif
        -zeroIn_build_args=-ctrl $DV_ROOT/verif/env/ilu_peu/ilu_peu_zeroIn_cfg.v
        -zeroIn_build_args=-ctrl $DV_ROOT/verif/env/common/verilog/checkers/0in_checkers.v
        -zeroIn_build_args=-rcd
//Int 6        -zeroIn_build_args=-v LIBFILE1
//Int 6        -zeroIn_build_args=-v LIBFILE2
//Int 6        -zeroIn_build_args=-v LIBFILE3
//Int 6        -zeroIn_build_args=-v LIBFILE4
//Int 6        -zeroIn_build_args=-v LIBFILE5
//Int 6        -zeroIn_build_args=-v SUNVLIB
        -zeroIn_build_args=SUNVLIBS_OTHER
        -zeroIn_build_args=+define+NO_DMC+NO_DSN+NO_MB0+NO_CB0
        -zeroIn_build_args=+define+CPU=tb_top.cpu
//      -zeroIn_build_args=-exit_on_directive_errors
//      -zeroIn_build_args=-fastmod
//      -zeroIn_build_args="-fastsim turbo"
     -zeroIn_build_args=+error+command-19
     -zeroIn_build_args=+error+command-46
     -zeroIn_build_args=+error+command-6
     -zeroIn_build_args=+error+command-7
#ifdef AXIS_BUILD
        -vcs_build_args=-P $VERA_HOME/lib/vera_pli.tab
        -vcs_build_args=$VERA_HOME/lib/libSysSciTask.a
        -vcs_build_args=-pl -lsocket -pl -lnsl -pl -lintl -pl -ldl
        -vcs_build_args=+v2000
        -vcs_build_args=+timescale+1ns/1ns
#else
        -vcs_build_args=-Mupdate
//        -vcs_build_args=-ld /net/suntools/export/tools/sparc/bin/g++
        VCS_BUILD_WITH_GPP
        -vcs_build_args=-lstdc++
        -vcs_build_args=+v2k
        -vcs_build_args=-vera
        -vcs_build_args=+nospecify +notimingcheck
// Added  12/11/04
        -vcs_build_args=+rad
#endif
// AT 11/11/04: Added the following line to pick up cl_dp1_l1hdr_8x behv model.
        -vcs_build_args=+define+LIB
//Int 6        -vcs_build_args=-v LIBFILE1
//Int 6        -vcs_build_args=-v LIBFILE2
//Int 6        -vcs_build_args=-v LIBFILE3
//Int 6        -vcs_build_args=-v LIBFILE4
//Int 6        -vcs_build_args=-v LIBFILE5
//Int 6        -vcs_build_args=-v SUNVLIB
        -vcs_build_args=SUNVLIBS_OTHER
        -vcs_build_args=+define+NO_DMC+NO_DSN+NO_MB0+NO_CB0
        -vcs_build_args=-P $DV_ROOT/verif/env/fnx/clib/report/report.tab
// Fullchip changes  4/25/05
//      -vcs_build_args=$DV_ROOT/verif/env/fnx/clib/report/report.a
        -vcs_build_args=vera/report.a
// Fullchip changes 4/25/05
//      -vcs_build_args=-P $DV_ROOT/verif/env/fnx/clib/DenaliPCIE/denali_pcie.tab
//      -vcs_build_args=$DV_ROOT/verif/env/fnx/clib/DenaliPCIE/denali_pcie.o
//      -vcs_build_args=-P vera/denali_pcie.tab
        -vcs_build_args=-P $DENALI/verilog/pli.tab
        -vcs_build_args=$DENALI/verilog/denverlib.o
        -vcs_run_args=+vera_disable_final_report
        -vcs_run_args=+vera_exit_on_error
        -vcs_run_args=+vera_semaphore_size=64000
        -vcs_run_args=+vera_mailbox_size=64000
// Fullchip changes  4/25/05
//      -vcs_run_args=+vera_directc=$DV_ROOT/verif/env/fnx/clib/DenaliPCIE/denali_pcie.dl:/import/vcs-release/vera,`configsrch vera`/5.x/lib/libdenaliddv.so
        -vcs_run_args=+vera_directc=$VERA_LIBDIR/denali_pcie.dl:/import/vcs-release/vera,`configsrch vera`/5.x/lib/libdenaliddv.so
// for dispmon
        -vcs_build_args="-P $DV_ROOT/verif/env/common/pli/monitor/monitor_pli.tab"
        -vcs_build_args=$DV_ROOT/verif/env/common/pli/monitor/libmonitor_pli.a
        -vcs_build_args="-P $DV_ROOT/verif/env/common/pli/socket/socket_pli.tab"
        -vcs_build_args=$DV_ROOT/verif/env/common/pli/socket/libsocket_pli.a
// for vcm
        -vcs_cm_config=$DV_ROOT/verif/env/ilu_peu/peu.cm_config