verif/env/siu/vera/packets/siu_basic_packet.vr

// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: siu_basic_packet.vr
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
//
// For the avoidance of doubt, and except that if any non-GPL license
// choice is available it will apply instead, Sun elects to use only
// the General Public License version 2 (GPLv2) at this time for any
// software where a choice of GPL license versions is made
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// ========== Copyright Header End ============================================
#include <vera_defines.vrh>
#include <ListMacros.vrh>
#include "top_defines.vrh"
#include "siu_err_mask.vrh"

enum Siu_Packet_Type { WRI, WRM, RDD, INT, FLUSH, PIORTN, JRD, JWR };

//////////////////////////////////////////////////
//
//////////////////////////////////////////////////

class siu_basic_packet {
     Siu_Packet_Type type;
     reg [15:0] id;
     reg [39:0] pa;
     reg [63:0] data[8];
     reg        bypass;
     reg        ue;
     reg        tout;
     reg        uce;
     reg        posted;
     siu_err_mask       emask;

     task new (
     Siu_Packet_Type type,
     reg [15:0] id,
     reg [39:0] pa,
     reg        bypass = 0,
     reg        posted = 0,
     reg        ue = 0,
     reg        tout = 0,
     reg        uce = 0,
     reg [63:0] data0 = 64'h0,
     reg [63:0] data1 = 64'h0,
     reg [63:0] data2 = 64'h0,
     reg [63:0] data3 = 64'h0,
     reg [63:0] data4 = 64'h0,
     reg [63:0] data5 = 64'h0,
     reg [63:0] data6 = 64'h0,
     reg [63:0] data7 = 64'h0
);

}

MakeVeraList(siu_basic_packet);

/////////////////////////////////////////////////
//
/////////////////////////////////////////////////

task siu_basic_packet::new (
     Siu_Packet_Type type,
     reg [15:0] id,
     reg [39:0] pa,
     reg        bypass = 0,
     reg        posted = 0,
     reg        ue = 0,
     reg        tout = 0,
     reg        uce = 0,
     reg [63:0] data0 = 64'h0,
     reg [63:0] data1 = 64'h0,
     reg [63:0] data2 = 64'h0,
     reg [63:0] data3 = 64'h0,
     reg [63:0] data4 = 64'h0,
     reg [63:0] data5 = 64'h0,
     reg [63:0] data6 = 64'h0,
     reg [63:0] data7 = 64'h0
)

{
    this.type = type;
    this.id = id;
    this.pa = pa;
    this.bypass = bypass;
    this.posted = posted;
    this.ue = ue;
    this.tout = tout;
    this.uce = uce;
    this.data[0] = data0;
    this.data[1] = data1;
    this.data[2] = data2;
    this.data[3] = data3;
    this.data[4] = data4;
    this.data[5] = data5;
    this.data[6] = data6;
    this.data[7] = data7;

    this.emask = null;
}

/////////////////////////////////////////////////
//
/////////////////////////////////////////////////