[OpenSPARC-T2-SAM] / hypervisor / src / common / src / traps_common.s

/*
* ========== Copyright Header Begin ==========================================
*
* Hypervisor Software File: traps_common.s
* 
* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
* 
*  - Do no alter or remove copyright notices
* 
*  - Redistribution and use of this software in source and binary forms, with 
*    or without modification, are permitted provided that the following 
*    conditions are met: 
* 
*  - Redistribution of source code must retain the above copyright notice, 
*    this list of conditions and the following disclaimer.
* 
*  - Redistribution in binary form must reproduce the above copyright notice,
*    this list of conditions and the following disclaimer in the
*    documentation and/or other materials provided with the distribution. 
* 
*    Neither the name of Sun Microsystems, Inc. or the names of contributors 
* may be used to endorse or promote products derived from this software 
* without specific prior written permission. 
* 
*     This software is provided "AS IS," without a warranty of any kind. 
* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, 
* INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A 
* PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN 
* MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR 
* ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR 
* DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN 
* OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR 
* FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE 
* DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY, 
* ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF 
* SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* 
* You acknowledge that this software is not designed, licensed or
* intended for use in the design, construction, operation or maintenance of
* any nuclear facility. 
* 
* ========== Copyright Header End ============================================
*/
/*
 * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
 * Use is subject to license terms.
 */

	.ident	"@(#)traps_common.s	1.2	07/05/24 SMI"

	.file	"traps_common.s"

#include <sys/asm_linkage.h>
#include <sys/stack.h>
#include <hypervisor.h>
#include <hprivregs.h>
#include <asi.h>
#include <mmu.h>
#include <sun4v/traps.h>
#include <sun4v/mmu.h>

#include <traps.h>
#include <traptable.h>
#include <offsets.h>
#include <util.h>
#include <guest.h>
#include <traptrace.h>
#include <debug.h>
#include <abort.h>
#include <util.h>

/*
 * nonresumable_error_trap - enter a guest on the non-resumable error
 * trap vector.
 *
 * The processor does not detect nrq head != tail, any places
 * that possibly enqueue a nr error queue entry must check head != tail and
 * branch here.
 */
	ENTRY(nonresumable_error_trap)
	! ensure that there is an outbound queue
	VCPU_STRUCT(%g1)
	ldx	[%g1 + CPU_ERRQNR_BASE_RA], %g2	! get q base
	brnz	%g2, 1f				! if base RA is zero, skip
	nop
	! The nonresumable error queue is not allocated/initialized
	HVABORT(-1, "nonresumable_error_trap: nrq missing\r\n")

1:
	REVECTOR(TT_NONRESUMABLE_ERR)
	SET_SIZE(nonresumable_error_trap)

 
/*
 * watchdog - enter a guest on the watchdog trap vector
 */
	ENTRY_NP(watchdog)
	LEGION_GOT_HERE
	rdhpr	%htstate, %g1
	btst	HTSTATE_HPRIV, %g1
	bz	1f
	nop

	/* XXX hypervisor_fatal */

1:
	! Disable MMU
	ldxa	[%g0]ASI_LSUCR, %g1
	set	(LSUCR_DM | LSUCR_IM), %g2
	andn	%g1, %g2, %g1	! disable MMU
	stxa	%g1, [%g0]ASI_LSUCR

	! Get real-mode trap table base address
	VCPU_STRUCT(%g1)
	ldx	[%g1 + CPU_RTBA], %g1
	add	%g1, (TT_WDR << TT_OFFSET_SHIFT), %g1
	wrpr	%g1, %tnpc
	done
	SET_SIZE(watchdog)

	/* XXX for now just go to the guest since that tends
	 * to be what we are debugging */

/*
 * xir - enter the guest on the xir trap vector
 *
 * XXX - for now just go to the guest since that tends
 * to be what we are debugging
 */
	ENTRY_NP(xir)
	wrpr	%g0, 1, %tl
	rdhpr	%hpstate, %g7
	wrhpr	%g7, HPSTATE_RED, %hpstate
	LEGION_GOT_HERE

	! Disable MMU
	ldxa	[%g0]ASI_LSUCR, %g1
	set	(LSUCR_DM | LSUCR_IM), %g2
	andn	%g1, %g2, %g1	! disable MMU
	stxa	%g1, [%g0]ASI_LSUCR

	! Get real-mode trap table base address
	VCPU_STRUCT(%g1)
	ldx	[%g1 + CPU_RTBA], %g1
	wrpr	%g1, %tba
	add	%g1, (TT_XIR << TT_OFFSET_SHIFT), %g1
	wrpr	%g1, %tnpc
	done
	SET_SIZE(xir)

	ENTRY_NP(badtrap)
#ifdef DEBUG
	/*
	 * This gives greater visibility into what's happening on debug
	 * hypervisors.
	 */
	ba,a	watchdog_guest
	nop
#endif
	LEGION_GOT_HERE
	ba,pt %xcc, hvabort
	  rdpr	%tpc, %g1
	SET_SIZE(badtrap)
Commit	Line	Data
920dae64 AT	1	/*
	2	* ========== Copyright Header Begin ==========================================
	3	*
	4	* Hypervisor Software File: traps_common.s
	5	*
	6	* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
	7	*
	8	* - Do no alter or remove copyright notices
	9	*
	10	* - Redistribution and use of this software in source and binary forms, with
	11	* or without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistribution of source code must retain the above copyright notice,
	15	* this list of conditions and the following disclaimer.
	16	*
	17	* - Redistribution in binary form must reproduce the above copyright notice,
	18	* this list of conditions and the following disclaimer in the
	19	* documentation and/or other materials provided with the distribution.
	20	*
	21	* Neither the name of Sun Microsystems, Inc. or the names of contributors
	22	* may be used to endorse or promote products derived from this software
	23	* without specific prior written permission.
	24	*
	25	* This software is provided "AS IS," without a warranty of any kind.
	26	* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES,
	27	* INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A
	28	* PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN
	29	* MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR
	30	* ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR
	31	* DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN
	32	* OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR
	33	* FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE
	34	* DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY,
	35	* ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF
	36	* SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
	37	*
	38	* You acknowledge that this software is not designed, licensed or
	39	* intended for use in the design, construction, operation or maintenance of
	40	* any nuclear facility.
	41	*
	42	* ========== Copyright Header End ============================================
	43	*/
	44	/*
	45	* Copyright 2007 Sun Microsystems, Inc. All rights reserved.
	46	* Use is subject to license terms.
	47	*/
	48
	49	.ident "@(#)traps_common.s 1.2 07/05/24 SMI"
	50
	51	.file "traps_common.s"
	52
	53	#include <sys/asm_linkage.h>
	54	#include <sys/stack.h>
	55	#include <hypervisor.h>
	56	#include <hprivregs.h>
	57	#include <asi.h>
	58	#include <mmu.h>
	59	#include <sun4v/traps.h>
	60	#include <sun4v/mmu.h>
	61
	62	#include <traps.h>
	63	#include <traptable.h>
	64	#include <offsets.h>
65	#include <util.h>
66	#include <guest.h>
67	#include <traptrace.h>
68	#include <debug.h>
69	#include <abort.h>
70	#include <util.h>
71
72	/*
73	* nonresumable_error_trap - enter a guest on the non-resumable error
74	* trap vector.
75	*
76	* The processor does not detect nrq head != tail, any places
77	* that possibly enqueue a nr error queue entry must check head != tail and
78	* branch here.
79	*/
80	ENTRY(nonresumable_error_trap)
81	! ensure that there is an outbound queue
82	VCPU_STRUCT(%g1)
83	ldx [%g1 + CPU_ERRQNR_BASE_RA], %g2 ! get q base
84	brnz %g2, 1f ! if base RA is zero, skip
85	nop
86	! The nonresumable error queue is not allocated/initialized
87	HVABORT(-1, "nonresumable_error_trap: nrq missing\r\n")
88
89	1:
90	REVECTOR(TT_NONRESUMABLE_ERR)
91	SET_SIZE(nonresumable_error_trap)
92
93
94	/*
95	* watchdog - enter a guest on the watchdog trap vector
96	*/
97	ENTRY_NP(watchdog)
98	LEGION_GOT_HERE
99	rdhpr %htstate, %g1
100	btst HTSTATE_HPRIV, %g1
101	bz 1f
102	nop
103
104	/* XXX hypervisor_fatal */
105
106	1:
107	! Disable MMU
108	ldxa [%g0]ASI_LSUCR, %g1
109	set (LSUCR_DM \| LSUCR_IM), %g2
110	andn %g1, %g2, %g1 ! disable MMU
111	stxa %g1, [%g0]ASI_LSUCR
112
113	! Get real-mode trap table base address
114	VCPU_STRUCT(%g1)
115	ldx [%g1 + CPU_RTBA], %g1
116	add %g1, (TT_WDR << TT_OFFSET_SHIFT), %g1
117	wrpr %g1, %tnpc
118	done
119	SET_SIZE(watchdog)
120
121	/* XXX for now just go to the guest since that tends
122	* to be what we are debugging */
123
124	/*
125	* xir - enter the guest on the xir trap vector
126	*
127	* XXX - for now just go to the guest since that tends
128	* to be what we are debugging
129	*/
130	ENTRY_NP(xir)
131	wrpr %g0, 1, %tl
132	rdhpr %hpstate, %g7
133	wrhpr %g7, HPSTATE_RED, %hpstate
134	LEGION_GOT_HERE
135
136	! Disable MMU
137	ldxa [%g0]ASI_LSUCR, %g1
138	set (LSUCR_DM \| LSUCR_IM), %g2
139	andn %g1, %g2, %g1 ! disable MMU
140	stxa %g1, [%g0]ASI_LSUCR
141
142	! Get real-mode trap table base address
143	VCPU_STRUCT(%g1)
144	ldx [%g1 + CPU_RTBA], %g1
145	wrpr %g1, %tba
146	add %g1, (TT_XIR << TT_OFFSET_SHIFT), %g1
147	wrpr %g1, %tnpc
148	done
149	SET_SIZE(xir)
150
151	ENTRY_NP(badtrap)
152	#ifdef DEBUG
153	/*
154	* This gives greater visibility into what's happening on debug
155	* hypervisors.
156	*/
157	ba,a watchdog_guest
158	nop
159	#endif
160	LEGION_GOT_HERE
161	ba,pt %xcc, hvabort
162	rdpr %tpc, %g1
163	SET_SIZE(badtrap)