projects / OpenSPARC-T2-SAM / blame
| Commit | Line | Data |
|---|---|---|
| 920dae64 AT |
1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== | |
| 3 | * | |
| 4 | * Hypervisor Software File: errs_common.h | |
| 5 | * | |
| 6 | * Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved. | |
| 7 | * | |
| 8 | * - Do no alter or remove copyright notices | |
| 9 | * | |
| 10 | * - Redistribution and use of this software in source and binary forms, with | |
| 11 | * or without modification, are permitted provided that the following | |
| 12 | * conditions are met: | |
| 13 | * | |
| 14 | * - Redistribution of source code must retain the above copyright notice, | |
| 15 | * this list of conditions and the following disclaimer. | |
| 16 | * | |
| 17 | * - Redistribution in binary form must reproduce the above copyright notice, | |
| 18 | * this list of conditions and the following disclaimer in the | |
| 19 | * documentation and/or other materials provided with the distribution. | |
| 20 | * | |
| 21 | * Neither the name of Sun Microsystems, Inc. or the names of contributors | |
| 22 | * may be used to endorse or promote products derived from this software | |
| 23 | * without specific prior written permission. | |
| 24 | * | |
| 25 | * This software is provided "AS IS," without a warranty of any kind. | |
| 26 | * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, | |
| 27 | * INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A | |
| 28 | * PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN | |
| 29 | * MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR | |
| 30 | * ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR | |
| 31 | * DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN | |
| 32 | * OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR | |
| 33 | * FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE | |
| 34 | * DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY, | |
| 35 | * ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF | |
| 36 | * SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. | |
| 37 | * | |
| 38 | * You acknowledge that this software is not designed, licensed or | |
| 39 | * intended for use in the design, construction, operation or maintenance of | |
| 40 | * any nuclear facility. | |
| 41 | * | |
| 42 | * ========== Copyright Header End ============================================ | |
| 43 | */ | |
| 44 | /* | |
| 45 | * Copyright 2007 Sun Microsystems, Inc. All rights reserved. | |
| 46 | * Use is subject to license terms. | |
| 47 | */ | |
| 48 | ||
| 49 | #ifndef _ERRS_COMMON_H | |
| 50 | #define _ERRS_COMMON_H | |
| 51 | ||
| 52 | #pragma ident "@(#)errs_common.h 1.6 07/05/03 SMI" | |
| 53 | ||
| 54 | #ifdef __cplusplus | |
| 55 | extern "C" { | |
| 56 | #endif | |
| 57 | ||
| 58 | /* | |
| 59 | * Guest error report: Error Handle (ehdl) encoding | |
| 60 | * The error handle is 64 bits long. It will be used to generate a | |
| 61 | * unique error handle. Each strand has an incremental value. | |
| 62 | * | |
| 63 | * 63 56 55 52 51 0 | |
| 64 | * ---------------------------------------------------------------------- | |
| 65 | * | PHYS CPU ID | TL | incrmt num | | |
| 66 | * ---------------------------------------------------------------------- | |
| 67 | */ | |
| 68 | #define EHDL_TL_BITS 4 | |
| 69 | #define EHDL_SEQ_MASK 0x000FFFFFFFFFFFFF | |
| 70 | #define EHDL_SEQ_MASK_SHIFT 12 /* use this strip off upper bits */ | |
| 71 | #define EHDL_CPUTL_SHIFT 52 | |
| 72 | ||
| 73 | #define ERPT_TYPE_CPU 0x1 | |
| 74 | #define ERPT_TYPE_VPCI 0x2 | |
| 75 | ||
| 76 | /* | |
| 77 | * in: | |
| 78 | * | |
| 79 | * out: | |
| 80 | * scr1 -> unique error sequence | |
| 81 | * | |
| 82 | */ | |
| 83 | /* BEGIN CSTYLED */ | |
| 84 | #define GEN_SEQ_NUMBER(scr1, scr2) \ | |
| 85 | STRAND_STRUCT(scr2); ;\ | |
| 86 | ldx [scr2 + STRAND_ERR_SEQ_NO], scr1 /* get current seq# */ ;\ | |
| 87 | add scr1, 1, scr1 /* new seq# */ ;\ | |
| 88 | stx scr1, [scr2 + STRAND_ERR_SEQ_NO] /* update seq# */ ;\ | |
| 89 | sllx scr1, EHDL_SEQ_MASK_SHIFT, scr1 ;\ | |
| 90 | srlx scr1, EHDL_SEQ_MASK_SHIFT, scr1 /* scr1 = normalized seq# */;\ | |
| 91 | ldub [scr2 + STRAND_ID], scr2 /* scr2 has CPUID */ ;\ | |
| 92 | sllx scr2, EHDL_TL_BITS, scr2 /* scr2 << EHDL_TL_BITS */;\ | |
| 93 | sllx scr2, EHDL_CPUTL_SHIFT, scr2 /* scr2 now has cpuid in 63:56 */ ;\ | |
| 94 | or scr2, scr1, scr1 /* scr1 now has ehdl without tl */ ;\ | |
| 95 | rdpr %tl, scr2 /* scr2 = %tl */ ;\ | |
| 96 | sllx scr2, EHDL_CPUTL_SHIFT, scr2 /* scr2 tl in position */;\ | |
| 97 | or scr2, scr1, scr1 /* scr1 -> ehdl */ | |
| 98 | /* END CSTYLED */ | |
| 99 | ||
| 100 | /* | |
| 101 | * A error channel packet gets sent to the vbsc with the PA and size | |
| 102 | * pointing the location of the bulk data. | |
| 103 | * HV obtains the PA and the Size avail from the PDs. They correspond | |
| 104 | * to a location in sram. | |
| 105 | * | |
| 106 | * There is only 1 sram error buffer per system, so it needs to be shared | |
| 107 | * across cpus, fire leaves, and guests. | |
| 108 | * The err_buf_inuse flag on the config struct is used for this purpose. | |
| 109 | * The following flag defines the sram error buffer as busy. | |
| 110 | * | |
| 111 | */ | |
| 112 | #define ERR_BUF_BUSY 1 | |
| 113 | ||
| 114 | /* | |
| 115 | * Software Initiated Reset type codes | |
| 116 | */ | |
| 117 | #define SIR_TYPE_FATAL_DBU 1 | |
| 118 | ||
| 119 | ||
| 120 | #ifdef __cplusplus | |
| 121 | } | |
| 122 | #endif | |
| 123 | ||
| 124 | #endif /* _ERRS_COMMON_H */ |