Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / hypervisor / src / greatlakes / common / src / bootload.s
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* Hypervisor Software File: bootload.s
5*
6* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
7*
8* - Do no alter or remove copyright notices
9*
10* - Redistribution and use of this software in source and binary forms, with
11* or without modification, are permitted provided that the following
12* conditions are met:
13*
14* - Redistribution of source code must retain the above copyright notice,
15* this list of conditions and the following disclaimer.
16*
17* - Redistribution in binary form must reproduce the above copyright notice,
18* this list of conditions and the following disclaimer in the
19* documentation and/or other materials provided with the distribution.
20*
21* Neither the name of Sun Microsystems, Inc. or the names of contributors
22* may be used to endorse or promote products derived from this software
23* without specific prior written permission.
24*
25* This software is provided "AS IS," without a warranty of any kind.
26* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES,
27* INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A
28* PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN
29* MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR
30* ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR
31* DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN
32* OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR
33* FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE
34* DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY,
35* ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF
36* SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
37*
38* You acknowledge that this software is not designed, licensed or
39* intended for use in the design, construction, operation or maintenance of
40* any nuclear facility.
41*
42* ========== Copyright Header End ============================================
43*/
44/*
45 * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
46 * Use is subject to license terms.
47 */
48
49 .ident "@(#)bootload.s 1.2 07/05/03 SMI"
50
51 .file "bootload.s"
52
53#include <sys/asm_linkage.h>
54#include <sys/htypes.h>
55#include <sys/stack.h>
56#include <asi.h>
57#include <debug.h>
58#include <abort.h>
59#include <offsets.h>
60#include <util.h>
61#include <sram.h>
62
63#define BLOCK_SIZE 512
64#define HDR_SIZE 32
65#define HDR_ADDR 0
66#define HDR_ACK (HDR_ADDR+8)
67#define HDR_SUM (HDR_ACK+4)
68#define HDR_TAG (HDR_SUM+2)
69#define HDR_DATA (HDR_SIZE)
70#define BOOTLOAD_READY 1
71#define BOOTLOAD_DONE -1
72
73 ! support the SC->memory loader protocol
74 ! to ACK a packet we write HDR_ACK = (TAG << 16 | SUM)
75 ! when HDR_ACK returns to 0 we have more data.
76 ! if HDR_ACK == -1 (32bits) then we are all finished
77 ! if HDR_ACK < 0 then abort.
78
79#define r_tmp0 %o0
80#define r_tmp1 %o1
81#define r_tmp2 %o2
82#define r_tdat %o3
83#define r_tmp4 %o4
84#define r_sram %l7
85#define r_dram %l6
86#define r_dest %l5
87#define r_src %l4
88#define r_bytes %l3
89#define r_block %l2
90#define r_sum %l1
91
92 ENTRY(bootload)
93 setx SRAM_ADDR + SRAM_SHARED_OFFSET, r_tmp0, r_sram ! SRAM base
94 set SRAM_BOOTLOAD_PKT_OFFSET, r_tmp1 ! bootload packet offset
95 add r_sram, r_tmp1, r_sram
96 set BOOTLOAD_READY, r_tmp0
97 stuw r_tmp0, [r_sram + HDR_ACK]
98do_xfer:
99 ldsw [r_sram + HDR_ACK], r_tmp0
100 cmp r_tmp0, BOOTLOAD_DONE
101 beq,pn %xcc, xfer_done
102 mov BLOCK_SIZE, r_bytes
103 brz,pt r_tmp0, begin_copy
104 ldx [r_sram + HDR_ADDR], r_dest
105 cmp r_tmp0, 0
106 bpos,pt %xcc, do_xfer
107 nop
108 HVABORT(-1, "MD download aborted by SP")
109begin_copy:
110 mov %g0, r_sum
111 ! accumulate header in checksum - only addr, tag and r_sum
112 ldx [r_sram + HDR_ADDR], r_tdat
113
114 srlx r_tdat, 48, r_tmp0
115 add r_tmp0, r_sum, r_sum
116 sllx r_tdat, 16, r_tmp0
117 srlx r_tmp0, 48, r_tmp0
118 add r_tmp0, r_sum, r_sum
119 sllx r_tdat, 32, r_tmp0
120 srlx r_tmp0, 48, r_tmp0
121 add r_tmp0, r_sum, r_sum
122 sllx r_tdat, 48, r_tmp0
123 srlx r_tmp0, 48, r_tmp0
124 add r_tmp0, r_sum, r_sum
125
126 lduh [r_sram + HDR_TAG], r_tmp0
127 lduh [r_sram + HDR_SUM], r_tmp1
128 add r_tmp0, r_sum, r_sum
129 add r_tmp1, r_sum, r_sum
130 add r_sram, HDR_DATA, r_src
131do_copy:
132 ! copy data to ram and accumulate in checksum
133 ldx [r_src], r_tdat
134 stx r_tdat, [r_dest]
135
136 srlx r_tdat, 48, r_tmp0
137 add r_tmp0, r_sum, r_sum
138 sllx r_tdat, 16, r_tmp0
139 srlx r_tmp0, 48, r_tmp0
140 add r_tmp0, r_sum, r_sum
141 sllx r_tdat, 32, r_tmp0
142 srlx r_tmp0, 48, r_tmp0
143 add r_tmp0, r_sum, r_sum
144 sllx r_tdat, 48, r_tmp0
145 srlx r_tmp0, 48, r_tmp0
146 add r_tmp0, r_sum, r_sum
147
148 add r_dest, 8, r_dest
149 subcc r_bytes, 8, r_bytes
150 bne,pt %xcc, do_copy
151 add r_src, 8, r_src
1521: srl r_sum, 16, r_tmp0 ! get upper 16 bits
153 sll r_sum, 16, r_sum
154 srl r_sum, 16, r_sum ! chuck upper 16 bits
155 brnz,pt r_tmp0, 1b
156 add r_tmp0, r_sum, r_sum
157 sub %g0, 1, r_tmp1
158 srl r_tmp1, 16, r_tmp1 ! 0xffff
159 xor r_sum, r_tmp1, r_sum
160 lduh [r_sram + HDR_TAG], r_tmp2
161 sllx r_tmp2, 16, r_tmp2
162 or r_tmp2, r_sum, r_tmp2
163 ba do_xfer
164 st r_tmp2, [r_sram + HDR_ACK]
165xfer_done:
166 HVRET
167 SET_SIZE(bootload)
168
169 /*
170 * Wrapper around bootload, so it can be called from C.
171 * SPARC ABI requries only that g2,g3,g4 are preserved across
172 * function calls.
173 *
174 * void c_bootload(void)
175 */
176
177 ENTRY(c_bootload)
178
179#ifndef CONFIG_FPGA
180 retl
181 nop
182#else
183
184 save %sp, -SA(MINFRAME), %sp
185
186 STRAND_PUSH(%g2, %g6, %g7)
187 STRAND_PUSH(%g3, %g6, %g7)
188 STRAND_PUSH(%g4, %g6, %g7)
189
190 HVCALL(bootload)
191
192 STRAND_POP(%g4, %g6)
193 STRAND_POP(%g3, %g6)
194 STRAND_POP(%g2, %g6)
195
196 ret
197 restore
198#endif
199 SET_SIZE(c_bootload)