Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / hypervisor / src / greatlakes / huron / include / platform / cwq.h
CommitLineData
920dae64
AT
1/*
2* ========== Copyright Header Begin ==========================================
3*
4* Hypervisor Software File: cwq.h
5*
6* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
7*
8* - Do no alter or remove copyright notices
9*
10* - Redistribution and use of this software in source and binary forms, with
11* or without modification, are permitted provided that the following
12* conditions are met:
13*
14* - Redistribution of source code must retain the above copyright notice,
15* this list of conditions and the following disclaimer.
16*
17* - Redistribution in binary form must reproduce the above copyright notice,
18* this list of conditions and the following disclaimer in the
19* documentation and/or other materials provided with the distribution.
20*
21* Neither the name of Sun Microsystems, Inc. or the names of contributors
22* may be used to endorse or promote products derived from this software
23* without specific prior written permission.
24*
25* This software is provided "AS IS," without a warranty of any kind.
26* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES,
27* INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A
28* PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN
29* MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR
30* ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR
31* DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN
32* OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR
33* FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE
34* DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY,
35* ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF
36* SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
37*
38* You acknowledge that this software is not designed, licensed or
39* intended for use in the design, construction, operation or maintenance of
40* any nuclear facility.
41*
42* ========== Copyright Header End ============================================
43*/
44/*
45 * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
46 * Use is subject to license terms.
47 */
48
49#ifndef _PLATFORM_CWQ_H
50#define _PLATFORM_CWQ_H
51
52#pragma ident "@(#)cwq.h 1.1 07/05/03 SMI"
53
54/*
55 * Niagara2 CWQ definitions
56 */
57
58#ifdef __cplusplus
59extern "C" {
60#endif
61
62#ifndef _ASM
63
64/*
65 * Per-cwq attributes.
66 */
67typedef struct {
68 resource_t res;
69 int pid;
70 int ino;
71 int guestid;
72 uint64_t cpuset; /* cpus ref CWQ */
73} cwq_parse_info_t;
74
75
76typedef struct cwq_queue {
77 uint64_t cq_lock;
78 uint32_t cq_state;
79 uint32_t cq_busy;
80 uint64_t cq_dr_base_ra;
81 uint64_t cq_dr_base;
82 uint64_t cq_dr_last;
83 uint64_t cq_dr_head;
84 uint64_t cq_dr_tail;
85 uint64_t cq_base;
86 uint64_t cq_last;
87 uint64_t cq_head;
88 uint64_t cq_head_marker;
89 uint64_t cq_tail;
90 uint64_t cq_nentries;
91 uint64_t cq_cpu_pid; /* HV intr target */
92 uint64_t cq_scr1;
93 uint64_t cq_scr2;
94 uint64_t cq_scr3;
95 uint64_t cq_dr_hv_offset;
96 /*
97 * space allocated for "shadow queue" elements
98 * allocate one more entry than necessary to make room
99 * for alignment of array to 64-byte boundary
100 */
101 cwq_cw_t cq_hv_cws[NCS_MAX_CWQ_NENTRIES + 1];
102} cwq_queue_t;
103
104struct cwq {
105 uint64_t pid; /* physical CWQ id */
106 uint64_t state; /* error/running/unconfig */
107 uint64_t handle; /* handle for CWQ */
108 uint64_t ino; /* ino property */
109 uint64_t cpuset; /* cpus ref CWQ */
110 uint8_t cpu_active[NSTRANDS_PER_CORE];
111 crypto_intr_t ihdlr; /* intr_handler info */
112 struct guest *guest;
113
114 /*
115 * Configuration and running status
116 */
117 uint32_t res_id;
118 cwq_parse_info_t pip;
119 cwq_queue_t queue; /* queue for CWQ */
120};
121
122#endif
123
124/*
125 * Niagara2 CWQ definitions
126 */
127
128/*
129 * CWQ Initial Control Word
130 * Field Bits R/W
131 * ----- ---- ---
132 * EOB 53 R/W
133 * INTR 48 R/W
134 * RES 52:50 R/W
135 * STRAND_ID 39:37 R/W
136 * HMAC_KEYLEN 23:16 R/W
137 * LENGTH 15:0 R/W
138 */
139#define CW_SOB_SHIFT 54
140#define CW_SOB_MASK 0x1
141#define CW_EOB_SHIFT 53
142#define CW_EOB_MASK 0x1
143#define CW_RES_SHIFT 50
144#define CW_RES_MASK 0x7
145#define CW_INTR_SHIFT 48
146#define CW_INTR_MASK 0x1
147#define CW_STRAND_ID_SHIFT 37
148#define CW_STRAND_ID_MASK 0x7
149#define CW_HMAC_KEYLEN_SHIFT 16
150#define CW_HMAC_KEYLEN_MASK 0xff
151#define CW_LENGTH_MASK 0xffff
152
153#define MAX_IV_LENGTH 32
154#define MAX_AUTHSTATE_LENGTH 32
155
156/*
157 * CWQ CSR bits
158 */
159#define CWQ_CSR_ENABLED 1
160#define CWQ_CSR_BUSY 2
161#define CWQ_CSR_PROTOERR 4
162#define CWQ_CSR_HWERR 8
163
164#define CWQ_CSR_ERROR_SHIFT 2
165#define CWQ_CSR_ERROR (CWQ_CSR_PROTOERR | \
166 CWQ_CSR_HWERR)
167
168#ifdef _ASM
169
170/* BEGIN CSTYLED */
171
172
173#ifndef NCS_HANDLE_DEFS
174
175#define NCS_HANDLE_DEFS
176#define HANDLE_SIGMASK 0xfff
177#define HANDLE_IDMASK 0xfff
178#define HANDLE_IDSHIFT 16
179#define HANDLE2ID(hdl, idx) \
180 srlx hdl, HANDLE_IDSHIFT, idx ; \
181 and idx, HANDLE_IDMASK, idx
182#define ID2HANDLE(idx, sig, hdl) \
183 and idx, HANDLE_IDMASK, hdl ; \
184 sllx hdl, HANDLE_IDSHIFT, hdl ; \
185 or hdl, sig, hdl
186
187#endif /* NCS_HANDLE_DEFS */
188
189
190#define CWQ_HANDLE_SIG 0x0a72
191#define HANDLE_IS_CWQ(hdl, scr) \
192 and hdl, HANDLE_SIGMASK, scr ; \
193 cmp scr, CWQ_HANDLE_SIG
194#define HANDLE_IS_CWQ_BRANCH(hdl, scr, label) \
195 and hdl, HANDLE_SIGMASK, scr ; \
196 cmp scr, CWQ_HANDLE_SIG ;\
197 be %xcc, label ;\
198 nop
199
200/*
201 * CWQ_HANDLE2ID_VERIFY
202 * Translates and verifies a CWQ specific handle
203 * for a valid signature and ID.
204 */
205#define CWQ_HANDLE2ID_VERIFY(hdl, lbl, id) \
206 HANDLE_IS_CWQ(hdl, id) ; \
207 bne,pn %xcc, lbl ; \
208 nop ; \
209 HANDLE2ID(hdl, id) ; \
210 cmp id, NCWQS ; \
211 bgeu,pn %xcc, lbl ; \
212 nop
213
214
215#define CWQ_CLEAR_QSTATE(cwq) \
216 stx %g0, [cwq + CWQ_QUEUE + CQ_LOCK] ; \
217 stx %g0, [cwq + CWQ_QUEUE + CQ_DR_BASE_RA] ; \
218 stx %g0, [cwq + CWQ_QUEUE + CQ_DR_BASE] ; \
219 stx %g0, [cwq + CWQ_QUEUE + CQ_DR_LAST] ; \
220 stx %g0, [cwq + CWQ_QUEUE + CQ_DR_HEAD] ; \
221 stx %g0, [cwq + CWQ_QUEUE + CQ_DR_TAIL] ; \
222 stx %g0, [cwq + CWQ_QUEUE + CQ_BASE] ; \
223 stx %g0, [cwq + CWQ_QUEUE + CQ_LAST] ; \
224 stx %g0, [cwq + CWQ_QUEUE + CQ_HEAD] ; \
225 stx %g0, [cwq + CWQ_QUEUE + CQ_HEAD_MARKER] ; \
226 stx %g0, [cwq + CWQ_QUEUE + CQ_NENTRIES] ; \
227 stx %g0, [cwq + CWQ_QUEUE + CQ_DR_HV_OFFSET] ; \
228 st %g0, [cwq + CWQ_QUEUE + CQ_BUSY]
229
230#define GUEST_CID_GETCWQ(guest, id, cwq) \
231 sllx id, GUEST_CWQS_SHIFT, cwq ; \
232 add cwq, GUEST_CWQS, cwq ; \
233 ldx [guest + cwq], cwq
234
235
236#define CWQ_LOCK_ENTER(cwq, lck, scr1, scr2) \
237 add cwq, CWQ_QUEUE, lck ; \
238 add lck, CQ_LOCK, lck ; \
239 SPINLOCK_ENTER(lck, scr1, scr2)
240#define CWQ_LOCK_EXIT(cwq, lck) \
241 add cwq, CWQ_QUEUE, lck ; \
242 add lck, CQ_LOCK, lck ; \
243 SPINLOCK_EXIT(lck)
244#define CWQ_LOCK_EXIT_L(lck) \
245 SPINLOCK_EXIT(lck)
246
247#define HCALL_NCS_QINFO_CWQ() \
248 HANDLE_IS_CWQ(%o0, %g2) ;\
249 bne,pn %xcc, herr_inval ;\
250 nop ;\
251 ;\
252 CWQ_HANDLE2ID_VERIFY(%o0, herr_inval, %g2) ;\
253 GUEST_CID_GETCWQ(%g1, %g2, %g3) ;\
254 brz,pn %g3, herr_inval ;\
255 nop ;\
256 ;\
257 CWQ_LOCK_ENTER(%g3, %g2, %g5, %g6) ;\
258 ;\
259 mov NCS_QTYPE_CWQ, %o1 ;\
260 ldx [%g3 + CWQ_QUEUE + CQ_DR_BASE_RA], %o2 ;\
261 ldx [%g3 + CWQ_QUEUE + CQ_NENTRIES], %o3 ;\
262 ;\
263 CWQ_LOCK_EXIT_L(%g2) ;\
264 ;\
265 HCALL_RET(EOK) ;\
266
267#define HCALL_NCS_GETHEAD_CWQ() \
268 HANDLE_IS_CWQ(%o0, %g2) ;\
269 bne,pn %xcc, herr_inval ;\
270 nop ;\
271 ;\
272 CWQ_HANDLE2ID_VERIFY(%o0, herr_inval, %g2) ;\
273 GUEST_CID_GETCWQ(%g1, %g2, %g3) ;\
274 brz,pn %g3, herr_inval ;\
275 nop ;\
276 ;\
277 CWQ_LOCK_ENTER(%g3, %g5, %g2, %g6) ;\
278 ;\
279 ldx [%g3 + CWQ_QUEUE + CQ_BASE], %g1 ;\
280 ldx [%g3 + CWQ_QUEUE + CQ_HEAD], %g2 ;\
281 sub %g2, %g1, %o1 ;\
282 ;\
283 CWQ_LOCK_EXIT_L(%g5) ;\
284 ;\
285 HCALL_RET(EOK) ;\
286
287#define HCALL_NCS_GETTAIL_CWQ() \
288 HANDLE_IS_CWQ(%o0, %g2) ;\
289 bne,pn %xcc, herr_inval ;\
290 nop ;\
291 ;\
292 CWQ_HANDLE2ID_VERIFY(%o0, herr_inval, %g2) ;\
293 GUEST_CID_GETCWQ(%g1, %g2, %g3) ;\
294 brz,pn %g3, herr_inval ;\
295 nop ;\
296 ;\
297 CWQ_LOCK_ENTER(%g3, %g5, %g2, %g6) ;\
298 ;\
299 ldx [%g3 + CWQ_QUEUE + CQ_BASE], %g1 ;\
300 ldx [%g3 + CWQ_QUEUE + CQ_TAIL], %g2 ;\
301 sub %g2, %g1, %o1 ;\
302 ;\
303 CWQ_LOCK_EXIT_L(%g5) ;\
304 ;\
305 HCALL_RET(EOK) ;\
306
307#define HCALL_NCS_QHANDLE_TO_DEVINO_CWQ() \
308 HANDLE_IS_CWQ(%o0, %g2) ;\
309 bne,pn %xcc, herr_inval ;\
310 nop ;\
311 ;\
312 CWQ_HANDLE2ID_VERIFY(%o0, herr_inval, %g2) ;\
313 GUEST_CID_GETCWQ(%g1, %g2, %g3) ;\
314 brz,pn %g3, herr_inval ;\
315 nop ;\
316 ;\
317 ldx [%g3 + CWQ_INO], %o1 ;\
318 ;\
319 HCALL_RET(EOK) ;\
320
321#define HCALL_NCS_SETHEAD_MARKER_CWQ() \
322 .pushlocals ;\
323 HANDLE_IS_CWQ(%o0, %g2) ;\
324 bne,pn %xcc, herr_inval ;\
325 nop ;\
326 ;\
327 CWQ_HANDLE2ID_VERIFY(%o0, herr_inval, %g2) ;\
328 GUEST_CID_GETCWQ(%g1, %g2, %g3) ;\
329 brz,pn %g3, herr_inval ;\
330 nop ;\
331 ;\
332 btst CWQ_CW_SIZE - 1, %o1 ;\
333 bnz,a,pn %xcc, herr_inval ;\
334 nop ;\
335 ;\
336 CWQ_LOCK_ENTER(%g3, %g5, %g2, %g6) ;\
337 ;\
338 ldx [%g3 + CWQ_QUEUE + CQ_BASE], %g1 ;\
339 add %g1, %o1, %g1 ;\
340 ldx [%g3 + CWQ_QUEUE + CQ_LAST], %g2 ;\
341 cmp %g1, %g2 ;\
342 bleu,a,pn %xcc, 2f ;\
343 stx %g1, [%g3 + CWQ_QUEUE + CQ_HEAD_MARKER] ;\
344 ;\
345 CWQ_LOCK_EXIT_L(%g5) ;\
346 ;\
347 HCALL_RET(EINVAL) ;\
348 ;\
3492: ;\
350 CWQ_LOCK_EXIT_L(%g5) ;\
351 ;\
352 HCALL_RET(EOK) ;\
353 .poplocals
354
355#define IS_NCS_QTYPE_CWQ(q, qtype, qlabel) \
356 cmp q, qtype ;\
357 be qlabel ;\
358 nop
359
360#endif /* _ASM */
361
362/* END CSTYLED */
363
364#ifdef __cplusplus
365}
366#endif
367
368#endif /* _PLATFORM_CWQ_H */