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Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / hypervisor / src / greatlakes / huron / src / traptable.s
CommitLineData
920dae64
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* Hypervisor Software File: traptable.s
5*
6* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
7*
8* - Do no alter or remove copyright notices
9*
10* - Redistribution and use of this software in source and binary forms, with
11* or without modification, are permitted provided that the following
12* conditions are met:
13*
14* - Redistribution of source code must retain the above copyright notice,
15* this list of conditions and the following disclaimer.
16*
17* - Redistribution in binary form must reproduce the above copyright notice,
18* this list of conditions and the following disclaimer in the
19* documentation and/or other materials provided with the distribution.
20*
21* Neither the name of Sun Microsystems, Inc. or the names of contributors
22* may be used to endorse or promote products derived from this software
23* without specific prior written permission.
24*
25* This software is provided "AS IS," without a warranty of any kind.
26* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES,
27* INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A
28* PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN
29* MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR
30* ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR
31* DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN
32* OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR
33* FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE
34* DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY,
35* ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF
36* SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
37*
38* You acknowledge that this software is not designed, licensed or
39* intended for use in the design, construction, operation or maintenance of
40* any nuclear facility.
41*
42* ========== Copyright Header End ============================================
43*/
44/*
45 * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
46 * Use is subject to license terms.
47 */
48
49 .ident "@(#)traptable.s 1.7 07/09/14 SMI"
50
51 .file "traptable.s"
52
53/*
54 * Niagara hypervisor trap table
55 */
56
57#include <sys/asm_linkage.h>
58#include <sys/stack.h>
59#include <hypervisor.h>
60#include <hprivregs.h>
61#include <asi.h>
62#include <mmu.h>
63#include <traps.h>
64#include <sun4v/traps.h>
65#include <sun4v/mmu.h>
66
67#include <offsets.h>
68#include <traptable.h>
69#include <util.h>
70#include <guest.h>
71#include <traptrace.h>
72#include <debug.h>
73#include <util.h>
74#include <abort.h>
75#include <error_asm.h>
76#include <error_regs.h>
77
78/*
79 * The basic hypervisor trap table
80 *
81 * We use the linker to place this at the beginning of the hypervisor
82 * binary which gets loaded at an appropriate alignment by Reset/Config.
83 */
84
85 ENTRY(htraptable)
86 /*
87 * hardware traps
88 */
89 TRAP(tt0_000, NOT) /* reserved */
90 TRAP(tt0_001, POR) /* power-on reset */
91 TRAP(tt0_002, GOTO(watchdog)) /* watchdog reset */
92 TRAP(tt0_003, GOTO(xir)) /* externally initiated reset */
93 TRAP(tt0_004, NOT) /* software initiated reset */
94 TRAP(tt0_005, NOT) /* red mode exception */
95 TRAP(tt0_006, NOT) /* reserved */
96 TRAP(tt0_007, STORE_ERROR) /* Store error */
97 TRAP(tt0_008, IMMU_ERR(MMU_FT_PRIV)) /* IAE - privilege violation */
98 TRAP(tt0_009, IMMU_MISS_HWTW) /* instruction access mmu miss */
99 TRAP(tt0_00a, IA_ERR) /* instruction access error */
100 TRAP(tt0_00b, IMMU_ERR_RV(MMU_FT_PROT)) /* IAE - unauth access */
101 TRAP(tt0_00c, IMMU_ERR_RV(MMU_FT_NFO)) /* IAE - NFO page */
102 TRAP(tt0_00d, IMMU_ERR_RV(MMU_FT_VARANGE)) /* instr address range */
103 TRAP(tt0_00e, IMMU_ERR_RV(MMU_FT_INVALIDRA)) /* instr real range */
104 TRAP(tt0_00f, NOT) /* reserved */
105 TRAP(tt0_010, REVECTOR(TT_ILLINST)) /* illegal instruction */
106 TRAP(tt0_011, REVECTOR(TT_PRIVOP)) /* privileged opcode */
107 TRAP(tt0_012, REVECTOR(TT_UNIMP_LDD)) /* unimplemented LDD */
108 TRAP(tt0_013, REVECTOR(TT_UNIMP_STD)) /* unimplemented STD */
109 TRAP(tt0_014, DMMU_ERR_RV(MMU_FT_BADASI)) /* DAE - invalid asi */
110 TRAP(tt0_015, DMMU_ERR_RV(MMU_FT_PRIV)) /* DAE - privilege violation */
111 TRAP(tt0_016, DAE_nc_page) /* DAE - NC page */
112 TRAP(tt0_017, DMMU_ERR_RV(MMU_FT_NFO)) /* DAE - NFO page */
113 TRAP(tt0_018, NOT) /* reserved */
114 TRAP(tt0_019, NOT) /* reserved */
115 TRAP(tt0_01a, NOT) /* reserved */
116 TRAP(tt0_01b, NOT) /* reserved */
117 TRAP(tt0_01c, NOT) /* reserved */
118 TRAP(tt0_01d, NOT) /* reserved */
119 TRAP(tt0_01e, NOT) /* reserved */
120 TRAP(tt0_01f, NOT) /* reserved */
121 TRAP(tt0_020, NOT) /* fp disabled */
122 TRAP(tt0_021, NOT) /* fp exception ieee 754 */
123 TRAP(tt0_022, NOT) /* fp exception other */
124 TRAP(tt0_023, NOT) /* tag overflow */
125 BIGTRAP(tt0_024, CLEAN_WINDOW) /* clean window */
126 TRAP(tt0_028, NOT) /* division by zero */
127 TRAP(tt0_029, IP_ERR) /* internal processor error */
128 TRAP(tt0_02a, ITSB_ERR) /* instr. invalid TSB entry */
129 TRAP(tt0_02b, DTSB_ERR) /* data invalid TSB entry */
130 TRAP(tt0_02c, NOT) /* reserved */
131 TRAP(tt0_02d, DMMU_ERR_RV(MMU_FT_INVALIDRA)) /* mem real range */
132 TRAP(tt0_02e, DMMU_ERR_RV(MMU_FT_VARANGE)) /* mem address range */
133 TRAP(tt0_02f, NOT) /* reserved */
134 TRAP(tt0_030, DMMU_ERR_RV(MMU_FT_SO)) /* DAE - so page */
135 TRAP(tt0_031, DMMU_MISS_HWTW) /* data access mmu miss */
136 TRAP(tt0_032, DA_ERR) /* data access error */
137 TRAP(tt0_033, NOT) /* data access protection */
138 TRAP(tt0_034, DMMU_ERR(MMU_FT_ALIGN)) /* mem address not aligned */
139 TRAP(tt0_035, DMMU_ERR(MMU_FT_ALIGN)) /* lddf mem address not aligned */
140 TRAP(tt0_036, DMMU_ERR(MMU_FT_ALIGN)) /* stdf mem address not aligned */
141 TRAP(tt0_037, DMMU_ERR(MMU_FT_PRIV)) /* privileged action */
142 TRAP(tt0_038, DMMU_ERR(MMU_FT_ALIGN)) /* ldqf mem address not aligned */
143 TRAP(tt0_039, DMMU_ERR(MMU_FT_ALIGN)) /* stqf mem address not aligned */
144 TRAP(tt0_03a, NOT) /* reserved */
145 TRAP(tt0_03b, DMMU_ERR_RV(MMU_FT_MULTIERR)) /* unsupported page size */
146 TRAP(tt0_03c, CWQINTR) /* control word queue */
147 TRAP(tt0_03d, MAUINTR) /* modular arithmetic unit */
148 TRAP(tt0_03e, RIMMU_MISS) /* HV: real immu miss */
149 TRAP(tt0_03f, RDMMU_MISS) /* HV: real dmmu miss */
150 TRAP(tt0_040, SW_RECOVERABLE_ERROR) /* s/w recoverable error */
151 TRAP(tt0_041, NOT) /* interrupt level 1 */
152 TRAP(tt0_042, NOT) /* interrupt level 2 */
153 TRAP(tt0_043, NOT) /* interrupt level 3 */
154 TRAP(tt0_044, NOT) /* interrupt level 4 */
155 TRAP(tt0_045, NOT) /* interrupt level 5 */
156 TRAP(tt0_046, NOT) /* interrupt level 6 */
157 TRAP(tt0_047, NOT) /* interrupt level 7 */
158 TRAP(tt0_048, NOT) /* interrupt level 8 */
159 TRAP(tt0_049, NOT) /* interrupt level 9 */
160 TRAP(tt0_04a, NOT) /* interrupt level a */
161 TRAP(tt0_04b, NOT) /* interrupt level b */
162 TRAP(tt0_04c, NOT) /* interrupt level c */
163 TRAP(tt0_04d, NOT) /* interrupt level d */
164 TRAP(tt0_04e, NOT) /* interrupt level e */
165 TRAP(tt0_04f, NOT) /* interrupt level f */
166 TRAP(tt0_050, NOT) /* reserved */
167 TRAP(tt0_051, NOT) /* reserved */
168 TRAP(tt0_052, NOT) /* reserved */
169 TRAP(tt0_053, NOT) /* reserved */
170 TRAP(tt0_054, NOT) /* reserved */
171 TRAP(tt0_055, NOT) /* reserved */
172 TRAP(tt0_056, NOT) /* reserved */
173 TRAP(tt0_057, NOT) /* reserved */
174 TRAP(tt0_058, NOT) /* reserved */
175 TRAP(tt0_059, NOT) /* reserved */
176 TRAP(tt0_05a, NOT) /* reserved */
177 TRAP(tt0_05b, NOT) /* reserved */
178 TRAP(tt0_05c, NOT) /* reserved */
179 TRAP(tt0_05d, NOT) /* reserved */
180 TRAP(tt0_05e, HSTICK_INTR) /* HV: hstick match */
181 TRAP(tt0_05f, NOT) /* trap level zero */
182 TRAP(tt0_060, VECINTR) /* interrupt vector */
183 TRAP(tt0_061, NOT) /* RA watchpoint */
184 TRAP(tt0_062, NOT) /* VA watchpoint */
185 TRAP(tt0_063, HW_CORRECTED_ERROR) /* H/W CORRected ECC error XXX */
186 BIGTRAP(tt0_064, IMMU_MISS) /* fast instruction access MMU miss */
187 BIGTRAP(tt0_068, DMMU_MISS) /* fast data access MMU miss */
188 BIGTRAP(tt0_06C, DMMU_PROT) /* fast data access protection */
189 TRAP(tt0_070, NOT) /* reserved */
190 TRAP(tt0_071, IAM_ERR) /* instruction access MMU error */
191 TRAP(tt0_072, DAM_ERR) /* data access MMU error */
192 TRAP(tt0_073, NOT) /* reserved */
193 TRAP(tt0_074, NOT) /* control transfer instruction */
194 TRAP(tt0_075, NOT) /* instruction VA watchpoint */
195 TRAP(tt0_076, NOT) /* instruction breakpoint */
196 TRAP(tt0_077, NOT) /* reserved */
197 TRAP(tt0_078, NOT) /* data error (disrupting) */
198 TRAP(tt0_079, NOT) /* reserved */
199 TRAP(tt0_07a, NOT) /* reserved */
200 TRAP(tt0_07b, NOT) /* reserved */
201 TRAP(tt0_07c, NOT) /* HV: cpu mondo */
202 TRAP(tt0_07d, NOT) /* HV: dev mondo */
203 TRAP(tt0_07e, NOT) /* HV: resumable error */
204 TRAP(tt0_07f, NOT) /* HV: non-resumable error */
205 BIGTRAP(tt0_080, SPILL_WINDOW) /* spill 0 normal */
206 BIGTRAP(tt0_084, SPILL_WINDOW) /* spill 1 normal */
207 BIGTRAP(tt0_088, SPILL_WINDOW) /* spill 2 normal */
208 BIGTRAP(tt0_08c, SPILL_WINDOW) /* spill 3 normal */
209 BIGTRAP(tt0_090, SPILL_WINDOW) /* spill 4 normal */
210 BIGTRAP(tt0_094, SPILL_WINDOW) /* spill 5 normal */
211 BIGTRAP(tt0_098, SPILL_WINDOW) /* spill 6 normal */
212 BIGTRAP(tt0_09c, SPILL_WINDOW) /* spill 7 normal */
213 BIGTRAP(tt0_0a0, SPILL_WINDOW) /* spill 0 other */
214 BIGTRAP(tt0_0a4, SPILL_WINDOW) /* spill 1 other */
215 BIGTRAP(tt0_0a8, SPILL_WINDOW) /* spill 2 other */
216 BIGTRAP(tt0_0ac, SPILL_WINDOW) /* spill 3 other */
217 BIGTRAP(tt0_0b0, SPILL_WINDOW) /* spill 4 other */
218 BIGTRAP(tt0_0b4, SPILL_WINDOW) /* spill 5 other */
219 BIGTRAP(tt0_0b8, SPILL_WINDOW) /* spill 6 other */
220 BIGTRAP(tt0_0bc, SPILL_WINDOW) /* spill 7 other */
221 BIGTRAP(tt0_0c0, FILL_WINDOW) /* fill 0 normal */
222 BIGTRAP(tt0_0c4, FILL_WINDOW) /* fill 1 normal */
223 BIGTRAP(tt0_0c8, FILL_WINDOW) /* fill 2 normal */
224 BIGTRAP(tt0_0cc, FILL_WINDOW) /* fill 3 normal */
225 BIGTRAP(tt0_0d0, FILL_WINDOW) /* fill 4 normal */
226 BIGTRAP(tt0_0d4, FILL_WINDOW) /* fill 5 normal */
227 BIGTRAP(tt0_0d8, FILL_WINDOW) /* fill 6 normal */
228 BIGTRAP(tt0_0dc, FILL_WINDOW) /* fill 7 normal */
229 BIGTRAP(tt0_0e0, FILL_WINDOW) /* fill 0 other */
230 BIGTRAP(tt0_0e4, FILL_WINDOW) /* fill 1 other */
231 BIGTRAP(tt0_0e8, FILL_WINDOW) /* fill 2 other */
232 BIGTRAP(tt0_0ec, FILL_WINDOW) /* fill 3 other */
233 BIGTRAP(tt0_0f0, FILL_WINDOW) /* fill 4 other */
234 BIGTRAP(tt0_0f4, FILL_WINDOW) /* fill 5 other */
235 BIGTRAP(tt0_0f8, FILL_WINDOW) /* fill 6 other */
236 BIGTRAP(tt0_0fc, FILL_WINDOW) /* fill 7 other */
237 /*
238 * Software traps
239 */
240 TRAP(tt0_100, NOT) /* software trap */
241 TRAP(tt0_101, NOT) /* software trap */
242 TRAP(tt0_102, NOT) /* software trap */
243 TRAP(tt0_103, NOT) /* software trap */
244 TRAP(tt0_104, NOT) /* software trap */
245 TRAP(tt0_105, NOT) /* software trap */
246 TRAP(tt0_106, NOT) /* software trap */
247 TRAP(tt0_107, NOT) /* software trap */
248 TRAP(tt0_108, NOT) /* software trap */
249 TRAP(tt0_109, NOT) /* software trap */
250 TRAP(tt0_10a, NOT) /* software trap */
251 TRAP(tt0_10b, NOT) /* software trap */
252 TRAP(tt0_10c, NOT) /* software trap */
253 TRAP(tt0_10d, NOT) /* software trap */
254 TRAP(tt0_10e, NOT) /* software trap */
255 TRAP(tt0_10f, NOT) /* software trap */
256 TRAP(tt0_110, NOT) /* software trap */
257 TRAP(tt0_111, NOT) /* software trap */
258 TRAP(tt0_112, NOT) /* software trap */
259#ifdef DEBUG
260 TRAP(tt0_113, GOTO(hprint)) /* print string */
261 TRAP(tt0_114, GOTO(hprintx)) /* print hex 64-bit */
262#else
263 TRAP(tt0_113, NOT) /* software trap */
264 TRAP(tt0_114, NOT) /* software trap */
265#endif
266 TRAP(tt0_115, NOT) /* software trap */
267 TRAP(tt0_116, NOT) /* software trap */
268 TRAP(tt0_117, NOT) /* software trap */
269 TRAP(tt0_118, NOT) /* software trap */
270 TRAP(tt0_119, NOT) /* software trap */
271 TRAP(tt0_11a, NOT) /* software trap */
272 TRAP(tt0_11b, NOT) /* software trap */
273 TRAP(tt0_11c, NOT) /* software trap */
274 TRAP(tt0_11d, NOT) /* software trap */
275 TRAP(tt0_11e, NOT) /* software trap */
276 TRAP(tt0_11f, NOT) /* software trap */
277 TRAP(tt0_120, NOT) /* software trap */
278 TRAP(tt0_121, NOT) /* software trap */
279 TRAP(tt0_122, NOT) /* software trap */
280 TRAP(tt0_123, NOT) /* software trap */
281 TRAP(tt0_124, NOT) /* software trap */
282 TRAP(tt0_125, NOT) /* software trap */
283 TRAP(tt0_126, NOT) /* software trap */
284 TRAP(tt0_127, NOT) /* software trap */
285 TRAP(tt0_128, NOT) /* software trap */
286 TRAP(tt0_129, NOT) /* software trap */
287 TRAP(tt0_12a, NOT) /* software trap */
288 TRAP(tt0_12b, NOT) /* software trap */
289 TRAP(tt0_12c, NOT) /* software trap */
290 TRAP(tt0_12d, NOT) /* software trap */
291 TRAP(tt0_12e, NOT) /* software trap */
292 TRAP(tt0_12f, NOT) /* software trap */
293 TRAP(tt0_130, NOT) /* software trap */
294 TRAP(tt0_131, NOT) /* software trap */
295 TRAP(tt0_132, NOT) /* software trap */
296 TRAP(tt0_133, NOT) /* software trap */
297 TRAP(tt0_134, NOT) /* software trap */
298 TRAP(tt0_135, NOT) /* software trap */
299 TRAP(tt0_136, NOT) /* software trap */
300 TRAP(tt0_137, NOT) /* software trap */
301 TRAP(tt0_138, NOT) /* software trap */
302 TRAP(tt0_139, NOT) /* software trap */
303 TRAP(tt0_13a, NOT) /* software trap */
304 TRAP(tt0_13b, NOT) /* software trap */
305 TRAP(tt0_13c, NOT) /* software trap */
306 TRAP(tt0_13d, NOT) /* software trap */
307 TRAP(tt0_13e, NOT) /* software trap */
308 TRAP(tt0_13f, NOT) /* software trap */
309 TRAP(tt0_140, NOT) /* software trap */
310 TRAP(tt0_141, NOT) /* software trap */
311 TRAP(tt0_142, NOT) /* software trap */
312 TRAP(tt0_143, NOT) /* software trap */
313 TRAP(tt0_144, NOT) /* software trap */
314 TRAP(tt0_145, NOT) /* software trap */
315 TRAP(tt0_146, NOT) /* software trap */
316 TRAP(tt0_147, NOT) /* software trap */
317 TRAP(tt0_148, NOT) /* software trap */
318 TRAP(tt0_149, NOT) /* software trap */
319 TRAP(tt0_14a, NOT) /* software trap */
320 TRAP(tt0_14b, NOT) /* software trap */
321 TRAP(tt0_14c, NOT) /* software trap */
322 TRAP(tt0_14d, NOT) /* software trap */
323 TRAP(tt0_14e, NOT) /* software trap */
324 TRAP(tt0_14f, NOT) /* software trap */
325 TRAP(tt0_150, NOT) /* software trap */
326 TRAP(tt0_151, NOT) /* software trap */
327 TRAP(tt0_152, NOT) /* software trap */
328 TRAP(tt0_153, NOT) /* software trap */
329 TRAP(tt0_154, NOT) /* software trap */
330 TRAP(tt0_155, NOT) /* software trap */
331 TRAP(tt0_156, NOT) /* software trap */
332 TRAP(tt0_157, NOT) /* software trap */
333 TRAP(tt0_158, NOT) /* software trap */
334 TRAP(tt0_159, NOT) /* software trap */
335 TRAP(tt0_15a, NOT) /* software trap */
336 TRAP(tt0_15b, NOT) /* software trap */
337 TRAP(tt0_15c, NOT) /* software trap */
338 TRAP(tt0_15d, NOT) /* software trap */
339 TRAP(tt0_15e, NOT) /* software trap */
340 TRAP(tt0_15f, NOT) /* software trap */
341 TRAP(tt0_160, NOT) /* software trap */
342 TRAP(tt0_161, NOT) /* software trap */
343 TRAP(tt0_162, NOT) /* software trap */
344 TRAP(tt0_163, NOT) /* software trap */
345 TRAP(tt0_164, NOT) /* software trap */
346 TRAP(tt0_165, NOT) /* software trap */
347 TRAP(tt0_166, NOT) /* software trap */
348 TRAP(tt0_167, NOT) /* software trap */
349 TRAP(tt0_168, NOT) /* software trap */
350 TRAP(tt0_169, NOT) /* software trap */
351 TRAP(tt0_16a, NOT) /* software trap */
352 TRAP(tt0_16b, NOT) /* software trap */
353 TRAP(tt0_16c, NOT) /* software trap */
354 TRAP(tt0_16d, NOT) /* software trap */
355 TRAP(tt0_16e, NOT) /* software trap */
356 TRAP(tt0_16f, NOT) /* software trap */
357 TRAP(tt0_170, NOT) /* software trap */
358 TRAP(tt0_171, NOT) /* software trap */
359 TRAP(tt0_172, NOT) /* software trap */
360 TRAP(tt0_173, NOT) /* software trap */
361 TRAP(tt0_174, NOT) /* software trap */
362 TRAP(tt0_175, NOT) /* software trap */
363 TRAP(tt0_176, NOT) /* software trap */
364 TRAP(tt0_177, NOT) /* software trap */
365 TRAP(tt0_178, NOT) /* software trap */
366 TRAP(tt0_179, NOT) /* software trap */
367 TRAP(tt0_17a, NOT) /* software trap */
368 TRAP(tt0_17b, NOT) /* software trap */
369 TRAP(tt0_17c, NOT) /* software trap */
370 TRAP(tt0_17d, NOT) /* software trap */
371 TRAP(tt0_17e, NOT) /* software trap */
372 TRAP(tt0_17f, NOT) /* software trap */
373 TRAP(tt0_180, GOTO(hcall)) /* hypervisor software trap */
374 TRAP(tt0_181, HCALL_BAD) /* hypervisor software trap */
375 TRAP(tt0_182, HCALL_BAD) /* hypervisor software trap */
376 TRAP_NOALIGN(tt0_183, HCALL(MMU_MAP_ADDR_IDX)) /* hyperfast trap */
377 TRAP_NOALIGN(tt0_184, HCALL(MMU_UNMAP_ADDR_IDX)) /* hyperfast trap */
378 TRAP_NOALIGN(tt0_185, HCALL(TTRACE_ADDENTRY_IDX)) /* hyperfast trap */
379 TRAP(tt0_186, HCALL_BAD) /* hypervisor software trap */
380 TRAP(tt0_187, HCALL_BAD) /* hypervisor software trap */
381 TRAP(tt0_188, HCALL_BAD) /* hypervisor software trap */
382 TRAP(tt0_189, HCALL_BAD) /* hypervisor software trap */
383 TRAP(tt0_18a, HCALL_BAD) /* hypervisor software trap */
384 TRAP(tt0_18b, HCALL_BAD) /* hypervisor software trap */
385 TRAP(tt0_18c, HCALL_BAD) /* hypervisor software trap */
386 TRAP(tt0_18d, HCALL_BAD) /* hypervisor software trap */
387 TRAP(tt0_18e, HCALL_BAD) /* hypervisor software trap */
388 TRAP(tt0_18f, HCALL_BAD) /* hypervisor software trap */
389 TRAP(tt0_190, HCALL_BAD) /* hypervisor software trap */
390 TRAP(tt0_191, HCALL_BAD) /* hypervisor software trap */
391 TRAP(tt0_192, HCALL_BAD) /* hypervisor software trap */
392 TRAP(tt0_193, HCALL_BAD) /* hypervisor software trap */
393 TRAP(tt0_194, HCALL_BAD) /* hypervisor software trap */
394 TRAP(tt0_195, HCALL_BAD) /* hypervisor software trap */
395 TRAP(tt0_196, HCALL_BAD) /* hypervisor software trap */
396 TRAP(tt0_197, HCALL_BAD) /* hypervisor software trap */
397 TRAP(tt0_198, HCALL_BAD) /* hypervisor software trap */
398 TRAP(tt0_199, HCALL_BAD) /* hypervisor software trap */
399 TRAP(tt0_19a, HCALL_BAD) /* hypervisor software trap */
400 TRAP(tt0_19b, HCALL_BAD) /* hypervisor software trap */
401 TRAP(tt0_19c, HCALL_BAD) /* hypervisor software trap */
402 TRAP(tt0_19d, HCALL_BAD) /* hypervisor software trap */
403 TRAP(tt0_19e, HCALL_BAD) /* hypervisor software trap */
404 TRAP(tt0_19f, HCALL_BAD) /* hypervisor software trap */
405 TRAP(tt0_1a0, HCALL_BAD) /* hypervisor software trap */
406 TRAP(tt0_1a1, HCALL_BAD) /* hypervisor software trap */
407 TRAP(tt0_1a2, HCALL_BAD) /* hypervisor software trap */
408 TRAP(tt0_1a3, HCALL_BAD) /* hypervisor software trap */
409 TRAP(tt0_1a4, HCALL_BAD) /* hypervisor software trap */
410 TRAP(tt0_1a5, HCALL_BAD) /* hypervisor software trap */
411 TRAP(tt0_1a6, HCALL_BAD) /* hypervisor software trap */
412 TRAP(tt0_1a7, HCALL_BAD) /* hypervisor software trap */
413 TRAP(tt0_1a8, HCALL_BAD) /* hypervisor software trap */
414 TRAP(tt0_1a9, HCALL_BAD) /* hypervisor software trap */
415 TRAP(tt0_1aa, HCALL_BAD) /* hypervisor software trap */
416 TRAP(tt0_1ab, HCALL_BAD) /* hypervisor software trap */
417 TRAP(tt0_1ac, HCALL_BAD) /* hypervisor software trap */
418 TRAP(tt0_1ad, HCALL_BAD) /* hypervisor software trap */
419 TRAP(tt0_1ae, HCALL_BAD) /* hypervisor software trap */
420 TRAP(tt0_1af, HCALL_BAD) /* hypervisor software trap */
421 TRAP(tt0_1b0, HCALL_BAD) /* hypervisor software trap */
422 TRAP(tt0_1b1, HCALL_BAD) /* hypervisor software trap */
423 TRAP(tt0_1b2, HCALL_BAD) /* hypervisor software trap */
424 TRAP(tt0_1b3, HCALL_BAD) /* hypervisor software trap */
425 TRAP(tt0_1b4, HCALL_BAD) /* hypervisor software trap */
426 TRAP(tt0_1b5, HCALL_BAD) /* hypervisor software trap */
427 TRAP(tt0_1b6, HCALL_BAD) /* hypervisor software trap */
428 TRAP(tt0_1b7, HCALL_BAD) /* hypervisor software trap */
429 TRAP(tt0_1b8, HCALL_BAD) /* hypervisor software trap */
430 TRAP(tt0_1b9, HCALL_BAD) /* hypervisor software trap */
431 TRAP(tt0_1ba, HCALL_BAD) /* hypervisor software trap */
432 TRAP(tt0_1bb, HCALL_BAD) /* hypervisor software trap */
433 TRAP(tt0_1bc, HCALL_BAD) /* hypervisor software trap */
434 TRAP(tt0_1bd, HCALL_BAD) /* hypervisor software trap */
435 TRAP(tt0_1be, HCALL_BAD) /* hypervisor software trap */
436 TRAP(tt0_1bf, HCALL_BAD) /* hypervisor software trap */
437 TRAP(tt0_1c0, HCALL_BAD) /* hypervisor software trap */
438 TRAP(tt0_1c1, HCALL_BAD) /* hypervisor software trap */
439 TRAP(tt0_1c2, HCALL_BAD) /* hypervisor software trap */
440 TRAP(tt0_1c3, HCALL_BAD) /* hypervisor software trap */
441 TRAP(tt0_1c4, HCALL_BAD) /* hypervisor software trap */
442 TRAP(tt0_1c5, HCALL_BAD) /* hypervisor software trap */
443 TRAP(tt0_1c6, HCALL_BAD) /* hypervisor software trap */
444 TRAP(tt0_1c7, HCALL_BAD) /* hypervisor software trap */
445 TRAP(tt0_1c8, HCALL_BAD) /* hypervisor software trap */
446 TRAP(tt0_1c9, HCALL_BAD) /* hypervisor software trap */
447 TRAP(tt0_1ca, HCALL_BAD) /* hypervisor software trap */
448 TRAP(tt0_1cb, HCALL_BAD) /* hypervisor software trap */
449 TRAP(tt0_1cc, HCALL_BAD) /* hypervisor software trap */
450 TRAP(tt0_1cd, HCALL_BAD) /* hypervisor software trap */
451 TRAP(tt0_1ce, HCALL_BAD) /* hypervisor software trap */
452 TRAP(tt0_1cf, HCALL_BAD) /* hypervisor software trap */
453 TRAP(tt0_1d0, HCALL_BAD) /* hypervisor software trap */
454 TRAP(tt0_1d1, HCALL_BAD) /* hypervisor software trap */
455 TRAP(tt0_1d2, HCALL_BAD) /* hypervisor software trap */
456 TRAP(tt0_1d3, HCALL_BAD) /* hypervisor software trap */
457 TRAP(tt0_1d4, HCALL_BAD) /* hypervisor software trap */
458 TRAP(tt0_1d5, HCALL_BAD) /* hypervisor software trap */
459 TRAP(tt0_1d6, HCALL_BAD) /* hypervisor software trap */
460 TRAP(tt0_1d7, HCALL_BAD) /* hypervisor software trap */
461 TRAP(tt0_1d8, HCALL_BAD) /* hypervisor software trap */
462 TRAP(tt0_1d9, HCALL_BAD) /* hypervisor software trap */
463 TRAP(tt0_1da, HCALL_BAD) /* hypervisor software trap */
464 TRAP(tt0_1db, HCALL_BAD) /* hypervisor software trap */
465 TRAP(tt0_1dc, HCALL_BAD) /* hypervisor software trap */
466 TRAP(tt0_1dd, HCALL_BAD) /* hypervisor software trap */
467 TRAP(tt0_1de, HCALL_BAD) /* hypervisor software trap */
468 TRAP(tt0_1df, HCALL_BAD) /* hypervisor software trap */
469 TRAP(tt0_1e0, HCALL_BAD) /* hypervisor software trap */
470 TRAP(tt0_1e1, HCALL_BAD) /* hypervisor software trap */
471 TRAP(tt0_1e2, HCALL_BAD) /* hypervisor software trap */
472 TRAP(tt0_1e3, HCALL_BAD) /* hypervisor software trap */
473 TRAP(tt0_1e4, HCALL_BAD) /* hypervisor software trap */
474 TRAP(tt0_1e5, HCALL_BAD) /* hypervisor software trap */
475 TRAP(tt0_1e6, HCALL_BAD) /* hypervisor software trap */
476 TRAP(tt0_1e7, HCALL_BAD) /* hypervisor software trap */
477 TRAP(tt0_1e8, HCALL_BAD) /* hypervisor software trap */
478 TRAP(tt0_1e9, HCALL_BAD) /* hypervisor software trap */
479 TRAP(tt0_1ea, HCALL_BAD) /* hypervisor software trap */
480 TRAP(tt0_1eb, HCALL_BAD) /* hypervisor software trap */
481 TRAP(tt0_1ec, HCALL_BAD) /* hypervisor software trap */
482 TRAP(tt0_1ed, HCALL_BAD) /* hypervisor software trap */
483 TRAP(tt0_1ee, HCALL_BAD) /* hypervisor software trap */
484 TRAP(tt0_1ef, HCALL_BAD) /* hypervisor software trap */
485 TRAP(tt0_1f0, HCALL_BAD) /* hypervisor software trap */
486 TRAP(tt0_1f1, HCALL_BAD) /* hypervisor software trap */
487 TRAP(tt0_1f2, HCALL_BAD) /* hypervisor software trap */
488 TRAP(tt0_1f3, HCALL_BAD) /* hypervisor software trap */
489 TRAP(tt0_1f4, HCALL_BAD) /* hypervisor software trap */
490 TRAP(tt0_1f5, HCALL_BAD) /* hypervisor software trap */
491 TRAP(tt0_1f6, HCALL_BAD) /* hypervisor software trap */
492 TRAP(tt0_1f7, HCALL_BAD) /* hypervisor software trap */
493 TRAP(tt0_1f8, HCALL_BAD) /* hypervisor software trap */
494 TRAP(tt0_1f9, HCALL_BAD) /* hypervisor software trap */
495 TRAP(tt0_1fa, HCALL_BAD) /* hypervisor software trap */
496 TRAP(tt0_1fb, HCALL_BAD) /* hypervisor software trap */
497 TRAP(tt0_1fc, HCALL_BAD) /* hypervisor software trap */
498 TRAP(tt0_1fd, HCALL_BAD) /* hypervisor software trap */
499 TRAP(tt0_1fe, HCALL_BAD) /* hypervisor software trap */
500 TRAP(tt0_1ff, GOTO(hcall_core)) /* hypervisor software trap */
501ehtraptable:
502 SET_SIZE(htraptable)
503
504/*
505 * Sparc V9 TBA registers require that bits 14 through 0 must be zero.
506 * Ensure the trap tracing table is aligned on a TRAPTABLE_SIZE boundry.
507 * For additional information, refer to:
508 * "The SPARC Architecture Manual", Version 9,
509 * Section 5.2.8 "Trap Base Address (TBA)"
510 *
511 * There should be nothing in the .text segment between ehtraptable
512 * and htraptracetable.
513 */
514 ENTRY(htraptracetable)
515 TTRACE_TRAP_TABLE
516ehtraptracetable:
517 SET_SIZE(htraptracetable)
518
519
520/*
521 * revector - revector a trap to the guest as if the guest received
522 * it directly
523 *
524 * %g1 - new trap type for guest
525 */
526 ENTRY_NP(revector)
527 rdhpr %htstate, %g2
528 btst HTSTATE_HPRIV, %g2
529 bnz,pn %xcc, badtrap
530 .empty
531
532 rdpr %tba, %g2
533 wrpr %g1, %tt
534 sllx %g1, 5, %g1
535 add %g1, %g2, %g1
536 !! %g1 tba offset to branch to in tt0
537
538 rdpr %tl, %g3
539 cmp %g3, MAXPTL
540 bgu,pn %xcc, watchdog_guest
541 sub %g3, 1, %g2 ! %g3 is either 1 or 2
542 sllx %g2, 14, %g2
543 !! %g2 tt1 offset for trap vector for traps at tl>0
544
545 add %g1, %g2, %g1
546
547 TRAP_GUEST(%g1, %g2, %g3)
548 /*NOTREACHED*/
549 SET_SIZE(revector)
550
551 ENTRY_NP(watchdog_guest)
552#ifdef DEBUG_LEGION /* { */
553 LEGION_GOT_HERE
554 STRAND_STRUCT(%g1)
555
556 ! Save some locals so we can use them while moving around
557 ! the trap levels
558 stx %l0, [%g1 + STRAND_SCR0]
559 stx %l1, [%g1 + STRAND_SCR1]
560 stx %l2, [%g1 + STRAND_SCR2]
561 stx %l3, [%g1 + STRAND_SCR3]
562 mov %g1, %l0
563
564 ! Save current %tl and %gl
565 rdpr %tl, %l2
566 set STRAND_FAIL_TL, %l1
567 stx %l2, [%l0 + %l1]
568 rdpr %gl, %l2
569 set STRAND_FAIL_GL, %l1
570 stx %l2, [%l0 + %l1]
571
572 ! for each %tl 1..%tl
573 set STRAND_FAIL_TRAPSTATE, %l1
574 add %l0, %l1, %l1
575 rdpr %tl, %l2
576 sub %l2, 1, %l3 ! tl - 1
577 mulx %l3, TRAPSTATE_SIZE, %l3
578 add %l1, %l3, %l1 ! %l1 pointer to current trapstate
5791: wrpr %l2, %tl ! %l2 current tl
580 rdhpr %htstate, %l3
581 stx %l3, [%l1 + TRAPSTATE_HTSTATE]
582 rdpr %tstate, %l3
583 stx %l3, [%l1 + TRAPSTATE_TSTATE]
584 rdpr %tt, %l3
585 stx %l3, [%l1 + TRAPSTATE_TT]
586 rdpr %tpc, %l3
587 stx %l3, [%l1 + TRAPSTATE_TPC]
588 rdpr %tnpc, %l3
589 stx %l3, [%l1 + TRAPSTATE_TNPC]
590 deccc %l2
591 bnz,pt %xcc, 1b
592 dec TRAPSTATE_SIZE, %l1
593
594 ! for each %gl 0..%gl-1
595 set STRAND_FAIL_TRAPGLOBALS, %l1
596 add %l0, %l1, %l1
597 rdpr %gl, %l2
598 dec %l2 ! gl - 1
599 mulx %l2, TRAPGLOBALS_SIZE, %l3
600 add %l1, %l3, %l1 ! %l1 pointer to current trapglobals
6011: wrpr %l2, %gl ! %l2 current gl
602 stx %g0, [%l1 + 0x00]
603 stx %g1, [%l1 + 0x08]
604 stx %g2, [%l1 + 0x10]
605 stx %g3, [%l1 + 0x18]
606 stx %g4, [%l1 + 0x20]
607 stx %g5, [%l1 + 0x28]
608 stx %g6, [%l1 + 0x30]
609 stx %g7, [%l1 + 0x38]
610 deccc %l2
611 bge,pt %xcc, 1b
612 dec TRAPGLOBALS_SIZE, %l1
613
614 ! Restore state
615 set STRAND_FAIL_TL, %l1
616 ldx [%l0 + %l1], %l2
617 wrpr %l2, %tl
618 set STRAND_FAIL_GL, %l1
619 ldx [%l0 + %l1], %l2
620 wrpr %l2, %gl
621
622 DEBUG_SPINLOCK_ENTER(%g1, %g2, %g3)
623
624 HV_PRINT_NOTRAP("WATCHDOG: strandid: ")
625 ldub [%l0 + STRAND_ID], %g1
626 HV_PRINTX_NOTRAP(%g1)
627
628 HV_PRINT_NOTRAP(" tl: ")
629 rdpr %tl, %g1
630 HV_PRINTX_NOTRAP(%g1)
631
632 HV_PRINT_NOTRAP(" tt: ")
633 rdpr %tt, %g1
634 HV_PRINTX_NOTRAP(%g1)
635
636 HV_PRINT_NOTRAP(" gl: ")
637 rdpr %gl, %g1
638 HV_PRINTX_NOTRAP(%g1)
639 HV_PRINT_NOTRAP("\r\n")
640
641 HV_PRINT_NOTRAP(" trap state:\r\n");
642 set STRAND_FAIL_TRAPSTATE, %l1
643 add %l0, %l1, %l1
644 rdpr %tl, %l2
645 mov 1, %l3
6461:
647 HV_PRINT_NOTRAP(" tl: ");
648 mov %l3, %g1
649 HV_PRINTX_NOTRAP(%g1)
650
651 HV_PRINT_NOTRAP(" tt: ");
652 ldx [%l1 + TRAPSTATE_TT], %g1
653 HV_PRINTX_NOTRAP(%g1)
654
655 HV_PRINT_NOTRAP(" htstate: ");
656 ldx [%l1 + TRAPSTATE_HTSTATE], %g1
657 HV_PRINTX_NOTRAP(%g1)
658
659 HV_PRINT_NOTRAP(" tstate: ");
660 ldx [%l1 + TRAPSTATE_TSTATE], %g1
661 HV_PRINTX_NOTRAP(%g1)
662
663 HV_PRINT_NOTRAP("\r\n tpc: ");
664 ldx [%l1 + TRAPSTATE_TPC], %g1
665 HV_PRINTX_NOTRAP(%g1)
666
667 HV_PRINT_NOTRAP(" tnpc: ");
668 ldx [%l1 + TRAPSTATE_TNPC], %g1
669 HV_PRINTX_NOTRAP(%g1)
670 HV_PRINT_NOTRAP("\r\n");
671 inc %l3
672 cmp %l3, %l2
673 bleu,pt %xcc, 1b
674 inc TRAPSTATE_SIZE, %l1
675
676 HV_PRINT_NOTRAP(" trap globals:\r\n");
677 set STRAND_FAIL_TRAPGLOBALS, %l1
678 add %l0, %l1, %l1
679 rdpr %gl, %l2
680 mov 0, %l3
6811:
682 HV_PRINT_NOTRAP(" gl: ");
683 HV_PRINTX_NOTRAP(%l3)
684
685 HV_PRINT_NOTRAP("\r\n");
686 HV_PRINT_NOTRAP(" %g0-%g3: ");
687 ldx [%l1 + 0x00], %g1
688 HV_PRINTX_NOTRAP(%g1)
689 HV_PRINT_NOTRAP(" ");
690 ldx [%l1 + 0x08], %g1
691 HV_PRINTX_NOTRAP(%g1)
692 HV_PRINT_NOTRAP(" ");
693 ldx [%l1 + 0x10], %g1
694 HV_PRINTX_NOTRAP(%g1)
695 HV_PRINT_NOTRAP(" ");
696 ldx [%l1 + 0x18], %g1
697 HV_PRINTX_NOTRAP(%g1)
698 HV_PRINT_NOTRAP("\r\n");
699 HV_PRINT_NOTRAP(" %g4-%g7: ");
700 ldx [%l1 + 0x20], %g1
701 HV_PRINTX_NOTRAP(%g1)
702 HV_PRINT_NOTRAP(" ");
703 ldx [%l1 + 0x28], %g1
704 HV_PRINTX_NOTRAP(%g1)
705 HV_PRINT_NOTRAP(" ");
706 ldx [%l1 + 0x30], %g1
707 HV_PRINTX_NOTRAP(%g1)
708 HV_PRINT_NOTRAP(" ");
709 ldx [%l1 + 0x38], %g1
710 HV_PRINTX_NOTRAP(%g1)
711 HV_PRINT_NOTRAP("\r\n");
712 inc %l3
713 cmp %l3, %l2
714 blu,pt %xcc, 1b
715 inc TRAPGLOBALS_SIZE, %l1
716
717 HV_PRINT_NOTRAP("\r\n current window:\r\n");
718 HV_PRINT_NOTRAP(" %o0-%o3: ");
719 mov %o0, %g1
720 HV_PRINTX_NOTRAP(%g1)
721 HV_PRINT_NOTRAP(" ");
722 mov %o1, %g1
723 HV_PRINTX_NOTRAP(%g1)
724 HV_PRINT_NOTRAP(" ");
725 mov %o2, %g1
726 HV_PRINTX_NOTRAP(%g1)
727 HV_PRINT_NOTRAP(" ");
728 mov %o3, %g1
729 HV_PRINTX_NOTRAP(%g1)
730 HV_PRINT_NOTRAP("\r\n");
731 HV_PRINT_NOTRAP(" %o4-%o7: ");
732 mov %o4, %g1
733 HV_PRINTX_NOTRAP(%g1)
734 HV_PRINT_NOTRAP(" ");
735 mov %o5, %g1
736 HV_PRINTX_NOTRAP(%g1)
737 HV_PRINT_NOTRAP(" ");
738 mov %o6, %g1
739 HV_PRINTX_NOTRAP(%g1)
740 HV_PRINT_NOTRAP(" ");
741 mov %o7, %g1
742 HV_PRINTX_NOTRAP(%g1)
743 HV_PRINT_NOTRAP("\r\n");
744
745 HV_PRINT_NOTRAP("rtba: ")
746 VCPU_STRUCT(%g1)
747 ldx [%g1 + CPU_RTBA], %g1
748 HV_PRINTX_NOTRAP(%g1)
749 HV_PRINT_NOTRAP("\r\n");
750
751 DEBUG_SPINLOCK_EXIT(%g1)
752
753 ! Restore saved locals
754 ldx [%l0 + STRAND_SCR3], %l3
755 ldx [%l0 + STRAND_SCR2], %l2
756 ldx [%l0 + STRAND_SCR1], %l1
757 ldx [%l0 + STRAND_SCR0], %l0
758#endif /* } DEBUG_LEGION */
759
760 ! Disable MMU
761 ldxa [%g0]ASI_LSUCR, %g1
762 set (LSUCR_DM | LSUCR_IM), %g2
763 andn %g1, %g2, %g1 ! disable MMU
764 stxa %g1, [%g0]ASI_LSUCR
765
766 ! Get real-mode trap table base address
767 VCPU_STRUCT(%g3)
768 ldx [%g3 + CPU_RTBA], %g3
769 add %g3, (TT_WDR << TT_OFFSET_SHIFT), %g3
770
771 ! cache TT, TSTATE for when TL is changed
772 rdpr %tt, %g5
773 rdpr %tstate, %g6
774
775 /*
776 * We will enter the guests WDR handler at MAXPTL
777 */
778 wrpr %g0, MAXPTL, %tl
779
780 ! reset TT, TSTATE for TL = MAXPTL
781 wrpr %g5, %tt
782 wrpr %g6, %tstate
783
784 mov %g3, %o0 ! clobbering %o0, can't use a global as GL changes
785 wrpr %g0, MAXPGL, %gl
786
787 ! %o0 Guest WDR PC
788 TRAP_GUEST(%o0, %g1, %g2)
789
790 /*NOTREACHED*/
791 SET_SIZE(watchdog_guest)
792
793
794 ! ttrace_generic
795 ! General purpose trap trace routine.
796 !
797 ! Records state. (See traptrace.h for details.)
798 ! Variable Fields:
799 ! All fields are zeroed.
800 !
801 ! Expects: %g7 to contain PC of trap table entry
802 !
803 ENTRY_NP(ttrace_generic)
804 TTRACE_PTR(%g1, %g2, 1f, 1f)
805 TTRACE_STATE(%g2, TTRACE_TYPE_HV, %g3, %g4)
806 sth %g0, [%g2 + TTRACE_ENTRY_TAG]
807 stx %g0, [%g2 + TTRACE_ENTRY_F1]
808 stx %g0, [%g2 + TTRACE_ENTRY_F2]
809 stx %g0, [%g2 + TTRACE_ENTRY_F3]
810 stx %g0, [%g2 + TTRACE_ENTRY_F4]
811 TTRACE_NEXT(%g2, %g3, %g4, %g5)
8121: TTRACE_EXIT(%g7, %g1)
813 SET_SIZE(ttrace_generic)
814
815 ! ttrace_dmmu
816 ! Traces data mmu exceptions.
817 !
818 ! Records state. (See traptrace.h for details.)
819 ! Variable Fields:
820 ! F1 = DMMU SFSR
821 !
822 ! Expects: %g7 to contain PC of trap table entry
823 !
824 ENTRY_NP(ttrace_dmmu)
825 TTRACE_PTR(%g1, %g2, 1f, 1f)
826 TTRACE_STATE(%g2, TTRACE_TYPE_HV, %g3, %g4)
827 sth %g0, [%g2 + TTRACE_ENTRY_TAG]
828 mov MMU_SFSR, %g4
829 ldxa [%g4]ASI_DMMU, %g4
830 stx %g4, [%g2 + TTRACE_ENTRY_F1]
831 stx %g0, [%g2 + TTRACE_ENTRY_F2]
832 stx %g0, [%g2 + TTRACE_ENTRY_F3]
833 stx %g0, [%g2 + TTRACE_ENTRY_F4]
834 TTRACE_NEXT(%g2, %g3, %g4, %g5)
8351: TTRACE_EXIT(%g7, %g1)
836 SET_SIZE(ttrace_dmmu)
837
838 ! ttrace_hcall
839 ! Traces hypervisor call traps.
840 !
841 ! Records state. (See traptrace.h for details.)
842 ! Variable Fields:
843 ! TAG = %o5, Hypervisor Call Number
844 ! F1 = %o0, Argument 0
845 ! F2 = %o1, Argument 1
846 ! F3 = %o2, Argument 2
847 ! F4 = %o3, Argument 3
848 !
849 ! Expects: %g7 to contain PC of trap table entry
850 !
851 ENTRY_NP(ttrace_hcall)
852 TTRACE_PTR(%g1, %g2, 1f, 1f)
853 TTRACE_STATE(%g2, TTRACE_TYPE_HV, %g3, %g4)
854 sth %o5, [%g2 + TTRACE_ENTRY_TAG]
855 stx %o0, [%g2 + TTRACE_ENTRY_F1]
856 stx %o1, [%g2 + TTRACE_ENTRY_F2]
857 stx %o2, [%g2 + TTRACE_ENTRY_F3]
858 stx %o3, [%g2 + TTRACE_ENTRY_F4]
859 TTRACE_NEXT(%g2, %g3, %g4, %g5)
8601: TTRACE_EXIT(%g7, %g1)
861 SET_SIZE(ttrace_hcall)
862
863 ! ttrace_mmu_map
864 ! Traces mmu map traps.
865 !
866 ! Records state. (See traptrace.h for details.)
867 ! Variable Fields:
868 ! F1 = vaddr
869 ! F2 = ctx
870 ! F3 = TTE
871 ! F4 = flags
872 !
873 ! Expects: %g7 to contain PC of trap table entry
874 !
875 ENTRY_NP(ttrace_mmu_map)
876 TTRACE_PTR(%g1, %g2, 1f, 1f)
877 TTRACE_STATE(%g2, TTRACE_TYPE_HV, %g3, %g4)
878 sth %g0, [%g2 + TTRACE_ENTRY_TAG]
879 stx %o0, [%g2 + TTRACE_ENTRY_F1]
880 stx %o1, [%g2 + TTRACE_ENTRY_F2]
881 stx %o2, [%g2 + TTRACE_ENTRY_F3]
882 stx %o3, [%g2 + TTRACE_ENTRY_F4]
883 TTRACE_NEXT(%g2, %g3, %g4, %g5)
8841: TTRACE_EXIT(%g7, %g1)
885 SET_SIZE(ttrace_mmu_map)
886
887 ! ttrace_mmu_unmap
888 ! Traces MMU Unmap traps.
889 !
890 ! Records state. (See traptrace.h for details.)
891 ! Variable Fields:
892 ! F1 = vaddr
893 ! F2 = ctx
894 ! F3 = flags
895 !
896 ! Expects: %g7 to contain PC of trap table entry
897 !
898 ENTRY_NP(ttrace_mmu_unmap)
899 TTRACE_PTR(%g1, %g2, 1f, 1f)
900 TTRACE_STATE(%g2, TTRACE_TYPE_HV, %g3, %g4)
901 sth %g0, [%g2 + TTRACE_ENTRY_TAG]
902 stx %o0, [%g2 + TTRACE_ENTRY_F1]
903 stx %o1, [%g2 + TTRACE_ENTRY_F2]
904 stx %o2, [%g2 + TTRACE_ENTRY_F3]
905 stx %g0, [%g2 + TTRACE_ENTRY_F4]
906 TTRACE_NEXT(%g2, %g3, %g4, %g5)
9071: TTRACE_EXIT(%g7, %g1)
908 SET_SIZE(ttrace_mmu_unmap)
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