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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * Hypervisor Software File: fpga.h | |
5 | * | |
6 | * Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved. | |
7 | * | |
8 | * - Do no alter or remove copyright notices | |
9 | * | |
10 | * - Redistribution and use of this software in source and binary forms, with | |
11 | * or without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistribution of source code must retain the above copyright notice, | |
15 | * this list of conditions and the following disclaimer. | |
16 | * | |
17 | * - Redistribution in binary form must reproduce the above copyright notice, | |
18 | * this list of conditions and the following disclaimer in the | |
19 | * documentation and/or other materials provided with the distribution. | |
20 | * | |
21 | * Neither the name of Sun Microsystems, Inc. or the names of contributors | |
22 | * may be used to endorse or promote products derived from this software | |
23 | * without specific prior written permission. | |
24 | * | |
25 | * This software is provided "AS IS," without a warranty of any kind. | |
26 | * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, | |
27 | * INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A | |
28 | * PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN | |
29 | * MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR | |
30 | * ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR | |
31 | * DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN | |
32 | * OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR | |
33 | * FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE | |
34 | * DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY, | |
35 | * ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF | |
36 | * SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. | |
37 | * | |
38 | * You acknowledge that this software is not designed, licensed or | |
39 | * intended for use in the design, construction, operation or maintenance of | |
40 | * any nuclear facility. | |
41 | * | |
42 | * ========== Copyright Header End ============================================ | |
43 | */ | |
44 | /* | |
45 | * Copyright 2007 Sun Microsystems, Inc. All rights reserved. | |
46 | * Use is subject to license terms. | |
47 | */ | |
48 | ||
49 | #ifndef _NIAGARA_PLATFORM_FPGA_H_ | |
50 | #define _NIAGARA_PLATFORM_FPGA_H_ | |
51 | ||
52 | #pragma ident "@(#)fpga.h 1.2 07/05/04 SMI" | |
53 | ||
54 | #ifdef __cplusplus | |
55 | extern "C" { | |
56 | #endif | |
57 | ||
58 | #define HOST_REGS_BASE(x) (FPGA_BASE + (MByte(12) + (x))) | |
59 | #define FPGA_SRAM_BASE MByte(8) | |
60 | #define FPGA_INTR_BASE HOST_REGS_BASE(0x0a000) | |
61 | ||
62 | #define UART_CLOCK_MULTIPLIER 8 /* For Niagara FPGA */ | |
63 | #define FPGA_UART_BASE (FPGA_BASE + 0xc2c000) | |
64 | ||
65 | /* mbox/queue offsets */ | |
66 | #define FPGA_Q_SEND 0x19 | |
67 | #define FPGA_Q_STATUS 0x21 | |
68 | ||
69 | /* Interrupt control */ | |
70 | #define FPGA_MBOX_INTR_STATUS 0x1 | |
71 | #define FPGA_MBOX_INTR_ENABLE 0x9 | |
72 | #define FPGA_MBOX_INTR_DISABLE 0x11 | |
73 | ||
74 | /* BEGIN CSTYLED */ | |
75 | #define FPGA_CLEAR_LDC_INTERRUPTS(scr1, scr2) \ | |
76 | setx FPGA_LDCOUT_BASE, scr1, scr2 ;\ | |
77 | ldub [scr2 + FPGA_Q_STATUS], scr1 ;\ | |
78 | stub scr1, [scr2 + FPGA_Q_STATUS] | |
79 | /* END CSTYLED */ | |
80 | ||
81 | #ifdef __cplusplus | |
82 | } | |
83 | #endif | |
84 | ||
85 | #endif /* _NIAGARA_PLATFORM_FPGA_H_ */ |