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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * Hypervisor Software File: hprivregs.h | |
5 | * | |
6 | * Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved. | |
7 | * | |
8 | * - Do no alter or remove copyright notices | |
9 | * | |
10 | * - Redistribution and use of this software in source and binary forms, with | |
11 | * or without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistribution of source code must retain the above copyright notice, | |
15 | * this list of conditions and the following disclaimer. | |
16 | * | |
17 | * - Redistribution in binary form must reproduce the above copyright notice, | |
18 | * this list of conditions and the following disclaimer in the | |
19 | * documentation and/or other materials provided with the distribution. | |
20 | * | |
21 | * Neither the name of Sun Microsystems, Inc. or the names of contributors | |
22 | * may be used to endorse or promote products derived from this software | |
23 | * without specific prior written permission. | |
24 | * | |
25 | * This software is provided "AS IS," without a warranty of any kind. | |
26 | * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, | |
27 | * INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A | |
28 | * PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN | |
29 | * MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR | |
30 | * ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR | |
31 | * DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN | |
32 | * OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR | |
33 | * FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE | |
34 | * DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY, | |
35 | * ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF | |
36 | * SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. | |
37 | * | |
38 | * You acknowledge that this software is not designed, licensed or | |
39 | * intended for use in the design, construction, operation or maintenance of | |
40 | * any nuclear facility. | |
41 | * | |
42 | * ========== Copyright Header End ============================================ | |
43 | */ | |
44 | /* | |
45 | * Copyright 2007 Sun Microsystems, Inc. All rights reserved. | |
46 | * Use is subject to license terms. | |
47 | */ | |
48 | ||
49 | #ifndef _PLATFORM_HPRIVREGS_H | |
50 | #define _PLATFORM_HPRIVREGS_H | |
51 | ||
52 | #pragma ident "@(#)hprivregs.h 1.1 07/05/03 SMI" | |
53 | ||
54 | #ifdef __cplusplus | |
55 | extern "C" { | |
56 | #endif | |
57 | ||
58 | /* | |
59 | * Maximum number of ASI_QUEUE queue entries | |
60 | */ | |
61 | #define MAX_QUEUE_ENTRIES 256 | |
62 | ||
63 | /* | |
64 | * Strand Status Register | |
65 | */ | |
66 | #define STR_STATUS_REG %asr26 | |
67 | ||
68 | #define STR_STATUS_STRAND_ACTIVE 1 | |
69 | #define STR_STATUS_STRAND_ID_SHIFT 8 | |
70 | #define STR_STATUS_STRAND_ID_MASK 0x3 | |
71 | #define STR_STATUS_CORE_ID_SHIFT 10 | |
72 | #define STR_STATUS_CORE_ID_MASK 0x7 | |
73 | ||
74 | #define STR_STATUS_CPU_ID_SHIFT STR_STATUS_STRAND_ID_SHIFT | |
75 | #define STR_STATUS_CPU_ID_MASK 0x1f | |
76 | ||
77 | #define HPSTATE_GUEST (HPSTATE_ENB) | |
78 | #define HTSTATE_GUEST (HPSTATE_GUEST) | |
79 | ||
80 | /* | |
81 | * TLB DATA IN ASI VA bits | |
82 | * (ASI_DTLB_DATA_IN/ASI_ITLB_DATA_IN) | |
83 | */ | |
84 | #define TLB_IN_4V_FORMAT (1 << 10) | |
85 | #define TLB_IN_REAL (1 << 9) | |
86 | ||
87 | /* | |
88 | * IDLE_ALL_STRAND | |
89 | * | |
90 | * Sends interrupt IDLE to all strands whose bit is set in CONFIG_STACTIVE, | |
91 | * excluding the executing one. CONFIG_STACTIVE, CONFIG_STIDLE are | |
92 | * updated. | |
93 | * | |
94 | * Delay Slot: no | |
95 | */ | |
96 | /* BEGIN CSTYLED */ | |
97 | #define IDLE_ALL_STRAND(strand, scr1, scr2, scr3, scr4) \ | |
98 | ldx [strand + STRAND_CONFIGP], scr1 /* ->config*/ ;\ | |
99 | add scr1, CONFIG_STACTIVE, scr3 /* ->active mask */ ;\ | |
100 | add scr1, CONFIG_STIDLE, scr4 /* ->idle mask */ ;\ | |
101 | INT_VEC_DSPCH_ALL(INT_VEC_DIS_TYPE_IDLE, scr3, scr4, scr1, scr2) | |
102 | /* END CSTYLED */ | |
103 | ||
104 | /* | |
105 | * RESUME_ALL_STRAND | |
106 | * | |
107 | * Sends interrupt RESUME to all strands whose bit is set in CONFIG_STIDLE, | |
108 | * excluding the executing one. CONFIG_STACTIVE, CONFIG_STIDLE are | |
109 | * updated. | |
110 | * | |
111 | * Delay Slot: no | |
112 | */ | |
113 | /* BEGIN CSTYLED */ | |
114 | #define RESUME_ALL_STRAND(strand, scr1, scr2, scr3, scr4) \ | |
115 | ldx [strand + STRAND_CONFIGP], scr1 /* ->config*/ ;\ | |
116 | add scr1, CONFIG_STIDLE, scr3 /* ->idle mask */ ;\ | |
117 | add scr1, CONFIG_STACTIVE, scr4 /* ->active mask */ ;\ | |
118 | INT_VEC_DSPCH_ALL(INT_VEC_DIS_TYPE_RESUME, scr3, scr4, scr1, scr2) | |
119 | /* END CSTYLED */ | |
120 | ||
121 | #ifdef __cplusplus | |
122 | } | |
123 | #endif | |
124 | ||
125 | #endif /* _PLATFORM_HPRIVREGS_H */ |