Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / hypervisor / src / include / sun4v / mmu.h
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* Hypervisor Software File: mmu.h
5*
6* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
7*
8* - Do no alter or remove copyright notices
9*
10* - Redistribution and use of this software in source and binary forms, with
11* or without modification, are permitted provided that the following
12* conditions are met:
13*
14* - Redistribution of source code must retain the above copyright notice,
15* this list of conditions and the following disclaimer.
16*
17* - Redistribution in binary form must reproduce the above copyright notice,
18* this list of conditions and the following disclaimer in the
19* documentation and/or other materials provided with the distribution.
20*
21* Neither the name of Sun Microsystems, Inc. or the names of contributors
22* may be used to endorse or promote products derived from this software
23* without specific prior written permission.
24*
25* This software is provided "AS IS," without a warranty of any kind.
26* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES,
27* INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A
28* PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN
29* MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR
30* ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR
31* DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN
32* OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR
33* FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE
34* DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY,
35* ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF
36* SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
37*
38* You acknowledge that this software is not designed, licensed or
39* intended for use in the design, construction, operation or maintenance of
40* any nuclear facility.
41*
42* ========== Copyright Header End ============================================
43*/
44/*
45 * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
46 * Use is subject to license terms.
47 */
48
49#ifndef _SUN4V_MMU_H
50#define _SUN4V_MMU_H
51
52#pragma ident "@(#)mmu.h 1.13 07/05/03 SMI"
53
54#ifdef __cplusplus
55extern "C" {
56#endif
57
58/*
59 * sun4v tte tag
60 */
61#define TAG_CTX_SHIFT 48
62#define TAG_CTX_MASK 0x1fff
63#define TAG_VA_SHIFT 0
64#define TAG_VA_MASK 0x3fffff /* VA 63:22 */
65
66/*
67 * sun4v tte data
68 */
69#define TTE_V 0x8000000000000000
70#define TTE_NFO 0x4000000000000000
71#define TTE_RA_SHIFT 13
72#define TTE_IE 0x0000000000001000
73#define TTE_E 0x0000000000000800
74#define TTE_CP 0x0000000000000400
75#define TTE_CV 0x0000000000000200
76#define TTE_P 0x0000000000000100
77#define TTE_X 0x0000000000000080
78#define TTE_W 0x0000000000000040
79#define TTE_SOFT_SHIFT 4
80#define TTE_SOFT_MASK 0x3
81#define TTE_SZ_SHIFT 0
82#define TTE_SZ_MASK 0xf
83
84#define NPGSZ 8
85#define TSBE_BYTES 16 /* TSB entry bytes */
86#define TSBE_SHIFT 4 /* LOG2(TSBE_BYTES) */
87
88/*
89 * sun4v MMU fault status area
90 */
91#define MMU_FAULT_AREA_INSTR 0x00
92#define MMU_FAULT_AREA_DATA 0x40
93
94#define MMU_FAULT_AREA_FT 0x00
95#define MMU_FAULT_AREA_ADDR 0x08
96#define MMU_FAULT_AREA_CTX 0x10
97
98#define MMU_FAULT_AREA_IFT MMU_FAULT_AREA_INSTR + MMU_FAULT_AREA_FT
99#define MMU_FAULT_AREA_IADDR MMU_FAULT_AREA_INSTR + MMU_FAULT_AREA_ADDR
100#define MMU_FAULT_AREA_ICTX MMU_FAULT_AREA_INSTR + MMU_FAULT_AREA_CTX
101#define MMU_FAULT_AREA_DFT MMU_FAULT_AREA_DATA + MMU_FAULT_AREA_FT
102#define MMU_FAULT_AREA_DADDR MMU_FAULT_AREA_DATA + MMU_FAULT_AREA_ADDR
103#define MMU_FAULT_AREA_DCTX MMU_FAULT_AREA_DATA + MMU_FAULT_AREA_CTX
104
105#define MMU_FT_FASTMISS 0x1
106#define MMU_FT_FASTPROT 0x2
107#define MMU_FT_MISS 0x3
108#define MMU_FT_INVALIDRA 0x4
109#define MMU_FT_PRIV 0x5 /* access to priv page w/pstate.priv=0 */
110#define MMU_FT_PROT 0x6 /* store to !write, access of !exec */
111#define MMU_FT_NFO 0x7
112#define MMU_FT_SO 0x8
113#define MMU_FT_VARANGE 0x9
114#define MMU_FT_BADASI 0xa
115#define MMU_FT_NCATOMIC 0xb
116#define MMU_FT_PRIVACTION 0xc /* use of priv ASI when pstate.priv=0 */
117#define MMU_FT_WATCHPOINT 0xd
118#define MMU_FT_ALIGN 0xe
119#define MMU_FT_PAGESIZE 0xf
120#define MMU_FT_INVTSBENTRY 0x10
121#define MMU_FT_MULTIERR -1
122
123
124/*
125 * ASI_MMU registers
126 */
127#define MMU_PCONTEXT 0x8 /* primary context */
128#define MMU_SCONTEXT 0x10 /* secondary context */
129
130
131/*
132 * Returns pagesize encoded in tte. tte not modified.
133 * Illegal page sizes are handled without any extra checks.
134 *
135 * TTE_VALIDSIZEARRAY is defined in the cpu-specific <cpu>/mmu.h
136 *
137 * Pagesize is (1 << (13 + (n * 3)))
138 */
139/* BEGIN CSTYLED */
140#define TTE_SIZE(tte, size, scr, faillabel) \
141 mov TTE_VALIDSIZEARRAY, scr ;\
142 and tte, TTE_SZ_MASK, size ;\
143 srlx scr, size, scr ;\
144 btst 1, scr ;\
145 bz,pn %xcc, faillabel ;\
146 add size, size, scr ;\
147 add size, scr, size ;\
148 add size, 13, size ;\
149 mov 1, scr ;\
150 sllx scr, size, size
151/* END CSTYLED */
152
153
154/*
155 * Returns pageshift encoded in tte. tte not modified.
156 * Illegal page sizes are handled without any extra checks.
157 *
158 * Pageshift is (13 + (n * 3))
159 */
160/* BEGIN CSTYLED */
161#define TTE_SHIFT_NOCHECK(tte, shift, scr) \
162 and tte, TTE_SZ_MASK, shift ;\
163 add shift, shift, scr ;\
164 add shift, scr, shift ;\
165 add shift, 13, shift
166/* END CSTYLED */
167
168
169#ifdef __cplusplus
170}
171#endif
172
173#endif /* _SUN4V_MMU_H */