Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / hypervisor / src / include / sun4v / vpci.h
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* Hypervisor Software File: vpci.h
5*
6* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
7*
8* - Do no alter or remove copyright notices
9*
10* - Redistribution and use of this software in source and binary forms, with
11* or without modification, are permitted provided that the following
12* conditions are met:
13*
14* - Redistribution of source code must retain the above copyright notice,
15* this list of conditions and the following disclaimer.
16*
17* - Redistribution in binary form must reproduce the above copyright notice,
18* this list of conditions and the following disclaimer in the
19* documentation and/or other materials provided with the distribution.
20*
21* Neither the name of Sun Microsystems, Inc. or the names of contributors
22* may be used to endorse or promote products derived from this software
23* without specific prior written permission.
24*
25* This software is provided "AS IS," without a warranty of any kind.
26* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES,
27* INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A
28* PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN
29* MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR
30* ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR
31* DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN
32* OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR
33* FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE
34* DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY,
35* ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF
36* SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
37*
38* You acknowledge that this software is not designed, licensed or
39* intended for use in the design, construction, operation or maintenance of
40* any nuclear facility.
41*
42* ========== Copyright Header End ============================================
43*/
44/*
45 * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
46 * Use is subject to license terms.
47 */
48
49#ifndef _SUN4V_VPCI_H
50#define _SUN4V_VPCI_H
51
52#pragma ident "@(#)vpci.h 1.6 07/07/17 SMI"
53
54
55#ifdef __cplusplus
56extern "C" {
57#endif
58
59#define HVIO_TTE_R 0x00000001
60#define HVIO_TTE_W 0x00000002
61#define HVIO_TTE_ATTR_MASK 0x00000003
62
63#define HVIO_TTE_PP 0x00000030
64#define HVIO_TTE_L 0x00000004
65#define HVIO_TTE_BDF 0xffff0000
66#define HVIO_TTE_EXT_MASK 0xffff0034
67
68#define HVIO_TTE_PP_NONE 0x00000000
69#define HVIO_TTE_PP_2MSBS 0x00000020
70#define HVIO_TTE_PP_MSB 0x00000010
71#define HVIO_TTE_PP_ALL 0x00000030
72
73#define HVIO_TTE_PP_SHIFT 4
74#define HVIO_TTE_BDF_SHIFT 16
75
76#define HVIO_TTE_ATTR_MASK_V2 (HVIO_TTE_ATTR_MASK | HVIO_TTE_EXT_MASK)
77
78#define HVIO_IO_R 0x001
79#define HVIO_IO_W 0x002
80#define HVIO_IO_ATTR_MASK 0x003
81
82#define HVIO_MSI_INVALID 0
83#define HVIO_MSI_VALID 1
84#define HVIO_MSI_VALID_MAX_VALUE HVIO_MSI_VALID
85
86#define HVIO_PCIE_MSG_INVALID 0
87#define HVIO_PCIE_MSG_VALID 1
88#define HVIO_PCIE_MSG_VALID_MAX_VALUE HVIO_PCIE_MSG_VALID
89
90#define HVIO_MSISTATE_DELIVERED 1
91
92#define HVIO_MSIQSTATE_IDLE 0
93#define HVIO_MSIQSTATE_ERROR 1
94#define HVIO_MSIQSTATE_MAX_VALUE HVIO_MSIQSTATE_ERROR
95
96#define MSIQTYPE_32 0
97#define MSIQTYPE_64 1
98#define MSIQTYPE_MAX_VALUE MSIQTYPE_64
99
100#define MSIEQ_REC_SHIFT 6
101#define MSIEQ_REC_SIZE (xULL(1) << MSIEQ_REC_SHIFT)
102#define MSIEQ_REC_SIZE_MASK (MSIEQ_REC_SIZE - 1)
103
104#define INTR_DISABLED 0
105#define INTR_ENABLED 1
106#define INTR_ENABLED_MAX_VALUE INTR_ENABLED
107
108#define INTR_IDLE 0
109#define INTR_RECEIVED 1
110#define INTR_DELIVERED 2
111#define INTR_STATE_MAX_VALUE INTR_DELIVERED
112
113#define HVIO_DMA_SYNC_DEVICE 1
114#define HVIO_DMA_SYNC_CPU 2
115
116#define VPCI_MSIEQ_TID_SHIFT 32
117#define VPCI_MSIEQ_MSG_RT_CODE_SHIFT 16
118#define VPCI_MSG_CODE_SHIFT 0
119
120#define PCIE_CFG_OFFSET_MASK ((1 << 12) - 1)
121#define PCIE_BDF_MASK (((1 << 24) - 1) ^ ((1 << 8) - 1))
122
123#define IOMMU_MAP_MAX 64 /* max # of pages mapped */
124
125#ifdef __cplusplus
126}
127#endif
128
129#endif /* _SUN4V_VPCI_H */