Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / legion / src / devices / mem_bus / libgeneric / device_support.c
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: device_support.c
5* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
6* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
7*
8* The above named program is free software; you can redistribute it and/or
9* modify it under the terms of the GNU General Public
10* License version 2 as published by the Free Software Foundation.
11*
12* The above named program is distributed in the hope that it will be
13* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
14* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15* General Public License for more details.
16*
17* You should have received a copy of the GNU General Public
18* License along with this work; if not, write to the Free Software
19* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
20*
21* ========== Copyright Header End ============================================
22*/
23/*
24 * This is a set of generic support functions for basic devices.
25 */
26
27#include <stdio.h>
28#include <stdlib.h>
29#include <unistd.h>
30#include <sys/types.h>
31#include <time.h>
32
33#include "basics.h"
34#include "allocate.h"
35#include "lexer.h"
36#include "simcore.h"
37#include "config.h"
38#include "dumpinfo.h"
39#include "fatal.h"
40#include "device.h"
41
42
43/*
44 * For devices that have no cacheable address space areas
45 * use this function instead of declaring it for every device.
46 *
47 * The cacheable function is supposed to provide the following:
48 *
49 * Returns the extent of the linear cacheable block
50 * starting at offset, and a pointer to the state block
51 *
52 * Note: if writing to the block is supposed to have a
53 * device side effect (e.g. device reg) then this
54 * function is supposed to return 0.
55 */
56
57tpaddr_t generic_device_non_cacheable(
58 config_addr_t * config_addrp,
59 dev_access_t type,
60 tpaddr_t offset,
61 uint8_t ** blockp)
62{
63 return ((tpaddr_t)0); /* no cacheable memory at all */
64}
65