[OpenSPARC-T2-SAM] / legion / src / devices / mmi / sam_dev.h

/*
* ========== Copyright Header Begin ==========================================
* 
* OpenSPARC T2 Processor File: sam_dev.h
* Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
* 
* The above named program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
* License version 2 as published by the Free Software Foundation.
* 
* The above named program is distributed in the hope that it will be 
* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
* General Public License for more details.
* 
* You should have received a copy of the GNU General Public
* License along with this work; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
* 
* ========== Copyright Header End ============================================
*/
/*
 * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
 * Use is subject to license terms.
 */

#ifndef _SAM_DEV_H
#define	_SAM_DEV_H

#pragma ident	"@(#)sam_dev.h	1.7	07/10/12 SMI"

#ifdef __cplusplus
extern "C" {
#endif

#include "mmi.h"
#if INTERNAL_BUILD
#include "scx.h"
#endif

/*
 * Legion MMI interface 
 */
typedef struct mmi_data { 
	char			*modname;
	char			*instance_name;
	int			argc;
	char			**argv;
	void			*cb_data;	
	mmi_interface_cb 	interface_cb;
	mmi_config_cb		config_cb;
	mmi_instance_creator	create_instance;
	void			*asi_cb_data;	
	mmi_ld_asi_action	asi_ld_handler;	
	mmi_st_asi_action	asi_st_handler;	
#if INTERNAL_BUILD
	scx_handle_t            scx;
	scx_api                 *scx_ops;
#endif
} mmi_data_t;

#define		MMI_MAX_ARGC	20

#define		ROCK_SIU	"rock_siu"
#define		HH		"hh"
#define		PCIE_BUS	"pcie_bus"
#define		PARROT		"parrot"
#define		N2NIU		"n2niu"
#define		PCI1		"pci1"
#define		PCI2		"pci2"
#define		FUNC		"func"
#define		DEV		"dev"
#define		DEBUG_L2	"-d2"
#define		MAX_PARROTS	8
#define		NOADDR		999

/*
 * Legion physio interface to access MMI device registers   
 */
typedef struct mmi_iomap {
	void 		*obj;
	mmi_access 	access;
	uint64_t 	base;
	uint64_t	size;
	uint64_t	end;
	struct mmi_iomap *next;	
} mmi_iomap_t;

mmi_iomap_t  	*mmi_iomap_head;

typedef struct sam_cycle {
        mmi_event_cycle 	handler;
        uint64_t        	repeat;
        uint64_t        	enable;
	void			*cb_data;	
	struct sam_cycle	*next;	
} sam_cycle_t;

sam_cycle_t 	*cb_cycle_head;

/*
 * Legion device to interface with the SAM MMI device
 */ 
typedef struct sam_device {
	mmi_data_t	*mmi_datap;
        config_dev_t 	*config_devp;	
	pthread_mutex_t	mmi_lock;
	pthread_t	tid;
	struct sam_device *next;
} sam_device_t;

sam_device_t  	*sam_dev_list_head;

typedef struct sam_intr_rec {
	uint32_t	tt;
	bool_t		enable;
        simcpu_t 	*targetcpu;	
} sam_intr_rec_t;

/*
 * prototypes
 */
sam_device_t 	*sam_find_device(const char *dev_namep);
sam_device_t 	*sam_get_instance(const char *dev_namep, uint8_t *instance);
void 		sam_register_device(sam_device_t *new);
void 		sam_register_iomap(mmi_iomap_t *new);
void 		sam_unregister_iomap(uint64_t base, uint64_t size, void *obj);
void 		sam_register_cb_cycle(sam_cycle_t *new);
void 		sam_unregister_cb_cycle(void *obj);
void 		*sam_start_dma(void *arg);
sam_cycle_t 	*sam_find_cb_cycle(void *obj);
bool_t 		sam_mem_access(uint64_t paddr, uint8_t * data, uint64_t size, dev_access_t type);
void		sam_internal_intr(int dest_cpuid, sam_device_t *sam_devp, int src_iscpu, uint32_t vnum, 
				  int traptype);
void		sam_mondo_intr(int dest_cpuid, void *src, int src_iscpu, uint64_t *idata);
int		sam_asi_ld_handler(uint32_t asi, uint64_t vaddr, uint64_t *buf, int size, uint32_t cpuid);
int		sam_asi_st_handler(uint32_t asi, uint64_t vaddr, uint64_t buf, int size, uint32_t cpuid);

LIST_DEF( sam_asi_dev_list, sam_device_t);

#ifdef FAKE_SAM
uint64_t        getreg_scal_64 (uint32_t chipId, char *name);
uint64_t        __1cOgetreg_scal_646Fpc_L_ (uint32_t chipId, char *name);
void            setreg_scal_64 (uint32_t chipId, char *name, uint64_t value);
void            __1cOsetreg_scal_646FpcL_v_ (uint32_t chipId, char *name, uint64_t value);
bool_t __1cKhandleIntp6FHHbL_b_ (uint32_t chipId, uint16_t requesterId, uint16_t intpNum, bool_t isMsi, uint64_t msiAddr);
bool_t __1cOreportPciE_Err6FHCpI_b_ (uint32_t chipId, uint16_t requesterId, uint8_t err_msg, uint32_t *header);
bool_t __1cLgetIommu_PA6FLHbpL_b_ (uint32_t chipId, uint64_t va, uint16_t requesterId, bool_t dmaWrite, uint64_t *paddr);
#endif

#ifdef __cplusplus
}
#endif

#endif /* _SAM_DEV_H */
Commit	Line	Data
920dae64 AT	1	/*
	2	* ========== Copyright Header Begin ==========================================
	3	*
	4	* OpenSPARC T2 Processor File: sam_dev.h
	5	* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
	6	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
	7	*
	8	* The above named program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public
	10	* License version 2 as published by the Free Software Foundation.
	11	*
	12	* The above named program is distributed in the hope that it will be
	13	* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public
	18	* License along with this work; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
	20	*
	21	* ========== Copyright Header End ============================================
	22	*/
	23	/*
	24	* Copyright 2006 Sun Microsystems, Inc. All rights reserved.
	25	* Use is subject to license terms.
	26	*/
	27
	28	#ifndef _SAM_DEV_H
	29	#define _SAM_DEV_H
	30
	31	#pragma ident "@(#)sam_dev.h 1.7 07/10/12 SMI"
	32
	33	#ifdef __cplusplus
	34	extern "C" {
	35	#endif
	36
	37	#include "mmi.h"
	38	#if INTERNAL_BUILD
	39	#include "scx.h"
	40	#endif
	41
	42	/*
	43	* Legion MMI interface
	44	*/
	45	typedef struct mmi_data {
	46	char *modname;
	47	char *instance_name;
	48	int argc;
	49	char **argv;
	50	void *cb_data;
	51	mmi_interface_cb interface_cb;
	52	mmi_config_cb config_cb;
	53	mmi_instance_creator create_instance;
	54	void *asi_cb_data;
	55	mmi_ld_asi_action asi_ld_handler;
	56	mmi_st_asi_action asi_st_handler;
	57	#if INTERNAL_BUILD
	58	scx_handle_t scx;
	59	scx_api *scx_ops;
	60	#endif
	61	} mmi_data_t;
	62
	63	#define MMI_MAX_ARGC 20
	64
65	#define ROCK_SIU "rock_siu"
66	#define HH "hh"
67	#define PCIE_BUS "pcie_bus"
68	#define PARROT "parrot"
69	#define N2NIU "n2niu"
70	#define PCI1 "pci1"
71	#define PCI2 "pci2"
72	#define FUNC "func"
73	#define DEV "dev"
74	#define DEBUG_L2 "-d2"
75	#define MAX_PARROTS 8
76	#define NOADDR 999
77
78	/*
79	* Legion physio interface to access MMI device registers
80	*/
81	typedef struct mmi_iomap {
82	void *obj;
83	mmi_access access;
84	uint64_t base;
85	uint64_t size;
86	uint64_t end;
87	struct mmi_iomap *next;
88	} mmi_iomap_t;
89
90	mmi_iomap_t *mmi_iomap_head;
91
92	typedef struct sam_cycle {
93	mmi_event_cycle handler;
94	uint64_t repeat;
95	uint64_t enable;
96	void *cb_data;
97	struct sam_cycle *next;
98	} sam_cycle_t;
99
100	sam_cycle_t *cb_cycle_head;
101
102	/*
103	* Legion device to interface with the SAM MMI device
104	*/
105	typedef struct sam_device {
106	mmi_data_t *mmi_datap;
107	config_dev_t *config_devp;
108	pthread_mutex_t mmi_lock;
109	pthread_t tid;
110	struct sam_device *next;
111	} sam_device_t;
112
113	sam_device_t *sam_dev_list_head;
114
115	typedef struct sam_intr_rec {
116	uint32_t tt;
117	bool_t enable;
118	simcpu_t *targetcpu;
119	} sam_intr_rec_t;
120
121	/*
122	* prototypes
123	*/
124	sam_device_t sam_find_device(const char dev_namep);
125	sam_device_t sam_get_instance(const char dev_namep, uint8_t *instance);
126	void sam_register_device(sam_device_t *new);
127	void sam_register_iomap(mmi_iomap_t *new);
128	void sam_unregister_iomap(uint64_t base, uint64_t size, void *obj);
129	void sam_register_cb_cycle(sam_cycle_t *new);
130	void sam_unregister_cb_cycle(void *obj);
131	void sam_start_dma(void arg);
132	sam_cycle_t sam_find_cb_cycle(void obj);
133	bool_t sam_mem_access(uint64_t paddr, uint8_t * data, uint64_t size, dev_access_t type);
134	void sam_internal_intr(int dest_cpuid, sam_device_t *sam_devp, int src_iscpu, uint32_t vnum,
135	int traptype);
136	void sam_mondo_intr(int dest_cpuid, void src, int src_iscpu, uint64_t idata);
137	int sam_asi_ld_handler(uint32_t asi, uint64_t vaddr, uint64_t *buf, int size, uint32_t cpuid);
138	int sam_asi_st_handler(uint32_t asi, uint64_t vaddr, uint64_t buf, int size, uint32_t cpuid);
139
140	LIST_DEF( sam_asi_dev_list, sam_device_t);
141
142	#ifdef FAKE_SAM
143	uint64_t getreg_scal_64 (uint32_t chipId, char *name);
144	uint64_t __1cOgetreg_scal_646Fpc_L_ (uint32_t chipId, char *name);
145	void setreg_scal_64 (uint32_t chipId, char *name, uint64_t value);
146	void __1cOsetreg_scal_646FpcL_v_ (uint32_t chipId, char *name, uint64_t value);
147	bool_t __1cKhandleIntp6FHHbL_b_ (uint32_t chipId, uint16_t requesterId, uint16_t intpNum, bool_t isMsi, uint64_t msiAddr);
148	bool_t __1cOreportPciE_Err6FHCpI_b_ (uint32_t chipId, uint16_t requesterId, uint8_t err_msg, uint32_t *header);
149	bool_t __1cLgetIommu_PA6FLHbpL_b_ (uint32_t chipId, uint64_t va, uint16_t requesterId, bool_t dmaWrite, uint64_t *paddr);
150	#endif
151
152	#ifdef __cplusplus
153	}
154	#endif
155
156	#endif /* _SAM_DEV_H */