projects / OpenSPARC-T2-SAM / blame
| Commit | Line | Data |
|---|---|---|
| 920dae64 AT |
1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== | |
| 3 | * | |
| 4 | * OpenSPARC T2 Processor File: asmgen.c | |
| 5 | * Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved. | |
| 6 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES. | |
| 7 | * | |
| 8 | * The above named program is free software; you can redistribute it and/or | |
| 9 | * modify it under the terms of the GNU General Public | |
| 10 | * License version 2 as published by the Free Software Foundation. | |
| 11 | * | |
| 12 | * The above named program is distributed in the hope that it will be | |
| 13 | * useful, but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 15 | * General Public License for more details. | |
| 16 | * | |
| 17 | * You should have received a copy of the GNU General Public | |
| 18 | * License along with this work; if not, write to the Free Software | |
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. | |
| 20 | * | |
| 21 | * ========== Copyright Header End ============================================ | |
| 22 | */ | |
| 23 | /* | |
| 24 | * Copyright 2006 Sun Microsystems, Inc. All rights reserved. | |
| 25 | * Use is subject to license terms. | |
| 26 | */ | |
| 27 | ||
| 28 | #pragma ident "@(#)asmgen.c 1.9 06/03/16 SMI" | |
| 29 | ||
| 30 | #include <stdio.h> | |
| 31 | #include <unistd.h> | |
| 32 | #include <stdlib.h> | |
| 33 | ||
| 34 | /* | |
| 35 | * dumb program to generate symbols for various C data structures | |
| 36 | * so that assembler code can access them ... FIXME | |
| 37 | */ | |
| 38 | ||
| 39 | #include "basics.h" | |
| 40 | #include "fatal.h" | |
| 41 | #include "simcore.h" | |
| 42 | #include "tsparcv9.h" | |
| 43 | #include "tsparcv9internal.h" | |
| 44 | #include "config.h" | |
| 45 | #include "xicache.h" | |
| 46 | #include "xdcache.h" | |
| 47 | ||
| 48 | ||
| 49 | #define DD( _type, _field, _name) \ | |
| 50 | printf("#define\t%s_OFFSET 0x%llx\n", \ | |
| 51 | #_name, \ | |
| 52 | (unsigned long long)&( ((_type *)0)->_field ) ) | |
| 53 | ||
| 54 | int | |
| 55 | main(int argc, char ** argv) | |
| 56 | { | |
| 57 | /* simcpu_t stuff ; */ | |
| 58 | ||
| 59 | DD( simcpu_t, pc, SIMCPU_PC ); | |
| 60 | DD( simcpu_t, npc, SIMCPU_NPC ); | |
| 61 | ||
| 62 | /* This is for SPARCv9 target */ | |
| 63 | DD( simcpu_t, v9_ccr, SIMCPU_v9CCR ); | |
| 64 | DD( simcpu_t, v9_asi, SIMCPU_v9ASI ); | |
| 65 | DD( simcpu_t, v9_y, SIMCPU_v9Y ); | |
| 66 | DD( simcpu_t, v9_fsr_exc, SIMCPU_v9FSR_EXC ); | |
| 67 | DD( simcpu_t, v9_fsr_tem, SIMCPU_v9FSR_TEM ); | |
| 68 | DD( simcpu_t, v9_fsr_ctrl, SIMCPU_v9FSR_CTRL ); | |
| 69 | DD( simcpu_t, v9_gsr, SIMCPU_v9GSR_CTRL ); | |
| 70 | ||
| 71 | DD( simcpu_t, scratch64, SIMCPU_SCRATCH64 ); | |
| 72 | ||
| 73 | DD( simcpu_t, fpreg.s32[0], SIMCPU_FPREG ); | |
| 74 | ||
| 75 | DD( simcpu_t, specificp, SIMCPU_SPECIFICP ); | |
| 76 | DD( sparcv9_cpu_t, fpu_on, SPARCV9_FPU_ON ); | |
| 77 | ||
| 78 | DD( simcpu_t, pc, SIMCPU_PC ); | |
| 79 | DD( simcpu_t, npc, SIMCPU_NPC ); | |
| 80 | ||
| 81 | ||
| 82 | /* xicache stuff */ | |
| 83 | ||
| 84 | DD( xicache_instn_t, di.rri.simm16, XIC_SIMM16 ); | |
| 85 | DD( xicache_instn_t, di.breg.offset32, XIC_BREGOFF32 ); | |
| 86 | DD( xicache_instn_t, di.brcond.offset32, XIC_BROFF32 ); | |
| 87 | DD( xicache_instn_t, di.rrr.rs1o, XIC_INTREG_SRC1 ); | |
| 88 | DD( xicache_instn_t, di.rrr.rs2o, XIC_INTREG_SRC2 ); | |
| 89 | DD( xicache_instn_t, di.rrr.rdo, XIC_INTREG_DEST ); | |
| 90 | ||
| 91 | DD( xicache_instn_t, di.rrr.rs1o, XIC_FPREG_SRC1 ); | |
| 92 | DD( xicache_instn_t, di.rrr.rs2o, XIC_FPREG_SRC2 ); | |
| 93 | DD( xicache_instn_t, di.rrr.rdo, XIC_FPREG_DEST ); | |
| 94 | ||
| 95 | return (0); | |
| 96 | } |