Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / obp / obp / arch / sun4v / mondo.fth
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1\ ========== Copyright Header Begin ==========================================
2\
3\ Hypervisor Software File: mondo.fth
4\
5\ Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
6\
7\ - Do no alter or remove copyright notices
8\
9\ - Redistribution and use of this software in source and binary forms, with
10\ or without modification, are permitted provided that the following
11\ conditions are met:
12\
13\ - Redistribution of source code must retain the above copyright notice,
14\ this list of conditions and the following disclaimer.
15\
16\ - Redistribution in binary form must reproduce the above copyright notice,
17\ this list of conditions and the following disclaimer in the
18\ documentation and/or other materials provided with the distribution.
19\
20\ Neither the name of Sun Microsystems, Inc. or the names of contributors
21\ may be used to endorse or promote products derived from this software
22\ without specific prior written permission.
23\
24\ This software is provided "AS IS," without a warranty of any kind.
25\ ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES,
26\ INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A
27\ PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN
28\ MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR
29\ ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR
30\ DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN
31\ OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR
32\ FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE
33\ DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY,
34\ ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF
35\ SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
36\
37\ You acknowledge that this software is not designed, licensed or
38\ intended for use in the design, construction, operation or maintenance of
39\ any nuclear facility.
40\
41\ ========== Copyright Header End ============================================
42id: @(#)mondo.fth 1.2 06/12/21
43purpose:
44copyright: Copyright 2006 Sun Microsystems, Inc. All Rights Reserved
45copyright: Use is subject to license terms.
46
47headerless
48
49\ We are at TL=1 when we execute following interrupt handler.
50label cpu-mondo-interrupt
51 %o0 %g1 move %o1 %g2 move
52 %o2 %g5 move %o5 %g6 move
53
54 %g0 h# 3c %o0 add
55 %g0 h# 15 %o5 add
56 %g0 0 always htrapif
57
58 %o1 %g3 move %o2 %g4 move \ %g3 = queue RA; %g4 = nentries
59 %g1 %o0 move %g2 %o1 move
60 %g5 %o2 move %g6 %o5 move
61
62 prom-main-task %g5 set
63 %g4 6 %g4 sllx \ multiple by queue size (64)
64 %g4 1 %g1 sub \ mask
65 %g0 h# 25 wrasi \ %asi = QUEUE_ASI
66 %g0 h# 3c0 %asi %g5 ldxa
67 %g5 /queue-entry %g7 add
68 %g7 %g1 %g6 and \ new-offset
69 %g5 %g3 %g7 add \ Buffer Addr
70 %g0 memory-asi wrasi
71 %g7 h# 08 %asi %g1 ldxa \ %g1 = arg1
72 %g7 h# 10 %asi %g2 ldxa \ %g2 = arg2
73 %g7 h# 18 %asi %g3 ldxa \ %g3 = arg3
74 %g7 h# 20 %asi %g4 ldxa \ %g4 = arg4
75 %g7 h# 28 %asi %g5 ldxa \ %g5 = arg5
76 %g7 h# 00 %asi %g7 ldxa \ %g7 = xcall PC
77
78 %g0 h# 25 wrasi \ %asi = QUEUE_ASI
79 %g6 %g0 h# 3c0 %asi stxa
80
81 %g7 %g0 %g0 jmpl
82 nop
83end-code
84
85h# 07c cpu-mondo-interrupt set-vector
86
87\ This handler is used after OBP relinquished control to OS.
88label devmondo-interrupt
89 %g0 h# 38 %g4 add
90 %g4 %g0 h# 20 %g7 ldxa \ CPU struct PA
91 0 >cpu-devmondo-ptr %g6 set
92 %g7 %g6 %g7 add \ target PA
93
94 %g0 h# 25 wrasi \ %asi = QUEUE_ASI
95 %g0 h# 3d0 %asi %g5 ldxa \ current head
96 %g0 h# 3d8 %asi %g6 ldxa \ get tail
97 %g7 %g0 memory-asi %g1 ldxa \ get saved value
98 %g1 %g0 %g0 subcc
99 0= if
100 %g6 %g0 h# 3d0 %asi stxa \ head = tail.
101 \ OK, we need to preserve the current head to restore later
102 %g0 1 %g1 add
103 %g1 d# 63 %g1 sllx \ bit63
104 %g1 %g5 %g5 or \ head offset | bit63
105 %g5 %g7 %g0 memory-asi stxa \ save it
106 then
107 retry
108end-code
109
110h# 07d devmondo-interrupt set-vector
111
112label resumable-interrupt
113 %g0 h# 38 %g4 add
114 %g4 %g0 h# 20 %g7 ldxa \ CPU struct PA
115 0 >reserr-count %g1 set
116 %g1 %g7 %g1 add \ counter for res error
117 %g1 %g0 memory-asi %g2 ldxa
118 %g2 1 %g2 add
119 %g2 %g0 %g1 memory-asi stxa
120
121 \ Get resumable queue config info from hypervisor
122 %g0 h# 3e %o0 add
123 %g0 h# 15 %o5 add
124 %g0 0 always htrapif \ %o1 = queue RA; %o2 = nentries
125 %g0 h# 25 wrasi \ %asi = QUEUE_ASI
126 %g0 h# 3e0 %asi %g5 ldxa \ get current qhead
127 %o2 6 %o2 sllx \ multiple by queue size (64)
128 %o2 1 %g1 sub \ mask
129 %g5 /queue-entry %g5 add \ increase qhead to next
130 %g5 %g1 %g5 and \ size mask to wrap around
131 %g5 %g0 h# 3e0 %asi stxa \ update qhead
132 retry
133end-code
134
135h# 07e resumable-interrupt set-vector
136
137label nonresumable-interrupt
138 %g0 h# 38 %g4 add
139 %g4 %g0 h# 20 %g7 ldxa \ CPU struct PA
140 0 >nonreserr-count %g1 set
141 %g1 %g7 %g1 add \ counter for non-res error
142 %g1 %g0 memory-asi %g2 ldxa
143 %g2 1 %g2 add
144 %g2 %g0 %g1 memory-asi stxa
145
146 \ Get non-resumable queue config info from hypervisor
147 %g0 h# 3f %o0 add
148 %g0 h# 15 %o5 add
149 %g0 0 always htrapif \ %o1 = queue RA; %o2 = nentries
150 0 >nonreserr-shadowbuf %g3 set
151 %g3 %g7 %g3 add \ shadow buffer ptr
152 %g0 h# 25 wrasi \ %asi = QUEUE_ASI
153 %g0 h# 3f0 %asi %g5 ldxa \ get current qhead
154 0 >nonreserr-bflag %g1 set
155 %g1 %g7 %g1 add \ shadow buffer flag ptr
156 %g1 %g0 memory-asi %g2 ldxa
157 %g2 %g0 %g0 subcc \ check if buffer is free
158 0= if nop
159 \ save trap's 64 bytes from queue entry to shadow buffer
160 %o1 %g5 %g4 add \ error entry ptr
161 0 %g2 set \ init offset to entry field
162 8 %g7 set \ init field count
163 begin
164 %g4 %g2 memory-asi %g6 ldxa \ read error info field
165 %g6 %g3 %g2 memory-asi stxa \ save to shadow buffer
166 %g2 8 %g2 add \ increment to next field
167 %g7 1 %g7 subcc \ there are total of 64 bytes
168 \ we go through the loop 8 times
169 \ (8 * 8 = 64)
170 0= until nop
171 %g0 -1 %g2 add \ mark buffer not free
172 %g2 %g0 %g1 memory-asi stxa
173 then
174
175 %o2 6 %o2 sllx \ multiple by queue size (64)
176 %o2 1 %g1 sub \ mask
177 %g5 /queue-entry %g5 add \ increase qhead to next
178 %g5 %g1 %g5 and \ size mask to wrap around
179 %g5 %g0 h# 3f0 %asi stxa \ update qhead
180 save-state always brif
181 nop
182end-code
183
184h# 07f nonresumable-interrupt set-vector
185h# 27f nonresumable-interrupt set-vector
186
187\ iodevice interrupts are handled using devmondo queues on sun4v. Interrupt
188\ resends involves saving the devmondo queue head on a devmondo interrupt,
189\ and restoring it in (crestart) along with other CPU state.
190
191: reset-interrupts ( -- ) ;
192
193headers