Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / obp / obp / cpu / sparc / traps9.fth
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1\ ========== Copyright Header Begin ==========================================
2\
3\ Hypervisor Software File: traps9.fth
4\
5\ Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
6\
7\ - Do no alter or remove copyright notices
8\
9\ - Redistribution and use of this software in source and binary forms, with
10\ or without modification, are permitted provided that the following
11\ conditions are met:
12\
13\ - Redistribution of source code must retain the above copyright notice,
14\ this list of conditions and the following disclaimer.
15\
16\ - Redistribution in binary form must reproduce the above copyright notice,
17\ this list of conditions and the following disclaimer in the
18\ documentation and/or other materials provided with the distribution.
19\
20\ Neither the name of Sun Microsystems, Inc. or the names of contributors
21\ may be used to endorse or promote products derived from this software
22\ without specific prior written permission.
23\
24\ This software is provided "AS IS," without a warranty of any kind.
25\ ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES,
26\ INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A
27\ PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN
28\ MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR
29\ ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR
30\ DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN
31\ OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR
32\ FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE
33\ DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY,
34\ ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF
35\ SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
36\
37\ You acknowledge that this software is not designed, licensed or
38\ intended for use in the design, construction, operation or maintenance of
39\ any nuclear facility.
40\
41\ ========== Copyright Header End ============================================
42id: @(#)traps9.fth 1.4 06/02/16
43purpose:
44copyright: Copyright 2006 Sun Microsystems, Inc. All Rights Reserved
45copyright: Use is subject to license terms.
46
47headers
48code asi@ ( -- %asi ) tos sp push tos rdasi c;
49code asi! ( %asi -- ) tos 0 wrasi sp tos pop c;
50
51code tpc@ ( -- adr ) tos sp push tos rdtpc c;
52code tpc! ( adr -- ) tos 0 wrtpc sp tos pop c;
53
54code tnpc@ ( -- adr ) tos sp push tos rdtnpc c;
55code tnpc! ( adr -- ) tos 0 wrtnpc sp tos pop c;
56
57code tstate@ ( -- n ) tos sp push tos rdtstate c;
58code tstate! ( n -- ) tos 0 wrtstate sp tos pop c;
59
60code tt@ ( -- adr ) tos sp push tos rdtt c;
61code tt! ( adr -- ) tos 0 wrtt sp tos pop c;
62
63code tick@ ( -- adr ) tos sp push tos rdtick c;
64code tick! ( adr -- ) tos 0 wrtick sp tos pop c;
65
66code tba@ ( -- adr ) tos sp push tos rdtba c;
67code tba! ( adr -- ) tos 0 wrtba sp tos pop c;
68
69code pstate@ ( -- n ) tos sp push tos rdpstate c;
70code pstate! ( n -- ) tos 0 wrpstate sp tos pop c;
71
72code tl@ ( -- adr ) tos sp push tos rdtl c;
73code tl! ( adr -- ) tos 0 wrtl sp tos pop c;
74
75code pil@ ( -- n ) tos sp push tos rdpil c;
76code pil! ( n -- ) tos 0 wrpil sp tos pop c;
77
78code cwp@ ( -- n ) tos sp push tos rdcwp c;
79code cwp! ( n -- ) tos 0 wrcwp sp tos pop c;
80
81code cansave@ ( -- n ) tos sp push tos rdcansave c;
82code cansave! ( n -- ) tos 0 wrcansave sp tos pop c;
83
84code canrestore@ ( -- n ) tos sp push tos rdcanrestore c;
85code canrestore! ( n -- ) tos 0 wrcanrestore sp tos pop c;
86
87code cleanwin@ ( -- n ) tos sp push tos rdcleanwin c;
88code cleanwin! ( n -- ) tos 0 wrcleanwin sp tos pop c;
89
90code otherwin@ ( -- n ) tos sp push tos rdotherwin c;
91code otherwin! ( n -- ) tos 0 wrotherwin sp tos pop c;
92
93code wstate@ ( -- n ) tos sp push tos rdwstate c;
94code wstate! ( n -- ) tos 0 wrwstate sp tos pop c;
95
96[ifndef] SUN4V
97code ver@ ( -- n ) tos sp push tos rdver c;
98[then]
99
100code fprs@ ( -- n ) tos sp push tos rdfprs c;
101code fprs! ( n -- ) tos 0 wrfprs sp tos pop c;
102
103code y@ ( -- n ) tos sp push tos rdy c;
104code y! ( n -- ) tos 0 wry sp tos pop c;
105
106code %i6! ( n -- ) tos %i6 move sp tos pop c;
107code %i7! ( n -- ) tos %i7 move sp tos pop c;
108
109code %o6! ( n -- ) tos %o6 move sp tos pop c;
110code %o6@ ( n -- ) tos sp push %o6 tos move c;
111
112: vector-adr ( n -- vadr ) 5 << tba@ + ;
113hex
114: vector! ( vadr vector# -- )
115 vector-adr >r ( handler ) ( r: trap-entry-adr )
116 xlsplit ( handler-lo handler-hi )
117 \ sethi %uhi(handler), %g2
118 dup a >> 0500.0000 or r@ 0 la+ instruction!
119 \ or %g2, %ulo(handler), %g2
120 3ff and 8410.a000 or r@ 1 la+ instruction!
121 \ sethi %hi(handler), %g1
122 dup a >> 0300.0000 or r@ 2 la+ instruction!
123 \ sllx %g2, 20, %g2
124 8528.b020 r@ 3 la+ instruction!
125 \ or %g1, %g2, %g1
126 8210.4002 r@ 4 la+ instruction!
127 \ or %g1, %lo(handler), %g1
128 3ff and 8210.6000 or r@ 5 la+ instruction!
129 \ jmpl %g1, 0, %g0
130 81c0.6000 r@ 6 la+ instruction!
131 \ nop
132 0100.0000 r> 7 la+ instruction!
133;
134
135: vector@ ( vector# -- vadr )
136 vector-adr >r
137 r@ 0 la+ l@ a << n->l ( uhi )
138 r@ 1 la+ l@ h# 3ff and or h# 20 << ( nhi )
139 r@ 2 la+ l@ a << n->l ( nhi hi )
140 r> 5 la+ l@ h# 3ff and or ( nhi nlo )
141 swap lxjoin ( vadr )
142;
143
144: (lock[ ( -- ) pstate@ 2 invert and pstate! ;
145: (]unlock ( -- ) pstate@ 2 or pstate! ;