Initial commit of OpenSPARC T2 architecture model.

[OpenSPARC-T2-SAM] / obp / obp / cpu / sparc / ultra4v / hypermmu.fth

\ ========== Copyright Header Begin ==========================================
\ 
\ Hypervisor Software File: hypermmu.fth
\ 
\ Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
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\ ========== Copyright Header End ============================================
id: @(#)hypermmu.fth 1.1 06/02/16
purpose:
copyright: Copyright 2006 Sun Microsystems, Inc.  All Rights Reserved
copyright: Use is subject to license terms.

headerless

\ htrap numbers
h# 00 constant fast-trap#
h# 03 constant map-addr-htrap#
h# 04 constant unmap-addr-htrap#

\ htrap function numbers
h# 27 constant mmu-on-off-func#
h# 25 constant map-perm-addr-func#
h# 28 constant unmap-perm-addr-func#
h# 26 constant mmu-miss-area-func#
h# 22 constant demap-page-func#

h# 80 constant /mmu-miss-area

headers
1 4 map-perm-addr-func#  fast-trap#
   hypercall: map-perm-addr ( tlb tte ctx vadr -- error? )

1 3 unmap-perm-addr-func#  fast-trap#
   hypercall: unmap-perm-addr ( tlb ctx vadr -- error? )

1 3 0 unmap-addr-htrap#
   hypercall: demap-page ( tlb ctx vadr -- error? )

1 4 0 map-addr-htrap#
   hypercall: map-addr ( tlb tte ctx vadr -- error? )

\ 
\ we had better not take a miss in this code..
\ 
code set-cpu-miss-area ( pa -- )
   tos				%o0     move
   sp				tos	pop
   %g0  h# 30			%o1	add
   %g0  mmu-miss-area-func#	%o5	add
   %o0  %g0  %o1  h# 20			stxa		\ Set scratch
   %g0  0				always htrapif
c;