[OpenSPARC-T2-SAM] / obp / obp / dev / network / bge / bge-mac.fth

\ ========== Copyright Header Begin ==========================================
\ 
\ Hypervisor Software File: bge-mac.fth
\ 
\ Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
\ 
\  - Do no alter or remove copyright notices
\ 
\  - Redistribution and use of this software in source and binary forms, with 
\    or without modification, are permitted provided that the following 
\    conditions are met: 
\ 
\  - Redistribution of source code must retain the above copyright notice, 
\    this list of conditions and the following disclaimer.
\ 
\  - Redistribution in binary form must reproduce the above copyright notice,
\    this list of conditions and the following disclaimer in the
\    documentation and/or other materials provided with the distribution. 
\ 
\    Neither the name of Sun Microsystems, Inc. or the names of contributors 
\ may be used to endorse or promote products derived from this software 
\ without specific prior written permission. 
\ 
\     This software is provided "AS IS," without a warranty of any kind. 
\ ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, 
\ INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A 
\ PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN 
\ MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR 
\ ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR 
\ DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN 
\ OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR 
\ FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE 
\ DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY, 
\ ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF 
\ SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
\ 
\ You acknowledge that this software is not designed, licensed or
\ intended for use in the design, construction, operation or maintenance of
\ any nuclear facility. 
\ 
\ ========== Copyright Header End ============================================
id: @(#)bge-mac.fth 1.8 07/05/24
purpose: Initialization of the Mac
copyright: Copyright 2007 Sun Microsystems, Inc.  All Rights Reserved
copyright: Use is subject to license terms.

headers

: enable-txmac ( -- )  2 h# 45c breg-bset ;
: enable-rxmac ( -- )  2 h# 468 breg-bset ;

\ Misc Host Control Register Operators
: mhcr@  ( -- data )		h# 68 my-l@ ;
: mhcr!	 ( data -- )		h# 68 my-l! ;
: mhcr-set  ( bits -- )		h# 68 my-lset ;
: mhcr-clear  ( bits -- )	h# 68 my-lclear ;

\ Mac Mode Register Operators
: mac-reg@  ( -- data )	h# 400 breg@ ;
: mac-reg!  ( data -- )	h# 400 breg! ;
: mac-reg-set  ( bits -- )	h# 400 breg-bset ;
: mac-reg-clear  ( bits -- )	h# 400 breg-bclear ;

\ Mac Mode Control Register Operators
: mode-ctrl@  ( -- data )	h# 6800 breg@ ;
: mode-ctrl!  ( data -- )	h# 6800 breg! ;
: mode-ctrl-set  ( bits -- )	h# 6800 breg-bset ;
: mode-ctrl-clear  ( bits -- )	h# 6800 breg-bclear ;

h# c  constant pci-swap
h# 36 constant dma-swap

\ On a chip reset some pci config space gets blown away
: save-pci-regs  ( -- )
   h# c	 my-b@ to pci-$line-size	\ Save PCI Cache Line Size
   2 	 my-w@ to pci-dev-id		\ Save PCI Device ID
\ The version id register at offset 8 in the PCI config space
\ is not actually initialised unless the seeprom is fitted
\ but this information is needed elsewhere for errata
\ application checks, so get the revision id from reg
\ 6a which is equivalent to bits 23:16 of reg 68 Miscellaneous
\ Host Control Register. Also include bits 27:24 so that Ax and
\ Bx steppings can be distinguished.
   h# 6a my-w@ h# fff and to pci-rev-id	\ Save asic revision id.
   h# d	 my-b@ to pci-max-latency
;

: clear-pci-status  ( -- )
   -1		6	my-w!		\ Clear PCI Error Status Reg
;
: pci-e?  ( devce-id -- flag )		\ 5721 currently the only "true" PCI-E
   BCM-5721 =				\ device
;

: bcm5714<reva2? ( -- flag )            \ true for BCM-5714 < A2 revision
   pci-dev-id BCM-5714 =                \ false otherwise
   h# 8 my-b@ h# a2 < and
;

: reset-core-clks  ( -- )
   pci-swap	        mhcr-set	\ Ensure expected endianness	
   6		4	my-w!		\ Enable Memory Space Decode
   3			mhcr-set	\ Disable and Clear Interrupts
   save-pci-regs			\ Save PCI regs cleared on clk reset
   0
   pci-dev-id pci-e? if
      1 d# 29 << or			\ Disable GRC Reset on PCI-E block
   then
   pci-dev-id BCM-5721 = if
      1 d# 26 << or			\ GPHY powerdown override
   then					\ BGE spec is wishy washy for BCM-5714

   1 or					\ reset bit or'd with device specific
					\ value from above
   h# 6804 breg-base + my-rl!		\ Reset Core Clocks (self-clearing)
   100 ms				\ PCI-E requires 100ms
   2			mhcr-set	\ Disable Interrupts
   bcm5714<reva2? if                    \ disable parity bit on BCM-5714 A1
      h# 106
   else
      h# 146
   then
   4	my-w!				\ Enable Memory Space Decode    
   clear-pci-status
   2		h# 42	my-wclear	\ Disable PCI-X Relaxed Ordering
;

: enable-mac-mem  ( -- )
   2		h# 4000	breg-bset	\ Enable MAC Memory Arbitrator
;

: mhcr-config  ( -- )
   h# 4c	mhcr-clear		\ Clear Endian swap bits before setting
   pci-swap	mhcr-set		\ Enable Endian word/byte swap

   enable-mac-mem			\ Enable MAC Memory Arbitrator

   h# 30	mhcr-set		\ Set PCI State to r/w, PCI Clk Control
   h# 102	mhcr-set		\ mask interrupts
   h# 200	mhcr-set		\ Enable tagged status messages
;

: clear-ints  ( -- )			\ Clear interrupts
  0		hpm-im0	breg!		\ clear interrupts
;

: disable-pxe  ( -- error? )
   \ General Communication Memory
   h# 4b657654 dup h# ffff.ffff xor >r	 \ magic disable number
   h# b50 nicmem!
   get-msecs begin			\ wait 750ms or until we see compliment
     h# b50 nicmem@ r@ = if
        r> 2drop 0 exit
      then
      get-msecs over - d# 750 >
   until
   r> 2drop -1
;

: restore-pci-regs  ( -- )
   pci-$line-size   h# c  my-b!
   pci-max-latency  h# d  my-b!
;

: clear-nic-mac-statistics
   h# b00 h# 300 do  0 i nicmem! 4  +loop	\ Clear Mac Stats Block 
;

: clear-host-mac-status  ( -- )
   cpu-dma-base >dma-status-blk /status-blk erase
;

: mode-ctrl-config  ( -- )
   h# 36	mode-ctrl-clear		\ Clear endian-swap bits before setting
   dma-swap	mode-ctrl-set		\ Enable DMA byte swapping
   h# 2.0000	mode-ctrl-set		\ Enable Host Based Send Rings
   h# 1.0000	mode-ctrl-set		\ Host Stack up (driver ready for rx?)
   h# 90.0000	mode-ctrl-set		\ Disable Psuedo Checksums
;

: nicmem-config  ( -- )
   \ All Default values taken directly from the PRM
   pci-dev-id BCM-5721 <> if		\ use default value for 5721
      h# 8000	h# 4408 breg!		\ Mbuf Pool Base Address (no sram)
   then
   h# 2000	h# 442c breg!		\ DMA Descriptor Pool Base Address
   h# 2000	h# 4430	breg!		\ DMA Descriptor Pool Len
   d# 40	h# 4410 breg!		\ Read DMA Mbuf Low Watermark
   pci-dev-id BCM-5704 = if
      d# 40	h# 4414 breg!		\ Mac Rx Mbuf Low Watermark
      h# 10000	h# 440c breg!		\ Mbuf Pool Len
   else
      d# 20	h# 4414 breg!		\ Mac Rx Mbuf Low Watermark
      pci-dev-id BCM-5721 <> if		\ use default value for 5721
         h# 18000	h# 440c breg!	\ Mbuf Pool Len
      then
   then
   d# 60	h# 4418	breg!		\ Mbuf High Watermark
   5		h# 4434 breg!		\ DMA Descriptor Low Watermark
   d# 10	h# 4438 breg!		\ DMA Descriptor High Watermark
;

: enable-buffer-manager  ( -- enabled? )
   6		h# 4400	breg-bset	\ Enable Buffer Manager
   get-msecs				\ begin poll for enabled (10ms)
   begin
      dup				( msecs msecs )
      h# 4400 breg@ 2 and		( msecs msecs enabled? )
      get-msecs rot - d# 20 >		\ get-msecs has 10ms grain. so wait 20
      or 0<>				( msecs enabled-or-timeup )
   until				\ !(enabled or timeup)
   drop h# 4400 breg@ 2 and		( enabled? )
;

: enable-ftqs  ( -- )
[ifdef] ipmifw-support
   \ Do not issue FTQ reset when IPMI/ASF fw is enabled
   ipmifw-enabled? not if
[then]
   h# ffff.ffff	h# 5c00 breg!		\ Enable internal hardare queues
   0		h# 5c00 breg!		\ first -1 then 0 to FTQ Register
[ifdef] ipmifw-support
   then
[then]
;

: disable-hst-coal  ( -- error? )
   0		h# 3c00	breg!	  \ Disable Host Coalescing
   get-msecs
   begin
     dup
     h# 3c00 breg@
     get-msecs rot - d# 30 < and 0=
   until
   drop h# 3c00 breg@
;

: setup-mac-registers  ( -- error? )
   mhcr-config				\ Setup the Misc Host control register
   clear-ints

   disable-pxe drop 0 if
      cmn-error[ " Unable to disable PXE firmware" ]cmn-end 
      -1 exit
   then

   0 mac-reg!				\ Clear Mac Mode Reg

   pci-dev-id pci-e? if
      h# 7c00 breg@
      1 d# 25 << or 
      h# 7c00 breg!		\ Enable Data FIFO Protect (PCI-E only)
   then

   restore-pci-regs
   clear-pci-status
   clear-host-mac-status
   clear-nic-mac-statistics

   h# 7600.000f	

   pci-dev-id dup BCM-5714 = 
   swap 	  BCM-5715 = or		\ 5714 and 5715 require we set:
   if  h# 8000 or  then  		\ ONE_DMA_AT_ONCE_LOCAL

   h# 6c  my-l!				\ Setup DMA Read/Write Ctrl

   mode-ctrl-config			\ Setup Mode Control register

   h# 6804 breg@
   d# 65 1 << or	
   h# 6804		breg!		\ 66Mhz local timer

   nicmem-config			\ Configure Controller memory

   enable-buffer-manager 0= if
      cmn-error[ " Unable to enable buffer manager" ]cmn-end 
      -1 exit
   then

   enable-ftqs				\ Enable Flow Through Queus
   false				\ No errors
;

: init-rx-rbd  ( rxbuf /rxbuf rxbdadr -- )
   >r
   r@		>rxbd-len	local-w!
   r@		>rxbd-host-adr	local-x!
   0 r@		>rxbd-index	local-w!
   0 r@		>rxbd-type	local-w!
   0 r@		>rxbd-flags	local-w!
   0 r@		>rxbd-ip-cksum	local-w!
   0 r@		>rxbd-tcp-cksum	local-w!
   0 r>		>rxbd-err-flags	local-w!
;

: init-std-rbds  ( -- )
   0 /std-ring bounds do			( )
      i #rxbufs < if				( )
         rxbuf0 i /rxbuf * + cpu>io-adr /rxbuf  ( rxbuf /rxbuf )
      else					( )
         0 0					( 0 0 )
      then					( rxbuf /rxbuf rxbdadr )
      std0 i /rxbd * +				( rxbuf /rxbuf rxbdadr )
      init-rx-rbd				( )
   loop
;

: init-std-ring  ( -- )
   0		h# 2450		breg!	\ Standard Ring Host address (high)
   std0 cpu>io-adr h# 2454	breg!	\ Standard Ring Host address (low)
   pci-dev-id BCM-5721 = if
      h# 200				\ Another BCM-5721 uniqueness
   else
      h# 600
   then

   d# 16 << h# 2458		breg!	\ Size and flags

   h# 6000      h# 245c		breg!	\ controller side ring adr
   2		h# 2c18		breg!	\ Standard Replenish Threshold
   0		hpm-spr-pi	breg!	\ init Standard mailbox
   init-std-rbds
;

: disable-mini-ring  ( -- )
   0		h# 2460		breg!	\ Mini Ring Host address high
   0		h# 2464		breg!
   h# 80 d# 16 << 2 or			\ 80 = size, 2 = disable
   ( reg-val )	h# 2468		breg!	\ Disable Mini Ring
   h# e000      h# 246c		breg!	\ ring adr
   d# 32	h# 2c14		breg!	\ Mini Replenish Threshold (in case)
   0		hpm-mini-pi	breg!	\ init mini mailbox
;

: disable-jmb-ring  ( -- )
   0		h# 2440		breg!	\ Jumbo Ring Host address high
   0		h# 2444		breg!	\ Jumbo Ring Host address low
   h# 2000 d# 16 << 3 or		\ 2000 = size, 3 = disabled,jumbo
   ( reg-val )	h# 2448		breg!	\ Disable Jumbo Ring
   h# 7000      h# 244c		breg!	\ ring adr
   d# 128	h# 2c1c		breg!	\ Jumbo Replensih Threshold (in case)
   0		hpm-jumbo-pi	breg!	\ init jumbo mailbox
;

: rcb-fill ( flags len nic-adr host-adr ring-adr -- )
   tuck >rcb-host-adr	nicmem-x!	(  flags len nic-adr ring-adr )
   tuck >rcb-nic-adr	nicmem!		(  flags len ring-adr )
   -rot d# 16 << or			( ring-adr len-flags )
   swap >rcb-len-flags	nicmem!		( len-flags ring-adr )
;

: disable-tx-ring  ( n -- )
   1- >r
   2 /txring				\ flag = disable, len = /txring
   4000 0				\ nic-adr = 4000, host-adr = 0
   r> /rcb * h# 100 +			\ controller side rcb address
   rcb-fill
;

: enable-tx-ring  ( n -- )
   1- >r
   0 /txring				\ no flags, len = /txring
   r@ /txbd * /txring * 4 / h# 4000 +	\ nic-adr algorithm from prm
   r@ /txring * txbd0 + cpu>io-adr	\ host ring address
   r> /rcb * h# 100 +			\ controller side rcb address
   rcb-fill
;

: disable-rx-ring  ( n -- )
   1- >r
   2 /rxring				\ flags = disable, len = /rxring
   0 0					\ nic-adr = 0, host-adr = 0
   r> /rcb * h# 200 +			\ contoller side rcb address
   rcb-fill
;

: enable-rx-ring  ( n -- )
   1- >r
   0 /rxring				\ flags = 0, len = /rxring
   0					\ nic-adr not used
   r@ /rxring * rrbd0 + cpu>io-adr	\ host side address
   r> /rcb * h# 200 +			\ controller side rcb address
   rcb-fill
;

: init-tx-rings  ( -- )
   1 d# 16 bounds do 
      i dup #txrings <= if 
         enable-tx-ring
      else
         disable-tx-ring 
      then
   loop
   h# 300 h# 80 bounds do  0 i nicmem! 4  +loop		\ clear tx host pis
   h# 380 h# 80 bounds do  0 i nicmem! 4  +loop		\ clear tx nic pis 
;

: init-rx-rings  ( n -- )
   1 d# 16 bounds do 
      i dup #rxrings <= if 
         enable-rx-ring
      else
         disable-rx-ring 
      then
   loop
;

: backoff-seed-init  ( -- )
   0 mac-address bounds do  i c@ +  loop h# 3ff and	( seed )
   h# 438 breg!		\ Random Backoff seed
;

: mac-adr-config  ( -- )
   backoff-seed-init
   0 mac-address bounds do  d# 8 << i c@ or  loop xlsplit	( lo hi )

   2dup h# 410 breg!
	h# 414 breg!

   2dup h# 418 breg!
	h# 41c breg!

   2dup h# 420 breg!
	h# 424 breg!

	h# 428 breg!
	h# 42c breg!
;

: set-loop-mode ( -- )
   h# 10 mac-reg-set		\ mac loopback
;

: set-promis-mode ( -- )
   h# 100 h# 468 breg-bset
;

: init-mac-mode  ( -- )
   mac-mode  case
      int-loopback  of  set-loop-mode    endof
      promiscuous   of  set-promis-mode  endof
   endcase
;

: init-mac  ( -- error? )

[ifdef] ipmifw-support
   enable-mem-access			\ Ensure endianness, mem space, arbtr
   ipmifw-enabled? if
      \ Delay needed to give enough time to IPMI/ASF fw to come alive
      \ before we send our state updates. This is handy with 'boot net'
      \ which does multiple open/close of net driver
      d# 2000 ms
      pause-ipmifw			\ Pause IPMI/ASF fw
      bootcode-sig!			\ Write bootcode magic "KevT"
   then
[then]

   reset-core-clks

[ifdef] ipmifw-support
   enable-mem-access			\ Ensure endianness, mem space, arbtr
   ipmifw-enabled? if
      fcode-state-start state-sig!	\ Notify our Start state to IPMI/ASF fw
      check-bootcode-compl		\ Check bootcode compliment ~KevT
   then
[then]

   setup-mac-registers if  -1 exit  then

   init-std-ring
   disable-jmb-ring
   disable-mini-ring
   
   init-tx-rings
   init-rx-rings

   mac-adr-config

   mtu-size	h# 43c	breg!	\ MTU size
   h# 2620	h# 464	breg!	\ IPG recommended value
   8		h# 500	breg!	\ Non matched packets to ring 1
   9		h# 2010	breg!	\ Rx List Configuration (???) ### MATCH SOLARIS
   h# ff.ffff	h# 2018	breg!	\ Rx List Placement Mask
   1		h# 2014 breg-bset \ Statistics enable
   h# ff.ffff	h# c0c	breg!	\ Statistics enable mask
   3		h# c08	breg-bset \ Statistics control register

   disable-hst-coal if
      cmn-error[ " Could not disable Host Coalescing for initialization" ]cmn-end 
      -1 exit
   then

\   d# 150	h# 3c08	breg!	\ Rx Coalescing Ticks
\   d# 150	h# 3c0c	breg!	\ Send Coalescing Ticks
   0		h# 3c08	breg!	\ Rx Coalescing Ticks#######DEBUG########
   0		h# 3c0c	breg!	\ Send Coalescing Ticks   #######DEBUG########

\   d# 10	h# 3c10	breg!	\ Rx Max Coalescing Count
\   d# 10	h# 3c14	breg!	\ Send Max Coalescing Count
   1		h# 3c10	breg!	\ Rx Max Coalescing Count#####DEBUG####
   1		h# 3c14	breg!	\ Send Max Coalescing Count#####DEBUG#####

   0		h# 3c18	breg!	\ (don't) Rx Coalescing Ticks During Interrupt
   0		h# 3c1c	breg!	\ (don't) Tx Coalescing Ticks During Interrupt
   
   0		h# 3c20	breg!	\ Rx Max Coalesced Frames During Interrupt
   0		h# 3c24	breg!	\ Send Max Coalesced Frames During Interrupt
   
   io-dma-base	>dma-status-blk h# 3c38 breg-x! \ Status Block host adr
   io-dma-base	>dma-stat-blk   h# 3c30 breg-x! \ Statisticss Block host adr

   d# 1.000.000	h# 3c28	breg!	\ Statistics Tick Counter Reg (recommended)

   h# 300	h# 3c40	breg!	\ NIC Statistics Base adr
   h# b00	h# 3c44	breg!	\ NIC Status Block Base adr reg

   2		h# 3c00	breg-bset \ enable host coalescing engine
   6		h# 3000	breg-bset \ Enable BD completion functional block
   2		h# 2000	breg-bset \ Enable Rx list placement functional block
   6		h# 3400	breg-bset \ Enable Rx list selector functional block
   h# e0.0000	mac-reg-set	  \ Enable DMA engines (Mac Mode Register)
   h# d800	mac-reg-set	  \ Enable Statistcs   (Mac Mode Register)

   h# 01009608	h# 6808	breg!	\ Misc Local Control (device specific!!!)
				\ defines gpio pins.  This value matches
				\ Solaris.

   0		hpm-im0	breg!	\ Zero interrupt mailbox 0
   2		h# 6400	breg!	\ Enable DMA Completion Functional Block
   h# 3fe	h# 4c00	breg!	\ Configure write DMA Mode Reg
   h# 3fe	h# 4800	breg!	\ Configure read DMA Mode Reg
   6		h# 2800	breg!	\ Enable Rx data completion functional block
   2		h# 3800	breg!	\ Enable Mbuf cluster free functional block
   2		h# 1000	breg!	\ Enable Send Data Completion functional block
   6		h# 1c00	breg!	\ Enable Send BD Completion functional block
   6		h# 2c00	breg!	\ Enable Rx BD Initiator functional block
   h# 12	h# 2400	breg!	\ Enable Rx Data & BD Intiator functionalblock
   2		h# c00	breg!	\ Enable Send Data Initiator functional block
   6		h# 1800	breg!	\ Enable Send BD Initiator functional block
   6		h# 1400	breg!	\ Enable Send BD Descriptor functional block

   enable-txmac			\ Enable Tx mac
   enable-rxmac			\ Enable Rx mac

   h# c.0000	h# 454	breg-bset \ Disable auto polling
    
   h# 2000000	h# 40c	breg!	\ LED Control Reg, Blink Period = 15.9 Hz

   init-mac-mode
 
   1		h# 450	breg!	\ Activate link
   #rxbufs	hpm-spr-pi breg!  \ give controller some buffers to use

   h# 1000	h# 408	breg-bset \ set event error interupt
   h# 1c00.0000	mode-ctrl-set	  \ enable dma,mac,flow attention
   2		mhcr-clear	  \ enable PCI (interrupts).  We have pci
				  \ interrupts masked off, this gets the chip
				  \ servicing interrupts internally
   false			  \ If we made it this far there were no errors
;

: set-port-mode  ( -- )	\ GMII or MII
   h# c 400 breg-bclear
   chosen-speed 1000Mbps = if  8  else  4  then  h# 400 breg-bset
;

: set-mac-duplex  ( -- )
   chosen-duplex half-duplex = if  
      2 h# 400 breg-bset 
   else
      2 h# 400 breg-bclear
   then
;

: set-mac-polarity  ( -- )
    h# 400 mac-reg-set
;

: configure-mac  ( -- )
   set-port-mode
   set-mac-duplex
   set-mac-polarity		\ 5701,3,4 boards have non-default polarity
;
Commit	Line	Data
920dae64 AT	1	\ ========== Copyright Header Begin ==========================================
	2	\
	3	\ Hypervisor Software File: bge-mac.fth
	4	\
	5	\ Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
	6	\
	7	\ - Do no alter or remove copyright notices
	8	\
	9	\ - Redistribution and use of this software in source and binary forms, with
	10	\ or without modification, are permitted provided that the following
	11	\ conditions are met:
	12	\
	13	\ - Redistribution of source code must retain the above copyright notice,
	14	\ this list of conditions and the following disclaimer.
	15	\
	16	\ - Redistribution in binary form must reproduce the above copyright notice,
	17	\ this list of conditions and the following disclaimer in the
	18	\ documentation and/or other materials provided with the distribution.
	19	\
	20	\ Neither the name of Sun Microsystems, Inc. or the names of contributors
	21	\ may be used to endorse or promote products derived from this software
	22	\ without specific prior written permission.
	23	\
	24	\ This software is provided "AS IS," without a warranty of any kind.
	25	\ ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES,
	26	\ INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A
	27	\ PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN
	28	\ MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR
	29	\ ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR
	30	\ DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN
	31	\ OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR
	32	\ FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE
	33	\ DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY,
	34	\ ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF
	35	\ SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
	36	\
	37	\ You acknowledge that this software is not designed, licensed or
	38	\ intended for use in the design, construction, operation or maintenance of
	39	\ any nuclear facility.
	40	\
	41	\ ========== Copyright Header End ============================================
	42	id: @(#)bge-mac.fth 1.8 07/05/24
	43	purpose: Initialization of the Mac
	44	copyright: Copyright 2007 Sun Microsystems, Inc. All Rights Reserved
	45	copyright: Use is subject to license terms.
	46
	47	headers
	48
	49	: enable-txmac ( -- ) 2 h# 45c breg-bset ;
	50	: enable-rxmac ( -- ) 2 h# 468 breg-bset ;
	51
	52	\ Misc Host Control Register Operators
	53	: mhcr@ ( -- data ) h# 68 my-l@ ;
	54	: mhcr! ( data -- ) h# 68 my-l! ;
	55	: mhcr-set ( bits -- ) h# 68 my-lset ;
	56	: mhcr-clear ( bits -- ) h# 68 my-lclear ;
	57
	58	\ Mac Mode Register Operators
	59	: mac-reg@ ( -- data ) h# 400 breg@ ;
	60	: mac-reg! ( data -- ) h# 400 breg! ;
	61	: mac-reg-set ( bits -- ) h# 400 breg-bset ;
	62	: mac-reg-clear ( bits -- ) h# 400 breg-bclear ;
	63
	64	\ Mac Mode Control Register Operators
65	: mode-ctrl@ ( -- data ) h# 6800 breg@ ;
66	: mode-ctrl! ( data -- ) h# 6800 breg! ;
67	: mode-ctrl-set ( bits -- ) h# 6800 breg-bset ;
68	: mode-ctrl-clear ( bits -- ) h# 6800 breg-bclear ;
69
70	h# c constant pci-swap
71	h# 36 constant dma-swap
72
73	\ On a chip reset some pci config space gets blown away
74	: save-pci-regs ( -- )
75	h# c my-b@ to pci-$line-size \ Save PCI Cache Line Size
76	2 my-w@ to pci-dev-id \ Save PCI Device ID
77	\ The version id register at offset 8 in the PCI config space
78	\ is not actually initialised unless the seeprom is fitted
79	\ but this information is needed elsewhere for errata
80	\ application checks, so get the revision id from reg
81	\ 6a which is equivalent to bits 23:16 of reg 68 Miscellaneous
82	\ Host Control Register. Also include bits 27:24 so that Ax and
83	\ Bx steppings can be distinguished.
84	h# 6a my-w@ h# fff and to pci-rev-id \ Save asic revision id.
85	h# d my-b@ to pci-max-latency
86	;
87
88	: clear-pci-status ( -- )
89	-1 6 my-w! \ Clear PCI Error Status Reg
90	;
91	: pci-e? ( devce-id -- flag ) \ 5721 currently the only "true" PCI-E
92	BCM-5721 = \ device
93	;
94
95	: bcm5714<reva2? ( -- flag ) \ true for BCM-5714 < A2 revision
96	pci-dev-id BCM-5714 = \ false otherwise
97	h# 8 my-b@ h# a2 < and
98	;
99
100	: reset-core-clks ( -- )
101	pci-swap mhcr-set \ Ensure expected endianness
102	6 4 my-w! \ Enable Memory Space Decode
103	3 mhcr-set \ Disable and Clear Interrupts
104	save-pci-regs \ Save PCI regs cleared on clk reset
105	0
106	pci-dev-id pci-e? if
107	1 d# 29 << or \ Disable GRC Reset on PCI-E block
108	then
109	pci-dev-id BCM-5721 = if
110	1 d# 26 << or \ GPHY powerdown override
111	then \ BGE spec is wishy washy for BCM-5714
112
113	1 or \ reset bit or'd with device specific
114	\ value from above
115	h# 6804 breg-base + my-rl! \ Reset Core Clocks (self-clearing)
116	100 ms \ PCI-E requires 100ms
117	2 mhcr-set \ Disable Interrupts
118	bcm5714<reva2? if \ disable parity bit on BCM-5714 A1
119	h# 106
120	else
121	h# 146
122	then
123	4 my-w! \ Enable Memory Space Decode
124	clear-pci-status
125	2 h# 42 my-wclear \ Disable PCI-X Relaxed Ordering
126	;
127
128	: enable-mac-mem ( -- )
129	2 h# 4000 breg-bset \ Enable MAC Memory Arbitrator
130	;
131
132	: mhcr-config ( -- )
133	h# 4c mhcr-clear \ Clear Endian swap bits before setting
134	pci-swap mhcr-set \ Enable Endian word/byte swap
135
136	enable-mac-mem \ Enable MAC Memory Arbitrator
137
138	h# 30 mhcr-set \ Set PCI State to r/w, PCI Clk Control
139	h# 102 mhcr-set \ mask interrupts
140	h# 200 mhcr-set \ Enable tagged status messages
141	;
142
143	: clear-ints ( -- ) \ Clear interrupts
144	0 hpm-im0 breg! \ clear interrupts
145	;
146
147	: disable-pxe ( -- error? )
148	\ General Communication Memory
149	h# 4b657654 dup h# ffff.ffff xor >r \ magic disable number
150	h# b50 nicmem!
151	get-msecs begin \ wait 750ms or until we see compliment
152	h# b50 nicmem@ r@ = if
153	r> 2drop 0 exit
154	then
155	get-msecs over - d# 750 >
156	until
157	r> 2drop -1
158	;
159
160	: restore-pci-regs ( -- )
161	pci-$line-size h# c my-b!
162	pci-max-latency h# d my-b!
163	;
164
165	: clear-nic-mac-statistics
166	h# b00 h# 300 do 0 i nicmem! 4 +loop \ Clear Mac Stats Block
167	;
168
169	: clear-host-mac-status ( -- )
170	cpu-dma-base >dma-status-blk /status-blk erase
171	;
172
173	: mode-ctrl-config ( -- )
174	h# 36 mode-ctrl-clear \ Clear endian-swap bits before setting
175	dma-swap mode-ctrl-set \ Enable DMA byte swapping
176	h# 2.0000 mode-ctrl-set \ Enable Host Based Send Rings
177	h# 1.0000 mode-ctrl-set \ Host Stack up (driver ready for rx?)
178	h# 90.0000 mode-ctrl-set \ Disable Psuedo Checksums
179	;
180
181	: nicmem-config ( -- )
182	\ All Default values taken directly from the PRM
183	pci-dev-id BCM-5721 <> if \ use default value for 5721
184	h# 8000 h# 4408 breg! \ Mbuf Pool Base Address (no sram)
185	then
186	h# 2000 h# 442c breg! \ DMA Descriptor Pool Base Address
187	h# 2000 h# 4430 breg! \ DMA Descriptor Pool Len
188	d# 40 h# 4410 breg! \ Read DMA Mbuf Low Watermark
189	pci-dev-id BCM-5704 = if
190	d# 40 h# 4414 breg! \ Mac Rx Mbuf Low Watermark
191	h# 10000 h# 440c breg! \ Mbuf Pool Len
192	else
193	d# 20 h# 4414 breg! \ Mac Rx Mbuf Low Watermark
194	pci-dev-id BCM-5721 <> if \ use default value for 5721
195	h# 18000 h# 440c breg! \ Mbuf Pool Len
196	then
197	then
198	d# 60 h# 4418 breg! \ Mbuf High Watermark
199	5 h# 4434 breg! \ DMA Descriptor Low Watermark
200	d# 10 h# 4438 breg! \ DMA Descriptor High Watermark
201	;
202
203	: enable-buffer-manager ( -- enabled? )
204	6 h# 4400 breg-bset \ Enable Buffer Manager
205	get-msecs \ begin poll for enabled (10ms)
206	begin
207	dup ( msecs msecs )
208	h# 4400 breg@ 2 and ( msecs msecs enabled? )
209	get-msecs rot - d# 20 > \ get-msecs has 10ms grain. so wait 20
210	or 0<> ( msecs enabled-or-timeup )
211	until \ !(enabled or timeup)
212	drop h# 4400 breg@ 2 and ( enabled? )
213	;
214
215	: enable-ftqs ( -- )
216	[ifdef] ipmifw-support
217	\ Do not issue FTQ reset when IPMI/ASF fw is enabled
218	ipmifw-enabled? not if
219	[then]
220	h# ffff.ffff h# 5c00 breg! \ Enable internal hardare queues
221	0 h# 5c00 breg! \ first -1 then 0 to FTQ Register
222	[ifdef] ipmifw-support
223	then
224	[then]
225	;
226
227	: disable-hst-coal ( -- error? )
228	0 h# 3c00 breg! \ Disable Host Coalescing
229	get-msecs
230	begin
231	dup
232	h# 3c00 breg@
233	get-msecs rot - d# 30 < and 0=
234	until
235	drop h# 3c00 breg@
236	;
237
238	: setup-mac-registers ( -- error? )
239	mhcr-config \ Setup the Misc Host control register
240	clear-ints
241
242	disable-pxe drop 0 if
243	cmn-error[ " Unable to disable PXE firmware" ]cmn-end
244	-1 exit
245	then
246
247	0 mac-reg! \ Clear Mac Mode Reg
248
249	pci-dev-id pci-e? if
250	h# 7c00 breg@
251	1 d# 25 << or
252	h# 7c00 breg! \ Enable Data FIFO Protect (PCI-E only)
253	then
254
255	restore-pci-regs
256	clear-pci-status
257	clear-host-mac-status
258	clear-nic-mac-statistics
259
260	h# 7600.000f
261
262	pci-dev-id dup BCM-5714 =
263	swap BCM-5715 = or \ 5714 and 5715 require we set:
264	if h# 8000 or then \ ONE_DMA_AT_ONCE_LOCAL
265
266	h# 6c my-l! \ Setup DMA Read/Write Ctrl
267
268	mode-ctrl-config \ Setup Mode Control register
269
270	h# 6804 breg@
271	d# 65 1 << or
272	h# 6804 breg! \ 66Mhz local timer
273
274	nicmem-config \ Configure Controller memory
275
276	enable-buffer-manager 0= if
277	cmn-error[ " Unable to enable buffer manager" ]cmn-end
278	-1 exit
279	then
280
281	enable-ftqs \ Enable Flow Through Queus
282	false \ No errors
283	;
284
285	: init-rx-rbd ( rxbuf /rxbuf rxbdadr -- )
286	>r
287	r@ >rxbd-len local-w!
288	r@ >rxbd-host-adr local-x!
289	0 r@ >rxbd-index local-w!
290	0 r@ >rxbd-type local-w!
291	0 r@ >rxbd-flags local-w!
292	0 r@ >rxbd-ip-cksum local-w!
293	0 r@ >rxbd-tcp-cksum local-w!
294	0 r> >rxbd-err-flags local-w!
295	;
296
297	: init-std-rbds ( -- )
298	0 /std-ring bounds do ( )
299	i #rxbufs < if ( )
300	rxbuf0 i /rxbuf * + cpu>io-adr /rxbuf ( rxbuf /rxbuf )
301	else ( )
302	0 0 ( 0 0 )
303	then ( rxbuf /rxbuf rxbdadr )
304	std0 i /rxbd * + ( rxbuf /rxbuf rxbdadr )
305	init-rx-rbd ( )
306	loop
307	;
308
309	: init-std-ring ( -- )
310	0 h# 2450 breg! \ Standard Ring Host address (high)
311	std0 cpu>io-adr h# 2454 breg! \ Standard Ring Host address (low)
312	pci-dev-id BCM-5721 = if
313	h# 200 \ Another BCM-5721 uniqueness
314	else
315	h# 600
316	then
317
318	d# 16 << h# 2458 breg! \ Size and flags
319
320	h# 6000 h# 245c breg! \ controller side ring adr
321	2 h# 2c18 breg! \ Standard Replenish Threshold
322	0 hpm-spr-pi breg! \ init Standard mailbox
323	init-std-rbds
324	;
325
326	: disable-mini-ring ( -- )
327	0 h# 2460 breg! \ Mini Ring Host address high
328	0 h# 2464 breg!
329	h# 80 d# 16 << 2 or \ 80 = size, 2 = disable
330	( reg-val ) h# 2468 breg! \ Disable Mini Ring
331	h# e000 h# 246c breg! \ ring adr
332	d# 32 h# 2c14 breg! \ Mini Replenish Threshold (in case)
333	0 hpm-mini-pi breg! \ init mini mailbox
334	;
335
336	: disable-jmb-ring ( -- )
337	0 h# 2440 breg! \ Jumbo Ring Host address high
338	0 h# 2444 breg! \ Jumbo Ring Host address low
339	h# 2000 d# 16 << 3 or \ 2000 = size, 3 = disabled,jumbo
340	( reg-val ) h# 2448 breg! \ Disable Jumbo Ring
341	h# 7000 h# 244c breg! \ ring adr
342	d# 128 h# 2c1c breg! \ Jumbo Replensih Threshold (in case)
343	0 hpm-jumbo-pi breg! \ init jumbo mailbox
344	;
345
346	: rcb-fill ( flags len nic-adr host-adr ring-adr -- )
347	tuck >rcb-host-adr nicmem-x! ( flags len nic-adr ring-adr )
348	tuck >rcb-nic-adr nicmem! ( flags len ring-adr )
349	-rot d# 16 << or ( ring-adr len-flags )
350	swap >rcb-len-flags nicmem! ( len-flags ring-adr )
351	;
352
353	: disable-tx-ring ( n -- )
354	1- >r
355	2 /txring \ flag = disable, len = /txring
356	4000 0 \ nic-adr = 4000, host-adr = 0
357	r> /rcb * h# 100 + \ controller side rcb address
358	rcb-fill
359	;
360
361	: enable-tx-ring ( n -- )
362	1- >r
363	0 /txring \ no flags, len = /txring
364	r@ /txbd * /txring * 4 / h# 4000 + \ nic-adr algorithm from prm
365	r@ /txring * txbd0 + cpu>io-adr \ host ring address
366	r> /rcb * h# 100 + \ controller side rcb address
367	rcb-fill
368	;
369
370	: disable-rx-ring ( n -- )
371	1- >r
372	2 /rxring \ flags = disable, len = /rxring
373	0 0 \ nic-adr = 0, host-adr = 0
374	r> /rcb * h# 200 + \ contoller side rcb address
375	rcb-fill
376	;
377
378	: enable-rx-ring ( n -- )
379	1- >r
380	0 /rxring \ flags = 0, len = /rxring
381	0 \ nic-adr not used
382	r@ /rxring * rrbd0 + cpu>io-adr \ host side address
383	r> /rcb * h# 200 + \ controller side rcb address
384	rcb-fill
385	;
386
387	: init-tx-rings ( -- )
388	1 d# 16 bounds do
389	i dup #txrings <= if
390	enable-tx-ring
391	else
392	disable-tx-ring
393	then
394	loop
395	h# 300 h# 80 bounds do 0 i nicmem! 4 +loop \ clear tx host pis
396	h# 380 h# 80 bounds do 0 i nicmem! 4 +loop \ clear tx nic pis
397	;
398
399	: init-rx-rings ( n -- )
400	1 d# 16 bounds do
401	i dup #rxrings <= if
402	enable-rx-ring
403	else
404	disable-rx-ring
405	then
406	loop
407	;
408
409	: backoff-seed-init ( -- )
410	0 mac-address bounds do i c@ + loop h# 3ff and ( seed )
411	h# 438 breg! \ Random Backoff seed
412	;
413
414	: mac-adr-config ( -- )
415	backoff-seed-init
416	0 mac-address bounds do d# 8 << i c@ or loop xlsplit ( lo hi )
417
418	2dup h# 410 breg!
419	h# 414 breg!
420
421	2dup h# 418 breg!
422	h# 41c breg!
423
424	2dup h# 420 breg!
425	h# 424 breg!
426
427	h# 428 breg!
428	h# 42c breg!
429	;
430
431	: set-loop-mode ( -- )
432	h# 10 mac-reg-set \ mac loopback
433	;
434
435	: set-promis-mode ( -- )
436	h# 100 h# 468 breg-bset
437	;
438
439	: init-mac-mode ( -- )
440	mac-mode case
441	int-loopback of set-loop-mode endof
442	promiscuous of set-promis-mode endof
443	endcase
444	;
445
446	: init-mac ( -- error? )
447
448	[ifdef] ipmifw-support
449	enable-mem-access \ Ensure endianness, mem space, arbtr
450	ipmifw-enabled? if
451	\ Delay needed to give enough time to IPMI/ASF fw to come alive
452	\ before we send our state updates. This is handy with 'boot net'
453	\ which does multiple open/close of net driver
454	d# 2000 ms
455	pause-ipmifw \ Pause IPMI/ASF fw
456	bootcode-sig! \ Write bootcode magic "KevT"
457	then
458	[then]
459
460	reset-core-clks
461
462	[ifdef] ipmifw-support
463	enable-mem-access \ Ensure endianness, mem space, arbtr
464	ipmifw-enabled? if
465	fcode-state-start state-sig! \ Notify our Start state to IPMI/ASF fw
466	check-bootcode-compl \ Check bootcode compliment ~KevT
467	then
468	[then]
469
470	setup-mac-registers if -1 exit then
471
472	init-std-ring
473	disable-jmb-ring
474	disable-mini-ring
475
476	init-tx-rings
477	init-rx-rings
478
479	mac-adr-config
480
481	mtu-size h# 43c breg! \ MTU size
482	h# 2620 h# 464 breg! \ IPG recommended value
483	8 h# 500 breg! \ Non matched packets to ring 1
484	9 h# 2010 breg! \ Rx List Configuration (???) ### MATCH SOLARIS
485	h# ff.ffff h# 2018 breg! \ Rx List Placement Mask
486	1 h# 2014 breg-bset \ Statistics enable
487	h# ff.ffff h# c0c breg! \ Statistics enable mask
488	3 h# c08 breg-bset \ Statistics control register
489
490	disable-hst-coal if
491	cmn-error[ " Could not disable Host Coalescing for initialization" ]cmn-end
492	-1 exit
493	then
494
495	\ d# 150 h# 3c08 breg! \ Rx Coalescing Ticks
496	\ d# 150 h# 3c0c breg! \ Send Coalescing Ticks
497	0 h# 3c08 breg! \ Rx Coalescing Ticks#######DEBUG########
498	0 h# 3c0c breg! \ Send Coalescing Ticks #######DEBUG########
499
500	\ d# 10 h# 3c10 breg! \ Rx Max Coalescing Count
501	\ d# 10 h# 3c14 breg! \ Send Max Coalescing Count
502	1 h# 3c10 breg! \ Rx Max Coalescing Count#####DEBUG####
503	1 h# 3c14 breg! \ Send Max Coalescing Count#####DEBUG#####
504
505	0 h# 3c18 breg! \ (don't) Rx Coalescing Ticks During Interrupt
506	0 h# 3c1c breg! \ (don't) Tx Coalescing Ticks During Interrupt
507
508	0 h# 3c20 breg! \ Rx Max Coalesced Frames During Interrupt
509	0 h# 3c24 breg! \ Send Max Coalesced Frames During Interrupt
510
511	io-dma-base >dma-status-blk h# 3c38 breg-x! \ Status Block host adr
512	io-dma-base >dma-stat-blk h# 3c30 breg-x! \ Statisticss Block host adr
513
514	d# 1.000.000 h# 3c28 breg! \ Statistics Tick Counter Reg (recommended)
515
516	h# 300 h# 3c40 breg! \ NIC Statistics Base adr
517	h# b00 h# 3c44 breg! \ NIC Status Block Base adr reg
518
519	2 h# 3c00 breg-bset \ enable host coalescing engine
520	6 h# 3000 breg-bset \ Enable BD completion functional block
521	2 h# 2000 breg-bset \ Enable Rx list placement functional block
522	6 h# 3400 breg-bset \ Enable Rx list selector functional block
523	h# e0.0000 mac-reg-set \ Enable DMA engines (Mac Mode Register)
524	h# d800 mac-reg-set \ Enable Statistcs (Mac Mode Register)
525
526	h# 01009608 h# 6808 breg! \ Misc Local Control (device specific!!!)
527	\ defines gpio pins. This value matches
528	\ Solaris.
529
530	0 hpm-im0 breg! \ Zero interrupt mailbox 0
531	2 h# 6400 breg! \ Enable DMA Completion Functional Block
532	h# 3fe h# 4c00 breg! \ Configure write DMA Mode Reg
533	h# 3fe h# 4800 breg! \ Configure read DMA Mode Reg
534	6 h# 2800 breg! \ Enable Rx data completion functional block
535	2 h# 3800 breg! \ Enable Mbuf cluster free functional block
536	2 h# 1000 breg! \ Enable Send Data Completion functional block
537	6 h# 1c00 breg! \ Enable Send BD Completion functional block
538	6 h# 2c00 breg! \ Enable Rx BD Initiator functional block
539	h# 12 h# 2400 breg! \ Enable Rx Data & BD Intiator functionalblock
540	2 h# c00 breg! \ Enable Send Data Initiator functional block
541	6 h# 1800 breg! \ Enable Send BD Initiator functional block
542	6 h# 1400 breg! \ Enable Send BD Descriptor functional block
543
544	enable-txmac \ Enable Tx mac
545	enable-rxmac \ Enable Rx mac
546
547	h# c.0000 h# 454 breg-bset \ Disable auto polling
548
549	h# 2000000 h# 40c breg! \ LED Control Reg, Blink Period = 15.9 Hz
550
551	init-mac-mode
552
553	1 h# 450 breg! \ Activate link
554	#rxbufs hpm-spr-pi breg! \ give controller some buffers to use
555
556	h# 1000 h# 408 breg-bset \ set event error interupt
557	h# 1c00.0000 mode-ctrl-set \ enable dma,mac,flow attention
558	2 mhcr-clear \ enable PCI (interrupts). We have pci
559	\ interrupts masked off, this gets the chip
560	\ servicing interrupts internally
561	false \ If we made it this far there were no errors
562	;
563
564	: set-port-mode ( -- ) \ GMII or MII
565	h# c 400 breg-bclear
566	chosen-speed 1000Mbps = if 8 else 4 then h# 400 breg-bset
567	;
568
569	: set-mac-duplex ( -- )
570	chosen-duplex half-duplex = if
571	2 h# 400 breg-bset
572	else
573	2 h# 400 breg-bclear
574	then
575	;
576
577	: set-mac-polarity ( -- )
578	h# 400 mac-reg-set
579	;
580
581	: configure-mac ( -- )
582	set-port-mode
583	set-mac-duplex
584	set-mac-polarity \ 5701,3,4 boards have non-default polarity
585	;