[OpenSPARC-T2-SAM] / obp / obp / dev / serial / su16550 / io.fth

\ ========== Copyright Header Begin ==========================================
\ 
\ Hypervisor Software File: io.fth
\ 
\ Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
\ 
\  - Do no alter or remove copyright notices
\ 
\  - Redistribution and use of this software in source and binary forms, with 
\    or without modification, are permitted provided that the following 
\    conditions are met: 
\ 
\  - Redistribution of source code must retain the above copyright notice, 
\    this list of conditions and the following disclaimer.
\ 
\  - Redistribution in binary form must reproduce the above copyright notice,
\    this list of conditions and the following disclaimer in the
\    documentation and/or other materials provided with the distribution. 
\ 
\    Neither the name of Sun Microsystems, Inc. or the names of contributors 
\ may be used to endorse or promote products derived from this software 
\ without specific prior written permission. 
\ 
\     This software is provided "AS IS," without a warranty of any kind. 
\ ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, 
\ INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A 
\ PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN 
\ MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR 
\ ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR 
\ DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN 
\ OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR 
\ FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE 
\ DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY, 
\ ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF 
\ SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
\ 
\ You acknowledge that this software is not designed, licensed or
\ intended for use in the design, construction, operation or maintenance of
\ any nuclear facility. 
\ 
\ ========== Copyright Header End ============================================
id: @(#)io.fth 1.11 05/02/02
purpose: 
copyright: Copyright 2005 Sun Microsystems, Inc.  All Rights Reserved
copyright: Use is subject to license terms.

headers
d# 90   constant ubufsize
ubufsize buffer: ubuf
0 	value  getptr
0 	value  putptr
0 	value  endptr

h# 10 constant msr-cts

variable ttylock

: initubuf  ( -- )
   ubuf  is  getptr
   ubuf  is  putptr
   ubuf ubufsize + is endptr
;

\ put key into uart buffer, ignoring overun
: bput	( key -- )	\ put key into buffer
   putptr endptr >= if  ubuf is putptr  then
   putptr c! putptr 1+ is putptr
;

\ clear the uart buffer for put task
: bputclr  ( -- )  getptr is putptr  ;


\ Fetch a key from buffer
: bget	( -- key )
   getptr endptr >= if  ubuf is getptr  then
   getptr c@ getptr 1+ is getptr
;

\ return TRUE if uart buffer is empty.
: ubuf-empty? 	( -- flag )  getptr putptr =  ;

headerless
: usea  ( -- )  uartbase to uart  ;
: useb  ( -- )  uartbase to uart  ;

create init-table
  h# 00 c, h# 01 c,	\ Interrupt Enable Register = disable all interrupts
  h# 00 c, h# 04 c,	\ Modem Control Register = disable all Modem fcns
  h# 00 c, h# 02 c,	\ FIFO Control Register = 0
  h# 01 c, h# 02 c,	\ FIFO Control Register = 1
  h# 83 c, h# 03 c,	\ Line Control Register = 83
  h# 60 c, h# 00 c,	\ Divisor Latch Register LSB
  h# 00 c, h# 01 c,	\ Divisor Latch Register MSB
  h# 03 c, h# 03 c,	\ Line Control Register = 03
\  h# 00 c, h# 04 c,	\ Modem Control Register unchanged
\  h# 10 c, h# 04 c,	\ Modem Control Register = enable Loopback Mode
  h# 08 c, h# 04 c,	\ Modem Control Register = IRQ enable
here init-table - constant #table-size

: uart!  ( c offset -- )  uart + c!  ;
: uart@  ( offset -- c )  uart + c@  ;

\ read SIO modem status register
: msr@  ( -- byte )  h# 06 uart@  ;

\ bsc is ready if CTS is asserted
: hw-bsc-ready?  ( -- ready? )  msr@ msr-cts and  ;

defer bsc-ready?  ( -- ready? )		\ depends on flow control
' true is bsc-ready?			\ default is no flow control

\ Receive Buffer Register RO
: rbr@  ( -- c )  0 uart@  ;

\ Transmit Holding Register WO
: thr!  ( c -- )  0 uart!  ;

0 value IER-reg		\ IER contents at entry

\ Interrupt Enable Register
: ier!  ( c -- )  1 uart!  ;
: ier@  ( -- c )  1 uart@  ;

: disable_tx_int  ( -- )
   ier@ dup to IER-reg  h# fd and ier!
;

: restore_tx_int  ( -- )
   IER-reg ier!
;

variable LSR-reg	\ LSR shadow

\ Line Status Register RO
: lsr@  ( -- c )  5 uart@ dup  LSR-reg c@ or LSR-reg c!  ;

: inituart  ( -- )
   initubuf
   \ One time init stuff goes here.
   init-table #table-size bounds  ?do
      i c@ i 1+ c@ uart!
   2 +loop
;

\ Test for "break" character received.
: ubreak?  ( -- flag )  lsr@ drop LSR-reg c@ h# 10 and  ;

: uemit?  ( -- flag )
   bsc-ready? if
      lsr@ h# 20 and
   else
      1 ms
      0
   then
;

: uemit  ( char -- )  begin  uemit?  until  thr!  ;

: (ukey?)  ( -- flag )  lsr@ h# 01 and  ;
: (ukey)   ( -- key )   begin  (ukey?)  until  rbr@  ;

\ Wait for characters to finish transmitting
: uwait  ( -- )  begin  lsr@ h# 40 and  until  ;

\ This is called from Solaris under certain circumstances
\ such as early boot and panics.
\ In order to prevent MP systems registering spurious interrupts on
\ the CPU(s) not in OBP, or to prevent corruption of console I/O by
\ OBP and the console driver writing at the same time at the start of
\ panic handling, disable the THRE (tx) interrupt during the write.
\ Restore the state of the interrupt before waiting for the last
\ character to finish transmitting, this will ensure that Solaris
\ will see a tx interrupt in the case that it is waiting for one ie
\ OBP was called with data in the FIFO.
: uwrite  ( adr len -- #written )
   ttylock on
   disable_tx_int
   tuck  bounds  ?do	( len )
      i c@  uemit	( len )
   loop			( len )
   restore_tx_int	( len )
   uwait		( len )
   ttylock off		( len )
;

: uread  ( -- )
   ttylock on
   begin  (ukey?)  while  (ukey) bput  repeat
   ttylock off
;

: ukey?  ( -- flag )  uread  ubuf-empty? 0=  ;

: ukey   ( -- char )  begin  ukey?  until  bget  ;

: clear-break  ( -- )
   ukey? drop bputclr
   0 LSR-reg c!
;

headerless
d# 24.000.000	constant xtal-clk
d# 13 d# 16 *	constant chip-div

: fifo!  ( data -- )  h# 02 uart!  ;
: lcr!   ( data -- )  h# 03 uart!  ;
: mcr!   ( data -- )  h# 8 or  h# 04 uart!  ;
: mcr@   ( -- data )  h# 04 uart@  ;

struct
  1 field LCR-reg	\ Line Control
  1 field MCR-reg	\ Modem Control
drop
variable shadow-regs

\ Set the s/w version of the Line Control Register
: set-bits  ( data addr -- )  tuck  c@ or  swap c!  ;
: set-lcr  ( data -- )  shadow-regs LCR-reg set-bits  ;
: set-mcr  ( data -- )  shadow-regs MCR-reg set-bits  ;

: hold-uart  ( -- )
  h# 00 fifo!	\ Disable and clear FIFOs
;

: release-uart  ( -- )
  5 uart@ drop          \ clear error bits in LSR
  shadow-regs			( addr )
  dup LCR-reg c@ lcr!	\ Write LCR (and select bank 0)
  MCR-reg c@ mcr!	\ write MCR reg
  h# 01 fifo!		\ FIFOs enabled
  1 ms                  \ Allow device to stabilize.
;			\ This delay is necessary to prevent
			\ garbage characters from being sent out on
			\ the first transmit resulting in a framing
			\ error. For some reason this device needs
			\ a moment to stabilize.

: set-baud  ( baud -- )
  chip-div *		( baud' )
  xtal-clk d# 8 <<	( baud' clk' )
  swap / d# 8 >>	( divisor )
  wbsplit		( lo hi )
  h# 83 lcr!            ( lo hi )       \ select Bank 1
  h# 01 uart!		( lo )		\ Write Hi Div
  h# 00 uart!		( -- )		\ Write Lo Div
  h# 03 lcr!            ( -- )          \ select Bank 0
;

: set-dtr-rts  ( on? -- )
   mcr@ swap
   if  3 or
   else  3 invert and
   then
   set-mcr
;

: set-databits  ( #bits -- )
  case
    5 of  h# 00  endof		\ 5 bits data
    6 of  h# 01  endof		\ 6 bits data
    7 of  h# 02  endof		\ 7 bits data
    8 of  h# 03  endof		\ 8 bits data
  endcase			( data )
  shadow-regs LCR-reg c!	( -- )
;

: set-parity  ( parity -- )
  case
    p.mark  of  h# 28  endof	\ mark
    p.even  of  h# 18  endof	\ even
    p.odd   of  h# 08  endof	\ odd
    p.none  of  h#  0  endof	\ none
    p.space of  h# 38  endof	\ space
  endcase			( data )
  set-lcr			(  )
;

: set-stopbits  ( #stp -- )
  1- if  h# 04 set-lcr  then
;

: no-flow-ctrl  ( -- )
   ['] true is bsc-ready?
;

: hard-flow-ctrl  ( -- )
   ['] hw-bsc-ready? is bsc-ready?
;

\ XXX needs work looking at the input chars as they arrive:
: soft-flow-ctrl  ( -- )
   ." XXXX unimp: su16550 handshake" cr
   ['] true is bsc-ready?
;

: set-handshake  ( hs -- )
   case
      hs.none of  no-flow-ctrl    endof
      hs.hw   of  hard-flow-ctrl  endof
      hs.sw   of  soft-flow-ctrl  endof
   endcase
;

headers

\ mode parameter is switching between 232 and 433 (sp?)
: config-serial  ( hs stp prty dbits baud dtr-rts-on? mode -- )
   hold-uart		( hs stp prty dbits baud dtr-rts-on? mode )
   rs-mode-select	( hs stp prty dbits baud dtr-rts-on? )
   set-dtr-rts		( hs stp prty dbits baud )
   set-baud		( hs stp prty dbits )
   set-databits		( hs stp prty )
   set-parity		( hs stp )
   set-stopbits		( hs )
   set-handshake	(  )
   release-uart		(  )
;

headerless
Commit	Line	Data
920dae64 AT	1	\ ========== Copyright Header Begin ==========================================
	2	\
	3	\ Hypervisor Software File: io.fth
	4	\
	5	\ Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
	6	\
	7	\ - Do no alter or remove copyright notices
	8	\
	9	\ - Redistribution and use of this software in source and binary forms, with
	10	\ or without modification, are permitted provided that the following
	11	\ conditions are met:
	12	\
	13	\ - Redistribution of source code must retain the above copyright notice,
	14	\ this list of conditions and the following disclaimer.
	15	\
	16	\ - Redistribution in binary form must reproduce the above copyright notice,
	17	\ this list of conditions and the following disclaimer in the
	18	\ documentation and/or other materials provided with the distribution.
	19	\
	20	\ Neither the name of Sun Microsystems, Inc. or the names of contributors
	21	\ may be used to endorse or promote products derived from this software
	22	\ without specific prior written permission.
	23	\
	24	\ This software is provided "AS IS," without a warranty of any kind.
	25	\ ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES,
	26	\ INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A
	27	\ PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN
	28	\ MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR
	29	\ ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR
	30	\ DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN
	31	\ OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR
	32	\ FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE
	33	\ DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY,
	34	\ ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF
	35	\ SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
	36	\
	37	\ You acknowledge that this software is not designed, licensed or
	38	\ intended for use in the design, construction, operation or maintenance of
	39	\ any nuclear facility.
	40	\
	41	\ ========== Copyright Header End ============================================
	42	id: @(#)io.fth 1.11 05/02/02
	43	purpose:
	44	copyright: Copyright 2005 Sun Microsystems, Inc. All Rights Reserved
	45	copyright: Use is subject to license terms.
	46
	47	headers
	48	d# 90 constant ubufsize
	49	ubufsize buffer: ubuf
	50	0 value getptr
	51	0 value putptr
	52	0 value endptr
	53
	54	h# 10 constant msr-cts
	55
	56	variable ttylock
	57
	58	: initubuf ( -- )
	59	ubuf is getptr
	60	ubuf is putptr
	61	ubuf ubufsize + is endptr
	62	;
	63
	64	\ put key into uart buffer, ignoring overun
65	: bput ( key -- ) \ put key into buffer
66	putptr endptr >= if ubuf is putptr then
67	putptr c! putptr 1+ is putptr
68	;
69
70	\ clear the uart buffer for put task
71	: bputclr ( -- ) getptr is putptr ;
72
73
74	\ Fetch a key from buffer
75	: bget ( -- key )
76	getptr endptr >= if ubuf is getptr then
77	getptr c@ getptr 1+ is getptr
78	;
79
80	\ return TRUE if uart buffer is empty.
81	: ubuf-empty? ( -- flag ) getptr putptr = ;
82
83	headerless
84	: usea ( -- ) uartbase to uart ;
85	: useb ( -- ) uartbase to uart ;
86
87	create init-table
88	h# 00 c, h# 01 c, \ Interrupt Enable Register = disable all interrupts
89	h# 00 c, h# 04 c, \ Modem Control Register = disable all Modem fcns
90	h# 00 c, h# 02 c, \ FIFO Control Register = 0
91	h# 01 c, h# 02 c, \ FIFO Control Register = 1
92	h# 83 c, h# 03 c, \ Line Control Register = 83
93	h# 60 c, h# 00 c, \ Divisor Latch Register LSB
94	h# 00 c, h# 01 c, \ Divisor Latch Register MSB
95	h# 03 c, h# 03 c, \ Line Control Register = 03
96	\ h# 00 c, h# 04 c, \ Modem Control Register unchanged
97	\ h# 10 c, h# 04 c, \ Modem Control Register = enable Loopback Mode
98	h# 08 c, h# 04 c, \ Modem Control Register = IRQ enable
99	here init-table - constant #table-size
100
101	: uart! ( c offset -- ) uart + c! ;
102	: uart@ ( offset -- c ) uart + c@ ;
103
104	\ read SIO modem status register
105	: msr@ ( -- byte ) h# 06 uart@ ;
106
107	\ bsc is ready if CTS is asserted
108	: hw-bsc-ready? ( -- ready? ) msr@ msr-cts and ;
109
110	defer bsc-ready? ( -- ready? ) \ depends on flow control
111	' true is bsc-ready? \ default is no flow control
112
113	\ Receive Buffer Register RO
114	: rbr@ ( -- c ) 0 uart@ ;
115
116	\ Transmit Holding Register WO
117	: thr! ( c -- ) 0 uart! ;
118
119	0 value IER-reg \ IER contents at entry
120
121	\ Interrupt Enable Register
122	: ier! ( c -- ) 1 uart! ;
123	: ier@ ( -- c ) 1 uart@ ;
124
125	: disable_tx_int ( -- )
126	ier@ dup to IER-reg h# fd and ier!
127	;
128
129	: restore_tx_int ( -- )
130	IER-reg ier!
131	;
132
133	variable LSR-reg \ LSR shadow
134
135	\ Line Status Register RO
136	: lsr@ ( -- c ) 5 uart@ dup LSR-reg c@ or LSR-reg c! ;
137
138	: inituart ( -- )
139	initubuf
140	\ One time init stuff goes here.
141	init-table #table-size bounds ?do
142	i c@ i 1+ c@ uart!
143	2 +loop
144	;
145
146	\ Test for "break" character received.
147	: ubreak? ( -- flag ) lsr@ drop LSR-reg c@ h# 10 and ;
148
149	: uemit? ( -- flag )
150	bsc-ready? if
151	lsr@ h# 20 and
152	else
153	1 ms
154	0
155	then
156	;
157
158	: uemit ( char -- ) begin uemit? until thr! ;
159
160	: (ukey?) ( -- flag ) lsr@ h# 01 and ;
161	: (ukey) ( -- key ) begin (ukey?) until rbr@ ;
162
163	\ Wait for characters to finish transmitting
164	: uwait ( -- ) begin lsr@ h# 40 and until ;
165
166	\ This is called from Solaris under certain circumstances
167	\ such as early boot and panics.
168	\ In order to prevent MP systems registering spurious interrupts on
169	\ the CPU(s) not in OBP, or to prevent corruption of console I/O by
170	\ OBP and the console driver writing at the same time at the start of
171	\ panic handling, disable the THRE (tx) interrupt during the write.
172	\ Restore the state of the interrupt before waiting for the last
173	\ character to finish transmitting, this will ensure that Solaris
174	\ will see a tx interrupt in the case that it is waiting for one ie
175	\ OBP was called with data in the FIFO.
176	: uwrite ( adr len -- #written )
177	ttylock on
178	disable_tx_int
179	tuck bounds ?do ( len )
180	i c@ uemit ( len )
181	loop ( len )
182	restore_tx_int ( len )
183	uwait ( len )
184	ttylock off ( len )
185	;
186
187	: uread ( -- )
188	ttylock on
189	begin (ukey?) while (ukey) bput repeat
190	ttylock off
191	;
192
193	: ukey? ( -- flag ) uread ubuf-empty? 0= ;
194
195	: ukey ( -- char ) begin ukey? until bget ;
196
197	: clear-break ( -- )
198	ukey? drop bputclr
199	0 LSR-reg c!
200	;
201
202	headerless
203	d# 24.000.000 constant xtal-clk
204	d# 13 d# 16 * constant chip-div
205
206	: fifo! ( data -- ) h# 02 uart! ;
207	: lcr! ( data -- ) h# 03 uart! ;
208	: mcr! ( data -- ) h# 8 or h# 04 uart! ;
209	: mcr@ ( -- data ) h# 04 uart@ ;
210
211	struct
212	1 field LCR-reg \ Line Control
213	1 field MCR-reg \ Modem Control
214	drop
215	variable shadow-regs
216
217	\ Set the s/w version of the Line Control Register
218	: set-bits ( data addr -- ) tuck c@ or swap c! ;
219	: set-lcr ( data -- ) shadow-regs LCR-reg set-bits ;
220	: set-mcr ( data -- ) shadow-regs MCR-reg set-bits ;
221
222	: hold-uart ( -- )
223	h# 00 fifo! \ Disable and clear FIFOs
224	;
225
226	: release-uart ( -- )
227	5 uart@ drop \ clear error bits in LSR
228	shadow-regs ( addr )
229	dup LCR-reg c@ lcr! \ Write LCR (and select bank 0)
230	MCR-reg c@ mcr! \ write MCR reg
231	h# 01 fifo! \ FIFOs enabled
232	1 ms \ Allow device to stabilize.
233	; \ This delay is necessary to prevent
234	\ garbage characters from being sent out on
235	\ the first transmit resulting in a framing
236	\ error. For some reason this device needs
237	\ a moment to stabilize.
238
239	: set-baud ( baud -- )
240	chip-div * ( baud' )
241	xtal-clk d# 8 << ( baud' clk' )
242	swap / d# 8 >> ( divisor )
243	wbsplit ( lo hi )
244	h# 83 lcr! ( lo hi ) \ select Bank 1
245	h# 01 uart! ( lo ) \ Write Hi Div
246	h# 00 uart! ( -- ) \ Write Lo Div
247	h# 03 lcr! ( -- ) \ select Bank 0
248	;
249
250	: set-dtr-rts ( on? -- )
251	mcr@ swap
252	if 3 or
253	else 3 invert and
254	then
255	set-mcr
256	;
257
258	: set-databits ( #bits -- )
259	case
260	5 of h# 00 endof \ 5 bits data
261	6 of h# 01 endof \ 6 bits data
262	7 of h# 02 endof \ 7 bits data
263	8 of h# 03 endof \ 8 bits data
264	endcase ( data )
265	shadow-regs LCR-reg c! ( -- )
266	;
267
268	: set-parity ( parity -- )
269	case
270	p.mark of h# 28 endof \ mark
271	p.even of h# 18 endof \ even
272	p.odd of h# 08 endof \ odd
273	p.none of h# 0 endof \ none
274	p.space of h# 38 endof \ space
275	endcase ( data )
276	set-lcr ( )
277	;
278
279	: set-stopbits ( #stp -- )
280	1- if h# 04 set-lcr then
281	;
282
283	: no-flow-ctrl ( -- )
284	['] true is bsc-ready?
285	;
286
287	: hard-flow-ctrl ( -- )
288	['] hw-bsc-ready? is bsc-ready?
289	;
290
291	\ XXX needs work looking at the input chars as they arrive:
292	: soft-flow-ctrl ( -- )
293	." XXXX unimp: su16550 handshake" cr
294	['] true is bsc-ready?
295	;
296
297	: set-handshake ( hs -- )
298	case
299	hs.none of no-flow-ctrl endof
300	hs.hw of hard-flow-ctrl endof
301	hs.sw of soft-flow-ctrl endof
302	endcase
303	;
304
305	headers
306
307	\ mode parameter is switching between 232 and 433 (sp?)
308	: config-serial ( hs stp prty dbits baud dtr-rts-on? mode -- )
309	hold-uart ( hs stp prty dbits baud dtr-rts-on? mode )
310	rs-mode-select ( hs stp prty dbits baud dtr-rts-on? )
311	set-dtr-rts ( hs stp prty dbits baud )
312	set-baud ( hs stp prty dbits )
313	set-databits ( hs stp prty )
314	set-parity ( hs stp )
315	set-stopbits ( hs )
316	set-handshake ( )
317	release-uart ( )
318	;
319
320	headerless