[OpenSPARC-T2-SAM] / obp / obp / dev / southbridge / ontario / isa / init.fth

\ ========== Copyright Header Begin ==========================================
\ 
\ Hypervisor Software File: init.fth
\ 
\ Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
\ 
\  - Do no alter or remove copyright notices
\ 
\  - Redistribution and use of this software in source and binary forms, with 
\    or without modification, are permitted provided that the following 
\    conditions are met: 
\ 
\  - Redistribution of source code must retain the above copyright notice, 
\    this list of conditions and the following disclaimer.
\ 
\  - Redistribution in binary form must reproduce the above copyright notice,
\    this list of conditions and the following disclaimer in the
\    documentation and/or other materials provided with the distribution. 
\ 
\    Neither the name of Sun Microsystems, Inc. or the names of contributors 
\ may be used to endorse or promote products derived from this software 
\ without specific prior written permission. 
\ 
\     This software is provided "AS IS," without a warranty of any kind. 
\ ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, 
\ INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A 
\ PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN 
\ MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR 
\ ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR 
\ DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN 
\ OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR 
\ FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE 
\ DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY, 
\ ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF 
\ SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
\ 
\ You acknowledge that this software is not designed, licensed or
\ intended for use in the design, construction, operation or maintenance of
\ any nuclear facility. 
\ 
\ ========== Copyright Header End ============================================
id: @(#)init.fth 1.1 06/02/16 
purpose: 
copyright: Copyright 2006 Sun Microsystems, Inc.  All Rights Reserved
copyright: Use is subject to license terms.

fload ${BP}/dev/southbridge/isa/registers.fth
fload ${BP}/dev/southbridge/isa-devices/superio/registers.fth

headerless

h# 0600  constant smb-base
h# 0800  constant acpi-base

\ This used to be done in Fiesta's Reset, now it's done here...

\ Extract Southbridge's bus number for back-door access to PMU and IDE config space
my-space h# ff0000 and h#  800 or constant pmu-config-base
my-space h# ff0000 and h# 4000 or constant ide-config-base

: sbr! swap my-space        or config-b! ;  \ Initialize ISA
: pmu! swap pmu-config-base or config-b! ;  \ Initialize PMU, Device 1
: ide! swap ide-config-base or config-b! ;  \ Initialize IDE, Device 8

: init-sb ( -- )
   h# 40  h# 11	sbr!		\ DMA line buffer enable, Passive release enable
   h# 58  h# 00	sbr!		\ IDE disable - WORKAROUND is RESET IDE
   h# 4a  h# 00	sbr!		\ Disable USB2 - WORKAROUND
   h# 7e  h# 01	sbr!		\ Disable USB2, Audio > 2GB WORKAROUND
   h# 53  h# 40	sbr!		\ Disable USB1 - WORKAROUND
   h# 42  h# 4b	sbr!		\ 32-bit DMA addressing; ISA SYSCLK = PCICLK/4 (apnote5)
   h# 44  h# 83	sbr!		\ Primary IDE IRQ[10]
   h# 45  h# 08 sbr!            \ Parity check disable; Enable discard timer timeout
   h# 48  h# 00	sbr!		\ PCI Interrupt routing table 1 (PIRT1)
   h# 49  h# 00	sbr!		\ PIRT2
   h# 4a  h# 06	sbr!		\ USB2 [IRQ 7] in APIC mode (see apnote 7)
   h# 4b  h# 00	sbr!		\ PIRT4; Audio interrupt DISABLE
   h# 50  h# 00	sbr!		\ Parity check control (low)
   h# 51  h# 00	sbr!		\ Parity check control (high)
   h# 52  h# 00 sbr!		\ USB control (low)
   h# 53  h# 20	sbr!		\ USB1 enable; RTC port read enable
   h# 58  h# 64	sbr!		\ IDE enable; IDSEL=A24; keep secondary IDE tri-state
   h# 5f  h# 08	sbr!		\ Unlock bits[9:4] of M1535D command register (0x4)
   h# 6c  h# 80	sbr!		\ Enable "discreet interrupt" mode (NEW. Was h# 80)
   h# 6d  h# 20	sbr!		\ Release PCI bus on ISA/DMA Master cycle retry
   h# 72  h# 0a	sbr!		\ PMU IDSEL=A17; USB IDSEL=A21
   h# 74  h# 47	sbr!		\ USB1 [IRQ 6]
   h# 76  h# 00	sbr!		\ ACPI Intterupt routing table
   h# 77  h# 48	sbr!		\ Audio disabled, Modem disabled
   h# 7d  h# 80 sbr!		\ USB2 IDSEL=A22
   h# 7e  h# 80 sbr!		\ USB2 Enable

   h# 79  h# 02	sbr!		\ Multifunction pin select 2 (CHECK THIS)
   h# 7a  h# 00	sbr!		\ Multifunction pin select 2 (CHECK THIS)
   h# 7b  h# 04	sbr!		\ Multifunction pin select 2 (CHECK THIS)
   h# 7c  h# 00	sbr!		\ Multifunction pin select 3 (CHECK THIS)

;

: init-pmu ( -- )
   h# e0  acpi-base h# ff and pmu!
   h# e1  acpi-base 8 >> h# ff and pmu!	\ ACPI @ PCI I/O 0500

   h# e2  smb-base h# ff and pmu!
   h# e3  smb-base 8 >> h# ff and pmu!	\ SMB  @ PCI I/0 0600

   h# d1  h# 06 pmu!		\ Enable SMB & ACPI address spaces
   h# f0  h# 41 pmu!		\ Enable SMB Host controller
   h# f0  h# 05 pmu!		\ Enable SMB Host controller, I2C mode
   h# f2  h# 20 pmu!		\ SMB clock
   h# f2  h# 88 pmu!		\ SMB clock XXXX

   h# bb  h# 03	pmu!		\ GPO 36 & 37
   h# ba  h# 00	pmu!		\ GPO36 = 0 (flash WE)

   h# 6c  h# 00 pmu!		\ System events
   h# 6d  h# 00 pmu!		\ System events
   h# 6e  h# 40 pmu!		\ Floppy event on grover (CHECK THIS)
   h# 6f  h# 01 pmu!		\ Floppy event on grover (CHECK THIS)

   h# 70  h# 0f pmu!		\ Positive Decoding ranges (CHECK THIS) 
   h# 71  h# 11 pmu!		\ (CHECK THIS)

   h# 77  h# 08 pmu!		\ Enable SMI
   h# b1  h# 40 pmu!		\ Enable emergency OFF
   h# b3  h# 04	pmu!		\ LED on (SPLED drives lo), pwr btn overide disable
   h# b2  h# 40 pmu!		\ Enable Beep


   h# 89  h# 02 pmu!		\ RMC_RST (GPO39) output
   h# 9a  h# 0f	pmu!		\ RMC_HRT_BT (GPO0), SB_PROM_A20 (GPO1), 
				\ FLASH_UPDATE (GPO2), FAN_BLAST_N (GPO3)
;

: init-ide ( -- )
   h# 09  h# ff ide!
   h# 10  h# 00 ide!
   h# 11  h# 00 ide!
   h# 12  h# 00 ide!
   h# 13  h# 00 ide!
   h# 14  h# 00 ide!
   h# 15  h# 00 ide!
   h# 16  h# 00 ide!
   h# 17  h# 00 ide!
   h# 18  h# 00 ide!
   h# 19  h# 00 ide!
   h# 1a  h# 00 ide!
   h# 1b  h# 00 ide!
   h# 1c  h# 00 ide!
   h# 1d  h# 00 ide!
   h# 1e  h# 00 ide!
   h# 1f  h# 00 ide!
   h# 20  h# 00 ide!
   h# 21  h# 00 ide!
   h# 22  h# 00 ide!
   h# 23  h# 00 ide!
   h# 43  h# 7f ide!
   h# 4a  h# 03 ide!
   h# 4b  h# c0 ide!
   h# 4d  h# 80 ide!
   h# 50  h# 03 ide!
   h# 53  h# 81 ide!
   h# 54  h# 55 ide!
   h# 55  h# 55 ide!
   h# 56  h# 44 ide!
   h# 57  h# 44 ide!
   h# 58  h# 03 ide!
   h# 5c  h# 03 ide!
   h# 72  h# 00 ide!
   h# 7a  h# 00 ide!
   h# 79  h# 02 ide!
;

: init-superio  ( -- )
   enter-cfg-mode
 
   0 devsel
   h# 0  h# 30  sio!                    \ Disable FDC by default
[ifdef] use-floppy?
   0 devsel                             \ FDC
   h# 1 h# 30 sio!                      \ Enable FDC
   h# 6 h# 70 sio!                      \ IRQ 6
   h# 2 h# 74 sio!                      \ DMA channel 2
   h# a h# f0 sio!                      \ AT mode; Non-burst DMA mode
[then]   

   3 devsel
   h# 0  h# 30  sio!                    \ Disable parallel port by default
[ifdef] use-parallel-port?
   3 devsel                             \ Parallel port
   h# 1 h# 30 sio!                      \ Enable parallel port
   h# 7 h# 70 sio!                      \ IRQ 7
   h# 1 h# 74 sio!                      \ DMA channel 1
   h# 8a h# f0 sio!                     \ IRQ active low; ECP; FIFO threshold = 1
[then]   

   4 devsel                             \ UART 1
   h# 3 h# 60 sio!                      \ I/O base address high
   h# f8 h# 61 sio!                     \ I/O base address low

   \ On the Ontario OIO board, the interrupt for UART 1 device in the Southbridge 
   \ was wired to use IRQ 3 on P0.1b and older systems. On P0.2, P1, and forward, 
   \ it is wired to use IRQ1. These are also the boards with the swapped device 
   \ positioning, so we can key off of what 'my-space' value the Southbridge comes 
   \ up as. This is hack code which can be removed when we decomission support of P0.1 
   \ systems.
   my-space h# 51000 = if
      h# 1 h# 70 sio!                   \ IRQ 1
   else
      h# 3 h# 70 sio!                   \ IRQ 3
   then

   h# 1 h# 30 sio!                      \ Enable UART 1
   h# 2 h# f0  sio!                     \ High speed mode

   5 devsel                             \ UART 2
   h# 0 h# 30 sio!                      \ Disable UART 2

   7 devsel                             \ Keyboard
   h# 0 h# 30 sio!                      \ Disable Keyboard

   h# b devsel                          \ UART 3
   h# 0 h# 30 sio!                      \ Disable

   h# 0c devsel                         \ Hotkey
   h# 0 h# 30 sio!                      \ Disable

   exit-cfg-mode
;

: init-dma ( -- )
   h# 07  h# 0d pcio!		\ Write Master Clear Reg.
   h# 07  h# 0e pcio!		\ Clear Mask Reg

   \ Mask controller 1
   h# 04  h# 0a pcio!		\ Mask Set/Reset Register
   h# 05  h# 0a pcio!
   h# 06  h# 0a pcio!
   h# 07  h# 0a pcio!
   h# 08  h# 08 pcio!
   \ Enable and set mode for DMA channel 4
   h#  0  h# d4 pcio!		\ Mask  Set/Reset Reg.
   h# c0  h# d6 pcio!		\ Mode Reg.
;

: init-acpi ( -- )
   h# ffff  acpi-base isa-base +         rw!
[ifdef] no-power-smi?
   h# 0400  acpi-base isa-base + h#  2 + rw!
[else]
   h# 0500  acpi-base isa-base + h#  2 + rw!
[then]
;

alias pic! pcio!
hex

init-sb init-pmu init-ide                \ Init southbridge, pmu, ide

map-regs
 init-dma init-acpi init-superio         \ Init dma, acpi, superio
unmap-regs
Commit	Line	Data
920dae64 AT	1	\ ========== Copyright Header Begin ==========================================
	2	\
	3	\ Hypervisor Software File: init.fth
	4	\
	5	\ Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
	6	\
	7	\ - Do no alter or remove copyright notices
	8	\
	9	\ - Redistribution and use of this software in source and binary forms, with
	10	\ or without modification, are permitted provided that the following
	11	\ conditions are met:
	12	\
	13	\ - Redistribution of source code must retain the above copyright notice,
	14	\ this list of conditions and the following disclaimer.
	15	\
	16	\ - Redistribution in binary form must reproduce the above copyright notice,
	17	\ this list of conditions and the following disclaimer in the
	18	\ documentation and/or other materials provided with the distribution.
	19	\
	20	\ Neither the name of Sun Microsystems, Inc. or the names of contributors
	21	\ may be used to endorse or promote products derived from this software
	22	\ without specific prior written permission.
	23	\
	24	\ This software is provided "AS IS," without a warranty of any kind.
	25	\ ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES,
	26	\ INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A
	27	\ PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN
	28	\ MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR
	29	\ ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR
	30	\ DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN
	31	\ OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR
	32	\ FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE
	33	\ DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY,
	34	\ ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF
	35	\ SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
	36	\
	37	\ You acknowledge that this software is not designed, licensed or
	38	\ intended for use in the design, construction, operation or maintenance of
	39	\ any nuclear facility.
	40	\
	41	\ ========== Copyright Header End ============================================
	42	id: @(#)init.fth 1.1 06/02/16
	43	purpose:
	44	copyright: Copyright 2006 Sun Microsystems, Inc. All Rights Reserved
	45	copyright: Use is subject to license terms.
	46
	47	fload ${BP}/dev/southbridge/isa/registers.fth
	48	fload ${BP}/dev/southbridge/isa-devices/superio/registers.fth
	49
	50	headerless
	51
	52	h# 0600 constant smb-base
	53	h# 0800 constant acpi-base
	54
	55	\ This used to be done in Fiesta's Reset, now it's done here...
	56
	57	\ Extract Southbridge's bus number for back-door access to PMU and IDE config space
	58	my-space h# ff0000 and h# 800 or constant pmu-config-base
	59	my-space h# ff0000 and h# 4000 or constant ide-config-base
	60
	61	: sbr! swap my-space or config-b! ; \ Initialize ISA
	62	: pmu! swap pmu-config-base or config-b! ; \ Initialize PMU, Device 1
	63	: ide! swap ide-config-base or config-b! ; \ Initialize IDE, Device 8
	64
65	: init-sb ( -- )
66	h# 40 h# 11 sbr! \ DMA line buffer enable, Passive release enable
67	h# 58 h# 00 sbr! \ IDE disable - WORKAROUND is RESET IDE
68	h# 4a h# 00 sbr! \ Disable USB2 - WORKAROUND
69	h# 7e h# 01 sbr! \ Disable USB2, Audio > 2GB WORKAROUND
70	h# 53 h# 40 sbr! \ Disable USB1 - WORKAROUND
71	h# 42 h# 4b sbr! \ 32-bit DMA addressing; ISA SYSCLK = PCICLK/4 (apnote5)
72	h# 44 h# 83 sbr! \ Primary IDE IRQ[10]
73	h# 45 h# 08 sbr! \ Parity check disable; Enable discard timer timeout
74	h# 48 h# 00 sbr! \ PCI Interrupt routing table 1 (PIRT1)
75	h# 49 h# 00 sbr! \ PIRT2
76	h# 4a h# 06 sbr! \ USB2 [IRQ 7] in APIC mode (see apnote 7)
77	h# 4b h# 00 sbr! \ PIRT4; Audio interrupt DISABLE
78	h# 50 h# 00 sbr! \ Parity check control (low)
79	h# 51 h# 00 sbr! \ Parity check control (high)
80	h# 52 h# 00 sbr! \ USB control (low)
81	h# 53 h# 20 sbr! \ USB1 enable; RTC port read enable
82	h# 58 h# 64 sbr! \ IDE enable; IDSEL=A24; keep secondary IDE tri-state
83	h# 5f h# 08 sbr! \ Unlock bits[9:4] of M1535D command register (0x4)
84	h# 6c h# 80 sbr! \ Enable "discreet interrupt" mode (NEW. Was h# 80)
85	h# 6d h# 20 sbr! \ Release PCI bus on ISA/DMA Master cycle retry
86	h# 72 h# 0a sbr! \ PMU IDSEL=A17; USB IDSEL=A21
87	h# 74 h# 47 sbr! \ USB1 [IRQ 6]
88	h# 76 h# 00 sbr! \ ACPI Intterupt routing table
89	h# 77 h# 48 sbr! \ Audio disabled, Modem disabled
90	h# 7d h# 80 sbr! \ USB2 IDSEL=A22
91	h# 7e h# 80 sbr! \ USB2 Enable
92
93	h# 79 h# 02 sbr! \ Multifunction pin select 2 (CHECK THIS)
94	h# 7a h# 00 sbr! \ Multifunction pin select 2 (CHECK THIS)
95	h# 7b h# 04 sbr! \ Multifunction pin select 2 (CHECK THIS)
96	h# 7c h# 00 sbr! \ Multifunction pin select 3 (CHECK THIS)
97
98	;
99
100	: init-pmu ( -- )
101	h# e0 acpi-base h# ff and pmu!
102	h# e1 acpi-base 8 >> h# ff and pmu! \ ACPI @ PCI I/O 0500
103
104	h# e2 smb-base h# ff and pmu!
105	h# e3 smb-base 8 >> h# ff and pmu! \ SMB @ PCI I/0 0600
106
107	h# d1 h# 06 pmu! \ Enable SMB & ACPI address spaces
108	h# f0 h# 41 pmu! \ Enable SMB Host controller
109	h# f0 h# 05 pmu! \ Enable SMB Host controller, I2C mode
110	h# f2 h# 20 pmu! \ SMB clock
111	h# f2 h# 88 pmu! \ SMB clock XXXX
112
113	h# bb h# 03 pmu! \ GPO 36 & 37
114	h# ba h# 00 pmu! \ GPO36 = 0 (flash WE)
115
116	h# 6c h# 00 pmu! \ System events
117	h# 6d h# 00 pmu! \ System events
118	h# 6e h# 40 pmu! \ Floppy event on grover (CHECK THIS)
119	h# 6f h# 01 pmu! \ Floppy event on grover (CHECK THIS)
120
121	h# 70 h# 0f pmu! \ Positive Decoding ranges (CHECK THIS)
122	h# 71 h# 11 pmu! \ (CHECK THIS)
123
124	h# 77 h# 08 pmu! \ Enable SMI
125	h# b1 h# 40 pmu! \ Enable emergency OFF
126	h# b3 h# 04 pmu! \ LED on (SPLED drives lo), pwr btn overide disable
127	h# b2 h# 40 pmu! \ Enable Beep
128
129
130	h# 89 h# 02 pmu! \ RMC_RST (GPO39) output
131	h# 9a h# 0f pmu! \ RMC_HRT_BT (GPO0), SB_PROM_A20 (GPO1),
132	\ FLASH_UPDATE (GPO2), FAN_BLAST_N (GPO3)
133	;
134
135	: init-ide ( -- )
136	h# 09 h# ff ide!
137	h# 10 h# 00 ide!
138	h# 11 h# 00 ide!
139	h# 12 h# 00 ide!
140	h# 13 h# 00 ide!
141	h# 14 h# 00 ide!
142	h# 15 h# 00 ide!
143	h# 16 h# 00 ide!
144	h# 17 h# 00 ide!
145	h# 18 h# 00 ide!
146	h# 19 h# 00 ide!
147	h# 1a h# 00 ide!
148	h# 1b h# 00 ide!
149	h# 1c h# 00 ide!
150	h# 1d h# 00 ide!
151	h# 1e h# 00 ide!
152	h# 1f h# 00 ide!
153	h# 20 h# 00 ide!
154	h# 21 h# 00 ide!
155	h# 22 h# 00 ide!
156	h# 23 h# 00 ide!
157	h# 43 h# 7f ide!
158	h# 4a h# 03 ide!
159	h# 4b h# c0 ide!
160	h# 4d h# 80 ide!
161	h# 50 h# 03 ide!
162	h# 53 h# 81 ide!
163	h# 54 h# 55 ide!
164	h# 55 h# 55 ide!
165	h# 56 h# 44 ide!
166	h# 57 h# 44 ide!
167	h# 58 h# 03 ide!
168	h# 5c h# 03 ide!
169	h# 72 h# 00 ide!
170	h# 7a h# 00 ide!
171	h# 79 h# 02 ide!
172	;
173
174	: init-superio ( -- )
175	enter-cfg-mode
176
177	0 devsel
178	h# 0 h# 30 sio! \ Disable FDC by default
179	[ifdef] use-floppy?
180	0 devsel \ FDC
181	h# 1 h# 30 sio! \ Enable FDC
182	h# 6 h# 70 sio! \ IRQ 6
183	h# 2 h# 74 sio! \ DMA channel 2
184	h# a h# f0 sio! \ AT mode; Non-burst DMA mode
185	[then]
186
187	3 devsel
188	h# 0 h# 30 sio! \ Disable parallel port by default
189	[ifdef] use-parallel-port?
190	3 devsel \ Parallel port
191	h# 1 h# 30 sio! \ Enable parallel port
192	h# 7 h# 70 sio! \ IRQ 7
193	h# 1 h# 74 sio! \ DMA channel 1
194	h# 8a h# f0 sio! \ IRQ active low; ECP; FIFO threshold = 1
195	[then]
196
197	4 devsel \ UART 1
198	h# 3 h# 60 sio! \ I/O base address high
199	h# f8 h# 61 sio! \ I/O base address low
200
201	\ On the Ontario OIO board, the interrupt for UART 1 device in the Southbridge
202	\ was wired to use IRQ 3 on P0.1b and older systems. On P0.2, P1, and forward,
203	\ it is wired to use IRQ1. These are also the boards with the swapped device
204	\ positioning, so we can key off of what 'my-space' value the Southbridge comes
205	\ up as. This is hack code which can be removed when we decomission support of P0.1
206	\ systems.
207	my-space h# 51000 = if
208	h# 1 h# 70 sio! \ IRQ 1
209	else
210	h# 3 h# 70 sio! \ IRQ 3
211	then
212
213	h# 1 h# 30 sio! \ Enable UART 1
214	h# 2 h# f0 sio! \ High speed mode
215
216	5 devsel \ UART 2
217	h# 0 h# 30 sio! \ Disable UART 2
218
219	7 devsel \ Keyboard
220	h# 0 h# 30 sio! \ Disable Keyboard
221
222	h# b devsel \ UART 3
223	h# 0 h# 30 sio! \ Disable
224
225	h# 0c devsel \ Hotkey
226	h# 0 h# 30 sio! \ Disable
227
228	exit-cfg-mode
229	;
230
231	: init-dma ( -- )
232	h# 07 h# 0d pcio! \ Write Master Clear Reg.
233	h# 07 h# 0e pcio! \ Clear Mask Reg
234
235	\ Mask controller 1
236	h# 04 h# 0a pcio! \ Mask Set/Reset Register
237	h# 05 h# 0a pcio!
238	h# 06 h# 0a pcio!
239	h# 07 h# 0a pcio!
240	h# 08 h# 08 pcio!
241	\ Enable and set mode for DMA channel 4
242	h# 0 h# d4 pcio! \ Mask Set/Reset Reg.
243	h# c0 h# d6 pcio! \ Mode Reg.
244	;
245
246	: init-acpi ( -- )
247	h# ffff acpi-base isa-base + rw!
248	[ifdef] no-power-smi?
249	h# 0400 acpi-base isa-base + h# 2 + rw!
250	[else]
251	h# 0500 acpi-base isa-base + h# 2 + rw!
252	[then]
253	;
254
255	alias pic! pcio!
256	hex
257
258	init-sb init-pmu init-ide \ Init southbridge, pmu, ide
259
260	map-regs
261	init-dma init-acpi init-superio \ Init dma, acpi, superio
262	unmap-regs
263