Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / obp / obp / dev / usb / transfermap.fth
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1\ ========== Copyright Header Begin ==========================================
2\
3\ Hypervisor Software File: transfermap.fth
4\
5\ Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
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41\ ========== Copyright Header End ============================================
42id: @(#)transfermap.fth 1.8 04/05/25
43purpose:
44copyright: Copyright 1997-2004 Sun Microsystems, Inc. All Rights Reserved
45copyright: Use is subject to license terms.
46
47struct
48 4 field transfer-control
49 4 field curr-buffer
50 4 field next-transfer
51h# 14 field buffer-end \ followed by pad to make general and isoc
52 \ transfer sizes the same
53 /n field my-endpoint \ used only by software, virt
54 /n field caller-data \ ditto, for caller's buffer
55 /n field caller-count
56 /n field my-data
57 h# 20 over h# 20 mod - \ pad to next 32 byte boundary
58 field endpad2
59
60( general transfer descrip. size ) constant /transfer
61
62\ We can't use curr-buffer and reverse index it to get back to the virt addr
63\ of the data buffer because the controller will use that field and set it to
64\ 0 to indicate a full transfer. So we use my-data to hold the virt addr of
65\ the associated buffer. my-data can be used as a copy buffer that is
66\ dma-able from the static pool. 0 in caller-data means no associated buffer.
67\ caller-count is 0 if no data to transfer.
68
69\ XXX will waste memory up to 32 bytes per descriptor if it is evenly
70\ aligned before the calculation. can save the dict entry by pushing the
71\ calculation into the size of my-data
72
73\ isochronous transfer descriptor structure
74
75struct
76 4 field isoc-control
77h# c field buff-page \ followed by next-transfer & buffer-end, as above
78 4 field offset0 \ and offset1; reused for psw0 and psw1
79 4 field offset2 \ and offset3; reused for psw2 and psw3
80 4 field offset4 \ and offset5; reused for psw4 and psw5
81 4 field offset6 \ and offset7; reused for psw6 and psw7;
82 \ followed by my-endpoint, as above
83drop
84
85
86: condition-code ( transfer-d -- cc )
87 le-l@ d# 28 rshift
88;
89
90\ For isochronous packets:
91: packet-condition-code ( n transfer-d -- cc )
92 offset0 swap 4 * + le-w@
93 h# f000 and d# 12 rshift
94;
95
96\ completion codes for transfers ( cc field of transfer descriptor):
97
980 constant no-error
991 constant crc-error
1002 constant bit-error
1013 constant toggle-error
1024 constant stall-error
1035 constant no-response-error
1046 constant pid-error
1057 constant unexpected-pid-error
1068 constant data-overrun-error
1079 constant data-underrun-error
108\ a constant reserved1
109\ b constant reserved2
110c constant buf-overrun-error \ isoc only
111d constant buf-underrun-error \ isoc only
112e constant eno-access-error \ XXX isoc only?
113f constant fno-access-error \ XXX isoc only?
114
115\ These are generated by the code:
11611 constant time-out-error
11712 constant no-more-addresses
118
119: .error ( hw-err? -- hw-err? )
120 cmn-error[ " USB " cmn-append
121 dup
122 case 1 of " crc" endof
123 2 of " bit" endof
124 3 of " toggle" endof
125 4 of " stall" endof
126 5 of " no response" endof
127 6 of " pid" endof
128 7 of " unexpected pid" endof
129 8 of " data overrun" endof
130 9 of " data underrun" endof
131 c of " buffer overrun" endof
132 d of " buffer underrun" endof
133 e of " eno" endof
134 f of " fno" endof
135 11 of " time out" endof
136 12 of " no address" endof
137 " unknown %x" 2 pick
138 endcase
139 ]cmn-end
140;
141
142\ Maybe show hardware errors
143: ?.error ( hw-err? | stat 0 -- hw-err? | stat 0 )
144 dup if
145 .error
146 then
147;
148
149\ Some next-transfer bits must be 0
150\ XXX should be done when next transfer is allocated
151: next-transfer! ( n e-addr -- )
152\ swap h# f invert and swap
153 next-transfer le-l!
154;
155
156\ XXX to retire the endpoint, use my-endpoint to look at transfer head and
157\ tail. if equal, the endpoint has no transfer q left, and can be retired.
158\ not quite. there could be transfer descriptors still on the done q's, or
159\ maybe in process in the chip.
160
161\ direction bits for transfer descriptors:
162
16300 constant setup-bits
16401 constant out-bits
16502 constant in-bits