[OpenSPARC-T2-SAM] / obp / obp / fm / kernel / sparc / multiply.fth

\ ========== Copyright Header Begin ==========================================
\ 
\ Hypervisor Software File: multiply.fth
\ 
\ Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
\ 
\  - Do no alter or remove copyright notices
\ 
\  - Redistribution and use of this software in source and binary forms, with 
\    or without modification, are permitted provided that the following 
\    conditions are met: 
\ 
\  - Redistribution of source code must retain the above copyright notice, 
\    this list of conditions and the following disclaimer.
\ 
\  - Redistribution in binary form must reproduce the above copyright notice,
\    this list of conditions and the following disclaimer in the
\    documentation and/or other materials provided with the distribution. 
\ 
\    Neither the name of Sun Microsystems, Inc. or the names of contributors 
\ may be used to endorse or promote products derived from this software 
\ without specific prior written permission. 
\ 
\     This software is provided "AS IS," without a warranty of any kind. 
\ ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, 
\ INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A 
\ PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN 
\ MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR 
\ ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR 
\ DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN 
\ OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR 
\ FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE 
\ DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY, 
\ ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF 
\ SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
\ 
\ You acknowledge that this software is not designed, licensed or
\ intended for use in the design, construction, operation or maintenance of
\ any nuclear facility. 
\ 
\ ========== Copyright Header End ============================================
id: @(#)multiply.fth 2.6 94/06/18
purpose: 
copyright: Copyright 1990 Sun Microsystems, Inc.  All Rights Reserved
\ Copyright 1985-1990 Bradley Forthware

decimal

\ --- 32*32->64 bit unsigned! multiply ----------------------------------
\            y  rs2     y  rd
code um*   ( u1 u2 -- ud[lo hi] )
   sp 0 /n*    %l0    nget             \ l0 <- n1(y)      get multiplyer 
					\   (save original y for later)
   %l0 %g0             wry              \ y  <- n1       multiplyer
					\
   tos %g0      %l3    or               \ l3 <- n2(rs2)  multiplicand
					\   (save original rs2 for later)
					\
   tos %l0      %l1    or               \ l2 <- n1.or.n2 (any hi bits)
   %l1 h# fff   %g0    andncc           \ cc <- fffff000.and.(n1.or.n2)
   0=  if                               \ if neither terms have any 
					\    hi 1's then set do short way.
   %g0 %g0      %l2    andcc            \ N=0, V=0, %l2=0; Neg, oVerflow, 
					\   part-product (delay slot)
					\
      %l2 tos      %l2    mulscc        \ 1   001
      %l2 tos      %l2    mulscc        \ 2   003
      %l2 tos      %l2    mulscc        \ 3   007
      %l2 tos      %l2    mulscc        \ 4   00f
      %l2 tos      %l2    mulscc        \ 5   01f
      %l2 tos      %l2    mulscc        \ 6   03f
      %l2 tos      %l2    mulscc        \ 7   07f
      %l2 tos      %l2    mulscc        \ 8   0ff
      %l2 tos      %l2    mulscc        \ 9   1ff
      %l2 tos      %l2    mulscc        \ 10  3ff
      %l2 tos      %l2    mulscc        \ 11  7ff
      %l2 tos      %l2    mulscc        \ 12  fff
      %l2 tos      %l2    mulscc        \ 13 1fff

      %g0 %g0      tos    and           \ x[hi]-(TOS) <- 0; (msd)
                   %l1    rdy           \ l1  <- y (write over saved y 
					\   [not needed for short multiply])
      %l2 d# 12    %l2    sll           \ l2  <- part-prod << 12; 
					\   msd result (low bits have 
					\   good data)
      %l1 d# 20    %l1    srl           \ l1  <- y         >> 20; 
					\   msd result (hi  bits have 
					\   good data)
					\
   else                                 \ else do full 32 bit multiply
      %l1 %l2      %l1    or            \ l1  <- mst+lsd 32 bit result (delay)

      %l2 tos      %l2    mulscc        \ 1
      %l2 tos      %l2    mulscc        \ 2
      %l2 tos      %l2    mulscc        \ 3
      %l2 tos      %l2    mulscc        \ 4
      %l2 tos      %l2    mulscc        \ 5
      %l2 tos      %l2    mulscc        \ 6
      %l2 tos      %l2    mulscc        \ 7
      %l2 tos      %l2    mulscc        \ 8
      %l2 tos      %l2    mulscc        \ 9
      %l2 tos      %l2    mulscc        \ 10
      %l2 tos      %l2    mulscc        \ 11
      %l2 tos      %l2    mulscc        \ 12
      %l2 tos      %l2    mulscc        \ 13
      %l2 tos      %l2    mulscc        \ 14
      %l2 tos      %l2    mulscc        \ 15
      %l2 tos      %l2    mulscc        \ 16
      %l2 tos      %l2    mulscc        \ 17
      %l2 tos      %l2    mulscc        \ 18
      %l2 tos      %l2    mulscc        \ 19
      %l2 tos      %l2    mulscc        \ 20
      %l2 tos      %l2    mulscc        \ 21
      %l2 tos      %l2    mulscc        \ 22
      %l2 tos      %l2    mulscc        \ 23
      %l2 tos      %l2    mulscc        \ 24
      %l2 tos      %l2    mulscc        \ 25
      %l2 tos      %l2    mulscc        \ 26
      %l2 tos      %l2    mulscc        \ 27
      %l2 tos      %l2    mulscc        \ 28
      %l2 tos      %l2    mulscc        \ 29
      %l2 tos      %l2    mulscc        \ 30
      %l2 tos      %l2    mulscc        \ 31
      %l2 tos      %l2    mulscc        \ 32
      %l2 %g0      tos    mulscc        \ final iteration only shifts; 
					\   move to TOS (delay slot).
					\
      %l3 %g0      %g0    orcc          \ was original rs2 negative
      0< if
      			  nop		\ (delay slot) can't put mulscc 
					\   here because N and V flags
					\   must not be changed.
					\
        %l0 tos     tos     add         \ if so add original y to 
					\   result to adjust for 
					\   signed multiply.
					\
      then
                   %l1    rdy           \ get lsd
   then
   %l1        sp 0 /n*  nput		\ x[lo]-(UTOS) <- lsd=l1 (delay slot)
c;

: *  ( n1 n2 -- n3 )  um* drop  ;
Commit	Line	Data
920dae64 AT	1	\ ========== Copyright Header Begin ==========================================
	2	\
	3	\ Hypervisor Software File: multiply.fth
	4	\
	5	\ Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
	6	\
	7	\ - Do no alter or remove copyright notices
	8	\
	9	\ - Redistribution and use of this software in source and binary forms, with
	10	\ or without modification, are permitted provided that the following
	11	\ conditions are met:
	12	\
	13	\ - Redistribution of source code must retain the above copyright notice,
	14	\ this list of conditions and the following disclaimer.
	15	\
	16	\ - Redistribution in binary form must reproduce the above copyright notice,
	17	\ this list of conditions and the following disclaimer in the
	18	\ documentation and/or other materials provided with the distribution.
	19	\
	20	\ Neither the name of Sun Microsystems, Inc. or the names of contributors
	21	\ may be used to endorse or promote products derived from this software
	22	\ without specific prior written permission.
	23	\
	24	\ This software is provided "AS IS," without a warranty of any kind.
	25	\ ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES,
	26	\ INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A
	27	\ PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN
	28	\ MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR
	29	\ ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR
	30	\ DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN
	31	\ OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR
	32	\ FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE
	33	\ DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY,
	34	\ ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF
	35	\ SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
	36	\
	37	\ You acknowledge that this software is not designed, licensed or
	38	\ intended for use in the design, construction, operation or maintenance of
	39	\ any nuclear facility.
	40	\
	41	\ ========== Copyright Header End ============================================
	42	id: @(#)multiply.fth 2.6 94/06/18
	43	purpose:
	44	copyright: Copyright 1990 Sun Microsystems, Inc. All Rights Reserved
	45	\ Copyright 1985-1990 Bradley Forthware
	46
	47	decimal
	48
	49	\ --- 32*32->64 bit unsigned! multiply ----------------------------------
	50	\ y rs2 y rd
	51	code um* ( u1 u2 -- ud[lo hi] )
	52	sp 0 /n* %l0 nget \ l0 <- n1(y) get multiplyer
	53	\ (save original y for later)
	54	%l0 %g0 wry \ y <- n1 multiplyer
	55	\
	56	tos %g0 %l3 or \ l3 <- n2(rs2) multiplicand
	57	\ (save original rs2 for later)
	58	\
	59	tos %l0 %l1 or \ l2 <- n1.or.n2 (any hi bits)
	60	%l1 h# fff %g0 andncc \ cc <- fffff000.and.(n1.or.n2)
	61	0= if \ if neither terms have any
	62	\ hi 1's then set do short way.
	63	%g0 %g0 %l2 andcc \ N=0, V=0, %l2=0; Neg, oVerflow,
	64	\ part-product (delay slot)
65	\
66	%l2 tos %l2 mulscc \ 1 001
67	%l2 tos %l2 mulscc \ 2 003
68	%l2 tos %l2 mulscc \ 3 007
69	%l2 tos %l2 mulscc \ 4 00f
70	%l2 tos %l2 mulscc \ 5 01f
71	%l2 tos %l2 mulscc \ 6 03f
72	%l2 tos %l2 mulscc \ 7 07f
73	%l2 tos %l2 mulscc \ 8 0ff
74	%l2 tos %l2 mulscc \ 9 1ff
75	%l2 tos %l2 mulscc \ 10 3ff
76	%l2 tos %l2 mulscc \ 11 7ff
77	%l2 tos %l2 mulscc \ 12 fff
78	%l2 tos %l2 mulscc \ 13 1fff
79
80	%g0 %g0 tos and \ x[hi]-(TOS) <- 0; (msd)
81	%l1 rdy \ l1 <- y (write over saved y
82	\ [not needed for short multiply])
83	%l2 d# 12 %l2 sll \ l2 <- part-prod << 12;
84	\ msd result (low bits have
85	\ good data)
86	%l1 d# 20 %l1 srl \ l1 <- y >> 20;
87	\ msd result (hi bits have
88	\ good data)
89	\
90	else \ else do full 32 bit multiply
91	%l1 %l2 %l1 or \ l1 <- mst+lsd 32 bit result (delay)
92
93	%l2 tos %l2 mulscc \ 1
94	%l2 tos %l2 mulscc \ 2
95	%l2 tos %l2 mulscc \ 3
96	%l2 tos %l2 mulscc \ 4
97	%l2 tos %l2 mulscc \ 5
98	%l2 tos %l2 mulscc \ 6
99	%l2 tos %l2 mulscc \ 7
100	%l2 tos %l2 mulscc \ 8
101	%l2 tos %l2 mulscc \ 9
102	%l2 tos %l2 mulscc \ 10
103	%l2 tos %l2 mulscc \ 11
104	%l2 tos %l2 mulscc \ 12
105	%l2 tos %l2 mulscc \ 13
106	%l2 tos %l2 mulscc \ 14
107	%l2 tos %l2 mulscc \ 15
108	%l2 tos %l2 mulscc \ 16
109	%l2 tos %l2 mulscc \ 17
110	%l2 tos %l2 mulscc \ 18
111	%l2 tos %l2 mulscc \ 19
112	%l2 tos %l2 mulscc \ 20
113	%l2 tos %l2 mulscc \ 21
114	%l2 tos %l2 mulscc \ 22
115	%l2 tos %l2 mulscc \ 23
116	%l2 tos %l2 mulscc \ 24
117	%l2 tos %l2 mulscc \ 25
118	%l2 tos %l2 mulscc \ 26
119	%l2 tos %l2 mulscc \ 27
120	%l2 tos %l2 mulscc \ 28
121	%l2 tos %l2 mulscc \ 29
122	%l2 tos %l2 mulscc \ 30
123	%l2 tos %l2 mulscc \ 31
124	%l2 tos %l2 mulscc \ 32
125	%l2 %g0 tos mulscc \ final iteration only shifts;
126	\ move to TOS (delay slot).
127	\
128	%l3 %g0 %g0 orcc \ was original rs2 negative
129	0< if
130	nop \ (delay slot) can't put mulscc
131	\ here because N and V flags
132	\ must not be changed.
133	\
134	%l0 tos tos add \ if so add original y to
135	\ result to adjust for
136	\ signed multiply.
137	\
138	then
139	%l1 rdy \ get lsd
140	then
141	%l1 sp 0 /n* nput \ x[lo]-(UTOS) <- lsd=l1 (delay slot)
142	c;
143
144	: * ( n1 n2 -- n3 ) um* drop ;