projects / OpenSPARC-T2-SAM / blame
| Commit | Line | Data |
|---|---|---|
| 920dae64 AT |
1 | /* %COPYRIGHT% */ |
| 2 | ||
| 3 | #ifndef SPIX_SPARC_IWORDS_H | |
| 4 | #define SPIX_SPARC_IWORDS_H | |
| 5 | ||
| 6 | #pragma ident "@(#)spix_sparc_iwords.h 1.15" | |
| 7 | ||
| 8 | #ifdef __cplusplus | |
| 9 | extern "C" { | |
| 10 | #endif | |
| 11 | ||
| 12 | #define SPIX_SPARC_IW_ADD (0x80000000) | |
| 13 | #define SPIX_SPARC_IW_ADDC (0x80400000) | |
| 14 | #define SPIX_SPARC_IW_ADDCC (0x80800000) | |
| 15 | #define SPIX_SPARC_IW_ADDCCC (0x80c00000) | |
| 16 | #define SPIX_SPARC_IW_ALIGNADDR (0x81b00300) | |
| 17 | #define SPIX_SPARC_IW_ALIGNADDRL (0x81b00340) | |
| 18 | #define SPIX_SPARC_IW_AND (0x80080000) | |
| 19 | #define SPIX_SPARC_IW_ANDCC (0x80880000) | |
| 20 | #define SPIX_SPARC_IW_ANDN (0x80280000) | |
| 21 | #define SPIX_SPARC_IW_ANDNCC (0x80a80000) | |
| 22 | #define SPIX_SPARC_IW_ARRAY16 (0x81b00240) | |
| 23 | #define SPIX_SPARC_IW_ARRAY32 (0x81b00280) | |
| 24 | #define SPIX_SPARC_IW_ARRAY8 (0x81b00200) | |
| 25 | #define SPIX_SPARC_IW_BA (0x10800000) | |
| 26 | #define SPIX_SPARC_IW_BAA (0x30800000) | |
| 27 | #define SPIX_SPARC_IW_BCC (0x1a800000) | |
| 28 | #define SPIX_SPARC_IW_BCCA (0x3a800000) | |
| 29 | #define SPIX_SPARC_IW_BCS (0x0a800000) | |
| 30 | #define SPIX_SPARC_IW_BCSA (0x2a800000) | |
| 31 | #define SPIX_SPARC_IW_BE (0x02800000) | |
| 32 | #define SPIX_SPARC_IW_BEA (0x22800000) | |
| 33 | #define SPIX_SPARC_IW_BG (0x14800000) | |
| 34 | #define SPIX_SPARC_IW_BGA (0x34800000) | |
| 35 | #define SPIX_SPARC_IW_BGE (0x16800000) | |
| 36 | #define SPIX_SPARC_IW_BGEA (0x36800000) | |
| 37 | #define SPIX_SPARC_IW_BGU (0x18800000) | |
| 38 | #define SPIX_SPARC_IW_BGUA (0x38800000) | |
| 39 | #define SPIX_SPARC_IW_BL (0x06800000) | |
| 40 | #define SPIX_SPARC_IW_BLA (0x26800000) | |
| 41 | #define SPIX_SPARC_IW_BLE (0x04800000) | |
| 42 | #define SPIX_SPARC_IW_BLEA (0x24800000) | |
| 43 | #define SPIX_SPARC_IW_BLEU (0x08800000) | |
| 44 | #define SPIX_SPARC_IW_BLEUA (0x28800000) | |
| 45 | #define SPIX_SPARC_IW_BN (0x00800000) | |
| 46 | #define SPIX_SPARC_IW_BNA (0x20800000) | |
| 47 | #define SPIX_SPARC_IW_BNE (0x12800000) | |
| 48 | #define SPIX_SPARC_IW_BNEA (0x32800000) | |
| 49 | #define SPIX_SPARC_IW_BNEG (0x0c800000) | |
| 50 | #define SPIX_SPARC_IW_BNEGA (0x2c800000) | |
| 51 | #define SPIX_SPARC_IW_BPAAPN (0x30400000) | |
| 52 | #define SPIX_SPARC_IW_BPAAPT (0x30480000) | |
| 53 | #define SPIX_SPARC_IW_BPAPN (0x10400000) | |
| 54 | #define SPIX_SPARC_IW_BPAPT (0x10480000) | |
| 55 | #define SPIX_SPARC_IW_BPCCAPN (0x3a400000) | |
| 56 | #define SPIX_SPARC_IW_BPCCAPT (0x3a480000) | |
| 57 | #define SPIX_SPARC_IW_BPCCPN (0x1a400000) | |
| 58 | #define SPIX_SPARC_IW_BPCCPT (0x1a480000) | |
| 59 | #define SPIX_SPARC_IW_BPCSAPN (0x2a400000) | |
| 60 | #define SPIX_SPARC_IW_BPCSAPT (0x2a480000) | |
| 61 | #define SPIX_SPARC_IW_BPCSPN (0x0a400000) | |
| 62 | #define SPIX_SPARC_IW_BPCSPT (0x0a480000) | |
| 63 | #define SPIX_SPARC_IW_BPEAPN (0x22400000) | |
| 64 | #define SPIX_SPARC_IW_BPEAPT (0x22480000) | |
| 65 | #define SPIX_SPARC_IW_BPEPN (0x02400000) | |
| 66 | #define SPIX_SPARC_IW_BPEPT (0x02480000) | |
| 67 | #define SPIX_SPARC_IW_BPGAPN (0x34400000) | |
| 68 | #define SPIX_SPARC_IW_BPGAPT (0x34480000) | |
| 69 | #define SPIX_SPARC_IW_BPGPN (0x14400000) | |
| 70 | #define SPIX_SPARC_IW_BPGPT (0x14480000) | |
| 71 | #define SPIX_SPARC_IW_BPGEAPN (0x36400000) | |
| 72 | #define SPIX_SPARC_IW_BPGEAPT (0x36480000) | |
| 73 | #define SPIX_SPARC_IW_BPGEPN (0x16400000) | |
| 74 | #define SPIX_SPARC_IW_BPGEPT (0x16480000) | |
| 75 | #define SPIX_SPARC_IW_BPGUAPN (0x38400000) | |
| 76 | #define SPIX_SPARC_IW_BPGUAPT (0x38480000) | |
| 77 | #define SPIX_SPARC_IW_BPGUPN (0x18400000) | |
| 78 | #define SPIX_SPARC_IW_BPGUPT (0x18480000) | |
| 79 | #define SPIX_SPARC_IW_BPLAPN (0x26400000) | |
| 80 | #define SPIX_SPARC_IW_BPLAPT (0x26480000) | |
| 81 | #define SPIX_SPARC_IW_BPLPN (0x06400000) | |
| 82 | #define SPIX_SPARC_IW_BPLPT (0x06480000) | |
| 83 | #define SPIX_SPARC_IW_BPLEAPN (0x24400000) | |
| 84 | #define SPIX_SPARC_IW_BPLEAPT (0x24480000) | |
| 85 | #define SPIX_SPARC_IW_BPLEPN (0x04400000) | |
| 86 | #define SPIX_SPARC_IW_BPLEPT (0x04480000) | |
| 87 | #define SPIX_SPARC_IW_BPLEUAPN (0x28400000) | |
| 88 | #define SPIX_SPARC_IW_BPLEUAPT (0x28480000) | |
| 89 | #define SPIX_SPARC_IW_BPLEUPN (0x08400000) | |
| 90 | #define SPIX_SPARC_IW_BPLEUPT (0x08480000) | |
| 91 | #define SPIX_SPARC_IW_BPNAPN (0x20400000) | |
| 92 | #define SPIX_SPARC_IW_BPNAPT (0x20480000) | |
| 93 | #define SPIX_SPARC_IW_BPNPN (0x00400000) | |
| 94 | #define SPIX_SPARC_IW_BPNPT (0x00480000) | |
| 95 | #define SPIX_SPARC_IW_BPNEAPN (0x32400000) | |
| 96 | #define SPIX_SPARC_IW_BPNEAPT (0x32480000) | |
| 97 | #define SPIX_SPARC_IW_BPNEPN (0x12400000) | |
| 98 | #define SPIX_SPARC_IW_BPNEPT (0x12480000) | |
| 99 | #define SPIX_SPARC_IW_BPNEGAPN (0x2c400000) | |
| 100 | #define SPIX_SPARC_IW_BPNEGAPT (0x2c480000) | |
| 101 | #define SPIX_SPARC_IW_BPNEGPN (0x0c400000) | |
| 102 | #define SPIX_SPARC_IW_BPNEGPT (0x0c480000) | |
| 103 | #define SPIX_SPARC_IW_BPOS (0x1c800000) | |
| 104 | #define SPIX_SPARC_IW_BPOSA (0x3c800000) | |
| 105 | #define SPIX_SPARC_IW_BPPOSAPN (0x3c400000) | |
| 106 | #define SPIX_SPARC_IW_BPPOSAPT (0x3c480000) | |
| 107 | #define SPIX_SPARC_IW_BPPOSPN (0x1c400000) | |
| 108 | #define SPIX_SPARC_IW_BPPOSPT (0x1c480000) | |
| 109 | #define SPIX_SPARC_IW_BPVCAPN (0x3e400000) | |
| 110 | #define SPIX_SPARC_IW_BPVCAPT (0x3e480000) | |
| 111 | #define SPIX_SPARC_IW_BPVCPN (0x1e400000) | |
| 112 | #define SPIX_SPARC_IW_BPVCPT (0x1e480000) | |
| 113 | #define SPIX_SPARC_IW_BPVSAPN (0x2e400000) | |
| 114 | #define SPIX_SPARC_IW_BPVSAPT (0x2e480000) | |
| 115 | #define SPIX_SPARC_IW_BPVSPN (0x0e400000) | |
| 116 | #define SPIX_SPARC_IW_BPVSPT (0x0e480000) | |
| 117 | #define SPIX_SPARC_IW_BRGEZAPN (0x2ec00000) | |
| 118 | #define SPIX_SPARC_IW_BRGEZAPT (0x2ec80000) | |
| 119 | #define SPIX_SPARC_IW_BRGEZPN (0x0ec00000) | |
| 120 | #define SPIX_SPARC_IW_BRGEZPT (0x0ec80000) | |
| 121 | #define SPIX_SPARC_IW_BRGZAPN (0x2cc00000) | |
| 122 | #define SPIX_SPARC_IW_BRGZAPT (0x2cc80000) | |
| 123 | #define SPIX_SPARC_IW_BRGZPN (0x0cc00000) | |
| 124 | #define SPIX_SPARC_IW_BRGZPT (0x0cc80000) | |
| 125 | #define SPIX_SPARC_IW_BRLEZAPN (0x24c00000) | |
| 126 | #define SPIX_SPARC_IW_BRLEZAPT (0x24c80000) | |
| 127 | #define SPIX_SPARC_IW_BRLEZPN (0x04c00000) | |
| 128 | #define SPIX_SPARC_IW_BRLEZPT (0x04c80000) | |
| 129 | #define SPIX_SPARC_IW_BRLZAPN (0x26c00000) | |
| 130 | #define SPIX_SPARC_IW_BRLZAPT (0x26c80000) | |
| 131 | #define SPIX_SPARC_IW_BRLZPN (0x06c00000) | |
| 132 | #define SPIX_SPARC_IW_BRLZPT (0x06c80000) | |
| 133 | #define SPIX_SPARC_IW_BRNZAPN (0x2ac00000) | |
| 134 | #define SPIX_SPARC_IW_BRNZAPT (0x2ac80000) | |
| 135 | #define SPIX_SPARC_IW_BRNZPN (0x0ac00000) | |
| 136 | #define SPIX_SPARC_IW_BRNZPT (0x0ac80000) | |
| 137 | #define SPIX_SPARC_IW_BRZAPN (0x22c00000) | |
| 138 | #define SPIX_SPARC_IW_BRZAPT (0x22c80000) | |
| 139 | #define SPIX_SPARC_IW_BRZPN (0x02c00000) | |
| 140 | #define SPIX_SPARC_IW_BRZPT (0x02c80000) | |
| 141 | #define SPIX_SPARC_IW_BVC (0x1e800000) | |
| 142 | #define SPIX_SPARC_IW_BVCA (0x3e800000) | |
| 143 | #define SPIX_SPARC_IW_BVS (0x0e800000) | |
| 144 | #define SPIX_SPARC_IW_BVSA (0x2e800000) | |
| 145 | #define SPIX_SPARC_IW_CALL (0x40000000) | |
| 146 | #define SPIX_SPARC_IW_CASA (0xc1e00000) | |
| 147 | #define SPIX_SPARC_IW_CASXA (0xc1f00000) | |
| 148 | #define SPIX_SPARC_IW_DONE (0x81f00000) | |
| 149 | #define SPIX_SPARC_IW_EDGE16 (0x81b00080) | |
| 150 | #define SPIX_SPARC_IW_EDGE16L (0x81b000c0) | |
| 151 | #define SPIX_SPARC_IW_EDGE32 (0x81b00100) | |
| 152 | #define SPIX_SPARC_IW_EDGE32L (0x81b00140) | |
| 153 | #define SPIX_SPARC_IW_EDGE8 (0x81b00000) | |
| 154 | #define SPIX_SPARC_IW_EDGE8L (0x81b00040) | |
| 155 | #define SPIX_SPARC_IW_FABSD (0x81a00140) | |
| 156 | #define SPIX_SPARC_IW_FABSQ (0x81a00160) | |
| 157 | #define SPIX_SPARC_IW_FABSS (0x81a00120) | |
| 158 | #define SPIX_SPARC_IW_FADDD (0x81a00840) | |
| 159 | #define SPIX_SPARC_IW_FADDQ (0x81a00860) | |
| 160 | #define SPIX_SPARC_IW_FADDS (0x81a00820) | |
| 161 | #define SPIX_SPARC_IW_FALIGNDATA (0x81b00900) | |
| 162 | #define SPIX_SPARC_IW_FAND (0x81b00e00) | |
| 163 | #define SPIX_SPARC_IW_FANDNOT1 (0x81b00d00) | |
| 164 | #define SPIX_SPARC_IW_FANDNOT1S (0x81b00d20) | |
| 165 | #define SPIX_SPARC_IW_FANDNOT2 (0x81b00c80) | |
| 166 | #define SPIX_SPARC_IW_FANDNOT2S (0x81b00ca0) | |
| 167 | #define SPIX_SPARC_IW_FANDS (0x81b00e20) | |
| 168 | #define SPIX_SPARC_IW_FBA (0x11800000) | |
| 169 | #define SPIX_SPARC_IW_FBAA (0x31800000) | |
| 170 | #define SPIX_SPARC_IW_FBE (0x13800000) | |
| 171 | #define SPIX_SPARC_IW_FBEA (0x33800000) | |
| 172 | #define SPIX_SPARC_IW_FBG (0x0d800000) | |
| 173 | #define SPIX_SPARC_IW_FBGA (0x2d800000) | |
| 174 | #define SPIX_SPARC_IW_FBGE (0x17800000) | |
| 175 | #define SPIX_SPARC_IW_FBGEA (0x37800000) | |
| 176 | #define SPIX_SPARC_IW_FBL (0x09800000) | |
| 177 | #define SPIX_SPARC_IW_FBLA (0x29800000) | |
| 178 | #define SPIX_SPARC_IW_FBLE (0x1b800000) | |
| 179 | #define SPIX_SPARC_IW_FBLEA (0x3b800000) | |
| 180 | #define SPIX_SPARC_IW_FBLG (0x05800000) | |
| 181 | #define SPIX_SPARC_IW_FBLGA (0x25800000) | |
| 182 | #define SPIX_SPARC_IW_FBN (0x01800000) | |
| 183 | #define SPIX_SPARC_IW_FBNA (0x21800000) | |
| 184 | #define SPIX_SPARC_IW_FBNE (0x03800000) | |
| 185 | #define SPIX_SPARC_IW_FBNEA (0x23800000) | |
| 186 | #define SPIX_SPARC_IW_FBO (0x1f800000) | |
| 187 | #define SPIX_SPARC_IW_FBOA (0x3f800000) | |
| 188 | #define SPIX_SPARC_IW_FBPAAPN (0x31400000) | |
| 189 | #define SPIX_SPARC_IW_FBPAAPT (0x31480000) | |
| 190 | #define SPIX_SPARC_IW_FBPAPN (0x11400000) | |
| 191 | #define SPIX_SPARC_IW_FBPAPT (0x11480000) | |
| 192 | #define SPIX_SPARC_IW_FBPEAPN (0x33400000) | |
| 193 | #define SPIX_SPARC_IW_FBPEAPT (0x33480000) | |
| 194 | #define SPIX_SPARC_IW_FBPEPN (0x13400000) | |
| 195 | #define SPIX_SPARC_IW_FBPEPT (0x13480000) | |
| 196 | #define SPIX_SPARC_IW_FBPGAPN (0x2d400000) | |
| 197 | #define SPIX_SPARC_IW_FBPGAPT (0x2d480000) | |
| 198 | #define SPIX_SPARC_IW_FBPGPN (0x0d400000) | |
| 199 | #define SPIX_SPARC_IW_FBPGPT (0x0d480000) | |
| 200 | #define SPIX_SPARC_IW_FBPGEAPN (0x37400000) | |
| 201 | #define SPIX_SPARC_IW_FBPGEAPT (0x37480000) | |
| 202 | #define SPIX_SPARC_IW_FBPGEPN (0x17400000) | |
| 203 | #define SPIX_SPARC_IW_FBPGEPT (0x17480000) | |
| 204 | #define SPIX_SPARC_IW_FBPLAPN (0x29400000) | |
| 205 | #define SPIX_SPARC_IW_FBPLAPT (0x29480000) | |
| 206 | #define SPIX_SPARC_IW_FBPLPN (0x09400000) | |
| 207 | #define SPIX_SPARC_IW_FBPLPT (0x09480000) | |
| 208 | #define SPIX_SPARC_IW_FBPLEAPN (0x3b400000) | |
| 209 | #define SPIX_SPARC_IW_FBPLEAPT (0x3b480000) | |
| 210 | #define SPIX_SPARC_IW_FBPLEPN (0x1b400000) | |
| 211 | #define SPIX_SPARC_IW_FBPLEPT (0x1b480000) | |
| 212 | #define SPIX_SPARC_IW_FBPLGAPN (0x25400000) | |
| 213 | #define SPIX_SPARC_IW_FBPLGAPT (0x25480000) | |
| 214 | #define SPIX_SPARC_IW_FBPLGPN (0x05400000) | |
| 215 | #define SPIX_SPARC_IW_FBPLGPT (0x05480000) | |
| 216 | #define SPIX_SPARC_IW_FBPNAPN (0x21400000) | |
| 217 | #define SPIX_SPARC_IW_FBPNAPT (0x21480000) | |
| 218 | #define SPIX_SPARC_IW_FBPNPN (0x01400000) | |
| 219 | #define SPIX_SPARC_IW_FBPNPT (0x01480000) | |
| 220 | #define SPIX_SPARC_IW_FBPNEAPN (0x23400000) | |
| 221 | #define SPIX_SPARC_IW_FBPNEAPT (0x23480000) | |
| 222 | #define SPIX_SPARC_IW_FBPNEPN (0x03400000) | |
| 223 | #define SPIX_SPARC_IW_FBPNEPT (0x03480000) | |
| 224 | #define SPIX_SPARC_IW_FBPOAPN (0x3f400000) | |
| 225 | #define SPIX_SPARC_IW_FBPOAPT (0x3f480000) | |
| 226 | #define SPIX_SPARC_IW_FBPOPN (0x1f400000) | |
| 227 | #define SPIX_SPARC_IW_FBPOPT (0x1f480000) | |
| 228 | #define SPIX_SPARC_IW_FBPUAPN (0x2f400000) | |
| 229 | #define SPIX_SPARC_IW_FBPUAPT (0x2f480000) | |
| 230 | #define SPIX_SPARC_IW_FBPUPN (0x0f400000) | |
| 231 | #define SPIX_SPARC_IW_FBPUPT (0x0f480000) | |
| 232 | #define SPIX_SPARC_IW_FBPUEAPN (0x35400000) | |
| 233 | #define SPIX_SPARC_IW_FBPUEAPT (0x35480000) | |
| 234 | #define SPIX_SPARC_IW_FBPUEPN (0x15400000) | |
| 235 | #define SPIX_SPARC_IW_FBPUEPT (0x15480000) | |
| 236 | #define SPIX_SPARC_IW_FBPUGAPN (0x2b400000) | |
| 237 | #define SPIX_SPARC_IW_FBPUGAPT (0x2b480000) | |
| 238 | #define SPIX_SPARC_IW_FBPUGPN (0x0b400000) | |
| 239 | #define SPIX_SPARC_IW_FBPUGPT (0x0b480000) | |
| 240 | #define SPIX_SPARC_IW_FBPUGEAPN (0x39400000) | |
| 241 | #define SPIX_SPARC_IW_FBPUGEAPT (0x39480000) | |
| 242 | #define SPIX_SPARC_IW_FBPUGEPN (0x19400000) | |
| 243 | #define SPIX_SPARC_IW_FBPUGEPT (0x19480000) | |
| 244 | #define SPIX_SPARC_IW_FBPULAPN (0x27400000) | |
| 245 | #define SPIX_SPARC_IW_FBPULAPT (0x27480000) | |
| 246 | #define SPIX_SPARC_IW_FBPULPN (0x07400000) | |
| 247 | #define SPIX_SPARC_IW_FBPULPT (0x07480000) | |
| 248 | #define SPIX_SPARC_IW_FBPULEAPN (0x3d400000) | |
| 249 | #define SPIX_SPARC_IW_FBPULEAPT (0x3d480000) | |
| 250 | #define SPIX_SPARC_IW_FBPULEPN (0x1d400000) | |
| 251 | #define SPIX_SPARC_IW_FBPULEPT (0x1d480000) | |
| 252 | #define SPIX_SPARC_IW_FBU (0x0f800000) | |
| 253 | #define SPIX_SPARC_IW_FBUA (0x2f800000) | |
| 254 | #define SPIX_SPARC_IW_FBUE (0x15800000) | |
| 255 | #define SPIX_SPARC_IW_FBUEA (0x35800000) | |
| 256 | #define SPIX_SPARC_IW_FBUG (0x0b800000) | |
| 257 | #define SPIX_SPARC_IW_FBUGA (0x2b800000) | |
| 258 | #define SPIX_SPARC_IW_FBUGE (0x19800000) | |
| 259 | #define SPIX_SPARC_IW_FBUGEA (0x39800000) | |
| 260 | #define SPIX_SPARC_IW_FBUL (0x07800000) | |
| 261 | #define SPIX_SPARC_IW_FBULA (0x27800000) | |
| 262 | #define SPIX_SPARC_IW_FBULE (0x1d800000) | |
| 263 | #define SPIX_SPARC_IW_FBULEA (0x3d800000) | |
| 264 | #define SPIX_SPARC_IW_FCMPD (0x81a80a40) | |
| 265 | #define SPIX_SPARC_IW_FCMPED (0x81a80ac0) | |
| 266 | #define SPIX_SPARC_IW_FCMPEQ (0x81a80ae0) | |
| 267 | #define SPIX_SPARC_IW_FCMPEQ16 (0x81b00540) | |
| 268 | #define SPIX_SPARC_IW_FCMPEQ32 (0x81b005c0) | |
| 269 | #define SPIX_SPARC_IW_FCMPES (0x81a80aa0) | |
| 270 | #define SPIX_SPARC_IW_FCMPGT16 (0x81b00500) | |
| 271 | #define SPIX_SPARC_IW_FCMPGT32 (0x81b00580) | |
| 272 | #define SPIX_SPARC_IW_FCMPLE16 (0x81b00400) | |
| 273 | #define SPIX_SPARC_IW_FCMPLE32 (0x81b00480) | |
| 274 | #define SPIX_SPARC_IW_FCMPNE16 (0x81b00440) | |
| 275 | #define SPIX_SPARC_IW_FCMPNE32 (0x81b004c0) | |
| 276 | #define SPIX_SPARC_IW_FCMPQ (0x81a80a60) | |
| 277 | #define SPIX_SPARC_IW_FCMPS (0x81a80a20) | |
| 278 | #define SPIX_SPARC_IW_FDIVD (0x81a009c0) | |
| 279 | #define SPIX_SPARC_IW_FDIVQ (0x81a009e0) | |
| 280 | #define SPIX_SPARC_IW_FDIVS (0x81a009a0) | |
| 281 | #define SPIX_SPARC_IW_FDMULQ (0x81a00dc0) | |
| 282 | #define SPIX_SPARC_IW_FDTOI (0x81a01a40) | |
| 283 | #define SPIX_SPARC_IW_FDTOQ (0x81a019c0) | |
| 284 | #define SPIX_SPARC_IW_FDTOS (0x81a018c0) | |
| 285 | #define SPIX_SPARC_IW_FDTOX (0x81a01040) | |
| 286 | #define SPIX_SPARC_IW_FEXPAND (0x81b009a0) | |
| 287 | #define SPIX_SPARC_IW_FITOD (0x81a01900) | |
| 288 | #define SPIX_SPARC_IW_FITOQ (0x81a01980) | |
| 289 | #define SPIX_SPARC_IW_FITOS (0x81a01880) | |
| 290 | #define SPIX_SPARC_IW_FLUSH (0x81d80000) | |
| 291 | #define SPIX_SPARC_IW_FLUSHW (0x81580000) | |
| 292 | #define SPIX_SPARC_IW_FMOVD (0x81a00040) | |
| 293 | #define SPIX_SPARC_IW_FMOVDA (0x81aa2040) | |
| 294 | #define SPIX_SPARC_IW_FMOVDCC (0x81ab6040) | |
| 295 | #define SPIX_SPARC_IW_FMOVDCS (0x81a96040) | |
| 296 | #define SPIX_SPARC_IW_FMOVDE (0x81a86040) | |
| 297 | #define SPIX_SPARC_IW_FMOVDFA (0x81aa0040) | |
| 298 | #define SPIX_SPARC_IW_FMOVDFE (0x81aa4040) | |
| 299 | #define SPIX_SPARC_IW_FMOVDFG (0x81a98040) | |
| 300 | #define SPIX_SPARC_IW_FMOVDFGE (0x81aac040) | |
| 301 | #define SPIX_SPARC_IW_FMOVDFL (0x81a90040) | |
| 302 | #define SPIX_SPARC_IW_FMOVDFLE (0x81ab4040) | |
| 303 | #define SPIX_SPARC_IW_FMOVDFLG (0x81a88040) | |
| 304 | #define SPIX_SPARC_IW_FMOVDFN (0x81a80040) | |
| 305 | #define SPIX_SPARC_IW_FMOVDFNE (0x81a84040) | |
| 306 | #define SPIX_SPARC_IW_FMOVDFO (0x81abc040) | |
| 307 | #define SPIX_SPARC_IW_FMOVDFU (0x81a9c040) | |
| 308 | #define SPIX_SPARC_IW_FMOVDFUE (0x81aa8040) | |
| 309 | #define SPIX_SPARC_IW_FMOVDFUG (0x81a94040) | |
| 310 | #define SPIX_SPARC_IW_FMOVDFUGE (0x81ab0040) | |
| 311 | #define SPIX_SPARC_IW_FMOVDFUL (0x81a8c040) | |
| 312 | #define SPIX_SPARC_IW_FMOVDFULE (0x81ab8040) | |
| 313 | #define SPIX_SPARC_IW_FMOVDG (0x81aaa040) | |
| 314 | #define SPIX_SPARC_IW_FMOVDGE (0x81aae040) | |
| 315 | #define SPIX_SPARC_IW_FMOVDGU (0x81ab2040) | |
| 316 | #define SPIX_SPARC_IW_FMOVDL (0x81a8e040) | |
| 317 | #define SPIX_SPARC_IW_FMOVDLE (0x81a8a040) | |
| 318 | #define SPIX_SPARC_IW_FMOVDLEU (0x81a92040) | |
| 319 | #define SPIX_SPARC_IW_FMOVDN (0x81a82040) | |
| 320 | #define SPIX_SPARC_IW_FMOVDNE (0x81aa6040) | |
| 321 | #define SPIX_SPARC_IW_FMOVDNEG (0x81a9a040) | |
| 322 | #define SPIX_SPARC_IW_FMOVDPOS (0x81aba040) | |
| 323 | #define SPIX_SPARC_IW_FMOVDVC (0x81abe040) | |
| 324 | #define SPIX_SPARC_IW_FMOVDVS (0x81a9e040) | |
| 325 | #define SPIX_SPARC_IW_FMOVQ (0x81a00060) | |
| 326 | #define SPIX_SPARC_IW_FMOVQA (0x81aa2060) | |
| 327 | #define SPIX_SPARC_IW_FMOVQCC (0x81ab6060) | |
| 328 | #define SPIX_SPARC_IW_FMOVQCS (0x81a96060) | |
| 329 | #define SPIX_SPARC_IW_FMOVQE (0x81a86060) | |
| 330 | #define SPIX_SPARC_IW_FMOVQFA (0x81aa0060) | |
| 331 | #define SPIX_SPARC_IW_FMOVQFE (0x81aa4060) | |
| 332 | #define SPIX_SPARC_IW_FMOVQFG (0x81a98060) | |
| 333 | #define SPIX_SPARC_IW_FMOVQFGE (0x81aac060) | |
| 334 | #define SPIX_SPARC_IW_FMOVQFL (0x81a90060) | |
| 335 | #define SPIX_SPARC_IW_FMOVQFLE (0x81ab4060) | |
| 336 | #define SPIX_SPARC_IW_FMOVQFLG (0x81a88060) | |
| 337 | #define SPIX_SPARC_IW_FMOVQFN (0x81a80060) | |
| 338 | #define SPIX_SPARC_IW_FMOVQFNE (0x81a84060) | |
| 339 | #define SPIX_SPARC_IW_FMOVQFO (0x81abc060) | |
| 340 | #define SPIX_SPARC_IW_FMOVQFU (0x81a9c060) | |
| 341 | #define SPIX_SPARC_IW_FMOVQFUE (0x81aa8060) | |
| 342 | #define SPIX_SPARC_IW_FMOVQFUG (0x81a94060) | |
| 343 | #define SPIX_SPARC_IW_FMOVQFUGE (0x81ab0060) | |
| 344 | #define SPIX_SPARC_IW_FMOVQFUL (0x81a8c060) | |
| 345 | #define SPIX_SPARC_IW_FMOVQFULE (0x81ab8060) | |
| 346 | #define SPIX_SPARC_IW_FMOVQG (0x81aaa060) | |
| 347 | #define SPIX_SPARC_IW_FMOVQGE (0x81aae060) | |
| 348 | #define SPIX_SPARC_IW_FMOVQGU (0x81ab2060) | |
| 349 | #define SPIX_SPARC_IW_FMOVQL (0x81a8e060) | |
| 350 | #define SPIX_SPARC_IW_FMOVQLE (0x81a8a060) | |
| 351 | #define SPIX_SPARC_IW_FMOVQLEU (0x81a92060) | |
| 352 | #define SPIX_SPARC_IW_FMOVQN (0x81a82060) | |
| 353 | #define SPIX_SPARC_IW_FMOVQNE (0x81aa6060) | |
| 354 | #define SPIX_SPARC_IW_FMOVQNEG (0x81a9a060) | |
| 355 | #define SPIX_SPARC_IW_FMOVQPOS (0x81aba060) | |
| 356 | #define SPIX_SPARC_IW_FMOVQVC (0x81abe060) | |
| 357 | #define SPIX_SPARC_IW_FMOVQVS (0x81a9e060) | |
| 358 | #define SPIX_SPARC_IW_FMOVRDGEZ (0x81a81cc0) | |
| 359 | #define SPIX_SPARC_IW_FMOVRDGZ (0x81a818c0) | |
| 360 | #define SPIX_SPARC_IW_FMOVRDLEZ (0x81a808c0) | |
| 361 | #define SPIX_SPARC_IW_FMOVRDLZ (0x81a80cc0) | |
| 362 | #define SPIX_SPARC_IW_FMOVRDNZ (0x81a814c0) | |
| 363 | #define SPIX_SPARC_IW_FMOVRDZ (0x81a804c0) | |
| 364 | #define SPIX_SPARC_IW_FMOVRQGEZ (0x81a81ce0) | |
| 365 | #define SPIX_SPARC_IW_FMOVRQGZ (0x81a818e0) | |
| 366 | #define SPIX_SPARC_IW_FMOVRQLEZ (0x81a808e0) | |
| 367 | #define SPIX_SPARC_IW_FMOVRQLZ (0x81a80ce0) | |
| 368 | #define SPIX_SPARC_IW_FMOVRQNZ (0x81a814e0) | |
| 369 | #define SPIX_SPARC_IW_FMOVRQZ (0x81a804e0) | |
| 370 | #define SPIX_SPARC_IW_FMOVRSGEZ (0x81a81ca0) | |
| 371 | #define SPIX_SPARC_IW_FMOVRSGZ (0x81a818a0) | |
| 372 | #define SPIX_SPARC_IW_FMOVRSLEZ (0x81a808a0) | |
| 373 | #define SPIX_SPARC_IW_FMOVRSLZ (0x81a80ca0) | |
| 374 | #define SPIX_SPARC_IW_FMOVRSNZ (0x81a814a0) | |
| 375 | #define SPIX_SPARC_IW_FMOVRSZ (0x81a804a0) | |
| 376 | #define SPIX_SPARC_IW_FMOVS (0x81a00020) | |
| 377 | #define SPIX_SPARC_IW_FMOVSA (0x81aa2020) | |
| 378 | #define SPIX_SPARC_IW_FMOVSCC (0x81ab6020) | |
| 379 | #define SPIX_SPARC_IW_FMOVSCS (0x81a96020) | |
| 380 | #define SPIX_SPARC_IW_FMOVSE (0x81a86020) | |
| 381 | #define SPIX_SPARC_IW_FMOVSFA (0x81aa0020) | |
| 382 | #define SPIX_SPARC_IW_FMOVSFE (0x81aa4020) | |
| 383 | #define SPIX_SPARC_IW_FMOVSFG (0x81a98020) | |
| 384 | #define SPIX_SPARC_IW_FMOVSFGE (0x81aac020) | |
| 385 | #define SPIX_SPARC_IW_FMOVSFL (0x81a90020) | |
| 386 | #define SPIX_SPARC_IW_FMOVSFLE (0x81ab4020) | |
| 387 | #define SPIX_SPARC_IW_FMOVSFLG (0x81a88020) | |
| 388 | #define SPIX_SPARC_IW_FMOVSFN (0x81a80020) | |
| 389 | #define SPIX_SPARC_IW_FMOVSFNE (0x81a84020) | |
| 390 | #define SPIX_SPARC_IW_FMOVSFO (0x81abc020) | |
| 391 | #define SPIX_SPARC_IW_FMOVSFU (0x81a9c020) | |
| 392 | #define SPIX_SPARC_IW_FMOVSFUE (0x81aa8020) | |
| 393 | #define SPIX_SPARC_IW_FMOVSFUG (0x81a94020) | |
| 394 | #define SPIX_SPARC_IW_FMOVSFUGE (0x81ab0020) | |
| 395 | #define SPIX_SPARC_IW_FMOVSFUL (0x81a8c020) | |
| 396 | #define SPIX_SPARC_IW_FMOVSFULE (0x81ab8020) | |
| 397 | #define SPIX_SPARC_IW_FMOVSG (0x81aaa020) | |
| 398 | #define SPIX_SPARC_IW_FMOVSGE (0x81aae020) | |
| 399 | #define SPIX_SPARC_IW_FMOVSGU (0x81ab2020) | |
| 400 | #define SPIX_SPARC_IW_FMOVSL (0x81a8e020) | |
| 401 | #define SPIX_SPARC_IW_FMOVSLE (0x81a8a020) | |
| 402 | #define SPIX_SPARC_IW_FMOVSLEU (0x81a92020) | |
| 403 | #define SPIX_SPARC_IW_FMOVSN (0x81a82020) | |
| 404 | #define SPIX_SPARC_IW_FMOVSNE (0x81aa6020) | |
| 405 | #define SPIX_SPARC_IW_FMOVSNEG (0x81a9a020) | |
| 406 | #define SPIX_SPARC_IW_FMOVSPOS (0x81aba020) | |
| 407 | #define SPIX_SPARC_IW_FMOVSVC (0x81abe020) | |
| 408 | #define SPIX_SPARC_IW_FMOVSVS (0x81a9e020) | |
| 409 | #define SPIX_SPARC_IW_FMUL8SUX16 (0x81b006c0) | |
| 410 | #define SPIX_SPARC_IW_FMUL8ULX16 (0x81b006e0) | |
| 411 | #define SPIX_SPARC_IW_FMUL8X16 (0x81b00620) | |
| 412 | #define SPIX_SPARC_IW_FMUL8X16AL (0x81b006a0) | |
| 413 | #define SPIX_SPARC_IW_FMUL8X16AU (0x81b00660) | |
| 414 | #define SPIX_SPARC_IW_FMULD (0x81a00940) | |
| 415 | #define SPIX_SPARC_IW_FMULD8SUX16 (0x81b00700) | |
| 416 | #define SPIX_SPARC_IW_FMULD8ULX16 (0x81b00720) | |
| 417 | #define SPIX_SPARC_IW_FMULQ (0x81a00960) | |
| 418 | #define SPIX_SPARC_IW_FMULS (0x81a00920) | |
| 419 | #define SPIX_SPARC_IW_FNAND (0x81b00dc0) | |
| 420 | #define SPIX_SPARC_IW_FNANDS (0x81b00de0) | |
| 421 | #define SPIX_SPARC_IW_FNEGD (0x81a000c0) | |
| 422 | #define SPIX_SPARC_IW_FNEGQ (0x81a000e0) | |
| 423 | #define SPIX_SPARC_IW_FNEGS (0x81a000a0) | |
| 424 | #define SPIX_SPARC_IW_FNOR (0x81b00c40) | |
| 425 | #define SPIX_SPARC_IW_FNORS (0x81b00c60) | |
| 426 | #define SPIX_SPARC_IW_FNOT1 (0x81b00d40) | |
| 427 | #define SPIX_SPARC_IW_FNOT1S (0x81b00d60) | |
| 428 | #define SPIX_SPARC_IW_FNOT2 (0x81b00cc0) | |
| 429 | #define SPIX_SPARC_IW_FNOT2S (0x81b00ce0) | |
| 430 | #define SPIX_SPARC_IW_FONE (0x81b00fc0) | |
| 431 | #define SPIX_SPARC_IW_FONES (0x81b00fe0) | |
| 432 | #define SPIX_SPARC_IW_FOR (0x81b00f80) | |
| 433 | #define SPIX_SPARC_IW_FORNOT1 (0x81b00f40) | |
| 434 | #define SPIX_SPARC_IW_FORNOT1S (0x81b00f60) | |
| 435 | #define SPIX_SPARC_IW_FORNOT2 (0x81b00ec0) | |
| 436 | #define SPIX_SPARC_IW_FORNOT2S (0x81b00ee0) | |
| 437 | #define SPIX_SPARC_IW_FORS (0x81b00fa0) | |
| 438 | #define SPIX_SPARC_IW_FPACK16 (0x81b00760) | |
| 439 | #define SPIX_SPARC_IW_FPACK32 (0x81b00740) | |
| 440 | #define SPIX_SPARC_IW_FPACKFIX (0x81b007a0) | |
| 441 | #define SPIX_SPARC_IW_FPADD16 (0x81b00a00) | |
| 442 | #define SPIX_SPARC_IW_FPADD16S (0x81b00a20) | |
| 443 | #define SPIX_SPARC_IW_FPADD32 (0x81b00a40) | |
| 444 | #define SPIX_SPARC_IW_FPADD32S (0x81b00a60) | |
| 445 | #define SPIX_SPARC_IW_FPMERGE (0x81b00960) | |
| 446 | #define SPIX_SPARC_IW_FPSUB16 (0x81b00a80) | |
| 447 | #define SPIX_SPARC_IW_FPSUB16S (0x81b00aa0) | |
| 448 | #define SPIX_SPARC_IW_FPSUB32 (0x81b00ac0) | |
| 449 | #define SPIX_SPARC_IW_FPSUB32S (0x81b00ae0) | |
| 450 | #define SPIX_SPARC_IW_FQTOD (0x81a01960) | |
| 451 | #define SPIX_SPARC_IW_FQTOI (0x81a01a60) | |
| 452 | #define SPIX_SPARC_IW_FQTOS (0x81a018e0) | |
| 453 | #define SPIX_SPARC_IW_FQTOX (0x81a01060) | |
| 454 | #define SPIX_SPARC_IW_FSMULD (0x81a00d20) | |
| 455 | #define SPIX_SPARC_IW_FSQRTD (0x81a00540) | |
| 456 | #define SPIX_SPARC_IW_FSQRTQ (0x81a00560) | |
| 457 | #define SPIX_SPARC_IW_FSQRTS (0x81a00520) | |
| 458 | #define SPIX_SPARC_IW_FSRC1 (0x81b00e80) | |
| 459 | #define SPIX_SPARC_IW_FSRC1S (0x81b00ea0) | |
| 460 | #define SPIX_SPARC_IW_FSRC2 (0x81b00f00) | |
| 461 | #define SPIX_SPARC_IW_FSRC2S (0x81b00f20) | |
| 462 | #define SPIX_SPARC_IW_FSTOD (0x81a01920) | |
| 463 | #define SPIX_SPARC_IW_FSTOI (0x81a01a20) | |
| 464 | #define SPIX_SPARC_IW_FSTOQ (0x81a019a0) | |
| 465 | #define SPIX_SPARC_IW_FSTOX (0x81a01020) | |
| 466 | #define SPIX_SPARC_IW_FSUBD (0x81a008c0) | |
| 467 | #define SPIX_SPARC_IW_FSUBQ (0x81a008e0) | |
| 468 | #define SPIX_SPARC_IW_FSUBS (0x81a008a0) | |
| 469 | #define SPIX_SPARC_IW_FXNOR (0x81b00e40) | |
| 470 | #define SPIX_SPARC_IW_FXNORS (0x81b00e60) | |
| 471 | #define SPIX_SPARC_IW_FXOR (0x81b00d80) | |
| 472 | #define SPIX_SPARC_IW_FXORS (0x81b00da0) | |
| 473 | #define SPIX_SPARC_IW_FXTOD (0x81a01100) | |
| 474 | #define SPIX_SPARC_IW_FXTOQ (0x81a01180) | |
| 475 | #define SPIX_SPARC_IW_FXTOS (0x81a01080) | |
| 476 | #define SPIX_SPARC_IW_FZERO (0x81b00c00) | |
| 477 | #define SPIX_SPARC_IW_FZEROS (0x81b00c20) | |
| 478 | #define SPIX_SPARC_IW_ILLTRAP (0x00000000) | |
| 479 | #define SPIX_SPARC_IW_IMPDEP1 (0x81b00000) | |
| 480 | #define SPIX_SPARC_IW_IMPDEP2 (0x81b80000) | |
| 481 | #define SPIX_SPARC_IW_JMPL (0x81c00000) | |
| 482 | #define SPIX_SPARC_IW_LDD (0xc0180000) | |
| 483 | #define SPIX_SPARC_IW_LDDA (0xc0980000) | |
| 484 | #define SPIX_SPARC_IW_LDDF (0xc1180000) | |
| 485 | #define SPIX_SPARC_IW_LDDFA (0xc1980000) | |
| 486 | #define SPIX_SPARC_IW_LDF (0xc1000000) | |
| 487 | #define SPIX_SPARC_IW_LDFA (0xc1800000) | |
| 488 | #define SPIX_SPARC_IW_LDFSR (0xc1080000) | |
| 489 | #define SPIX_SPARC_IW_LDQF (0xc1100000) | |
| 490 | #define SPIX_SPARC_IW_LDQFA (0xc1900000) | |
| 491 | #define SPIX_SPARC_IW_LDSB (0xc0480000) | |
| 492 | #define SPIX_SPARC_IW_LDSBA (0xc0c80000) | |
| 493 | #define SPIX_SPARC_IW_LDSH (0xc0500000) | |
| 494 | #define SPIX_SPARC_IW_LDSHA (0xc0d00000) | |
| 495 | #define SPIX_SPARC_IW_LDSTUB (0xc0680000) | |
| 496 | #define SPIX_SPARC_IW_LDSTUBA (0xc0e80000) | |
| 497 | #define SPIX_SPARC_IW_LDSW (0xc0400000) | |
| 498 | #define SPIX_SPARC_IW_LDSWA (0xc0c00000) | |
| 499 | #define SPIX_SPARC_IW_LDUB (0xc0080000) | |
| 500 | #define SPIX_SPARC_IW_LDUBA (0xc0880000) | |
| 501 | #define SPIX_SPARC_IW_LDUH (0xc0100000) | |
| 502 | #define SPIX_SPARC_IW_LDUHA (0xc0900000) | |
| 503 | #define SPIX_SPARC_IW_LDUW (0xc0000000) | |
| 504 | #define SPIX_SPARC_IW_LDUWA (0xc0800000) | |
| 505 | #define SPIX_SPARC_IW_LDX (0xc0580000) | |
| 506 | #define SPIX_SPARC_IW_LDXA (0xc0d80000) | |
| 507 | #define SPIX_SPARC_IW_LDXFSR (0xc3080000) | |
| 508 | #define SPIX_SPARC_IW_MEMBAR (0x8143c000) | |
| 509 | #define SPIX_SPARC_IW_MOVA (0x81660000) | |
| 510 | #define SPIX_SPARC_IW_MOVCC (0x81674000) | |
| 511 | #define SPIX_SPARC_IW_MOVCS (0x81654000) | |
| 512 | #define SPIX_SPARC_IW_MOVE (0x81644000) | |
| 513 | #define SPIX_SPARC_IW_MOVFA (0x81620000) | |
| 514 | #define SPIX_SPARC_IW_MOVFE (0x81624000) | |
| 515 | #define SPIX_SPARC_IW_MOVFG (0x81618000) | |
| 516 | #define SPIX_SPARC_IW_MOVFGE (0x8162c000) | |
| 517 | #define SPIX_SPARC_IW_MOVFL (0x81610000) | |
| 518 | #define SPIX_SPARC_IW_MOVFLE (0x81634000) | |
| 519 | #define SPIX_SPARC_IW_MOVFLG (0x81608000) | |
| 520 | #define SPIX_SPARC_IW_MOVFN (0x81600000) | |
| 521 | #define SPIX_SPARC_IW_MOVFNE (0x81604000) | |
| 522 | #define SPIX_SPARC_IW_MOVFO (0x8163c000) | |
| 523 | #define SPIX_SPARC_IW_MOVFU (0x8161c000) | |
| 524 | #define SPIX_SPARC_IW_MOVFUE (0x81628000) | |
| 525 | #define SPIX_SPARC_IW_MOVFUG (0x81614000) | |
| 526 | #define SPIX_SPARC_IW_MOVFUGE (0x81630000) | |
| 527 | #define SPIX_SPARC_IW_MOVFUL (0x8160c000) | |
| 528 | #define SPIX_SPARC_IW_MOVFULE (0x81638000) | |
| 529 | #define SPIX_SPARC_IW_MOVG (0x81668000) | |
| 530 | #define SPIX_SPARC_IW_MOVGE (0x8166c000) | |
| 531 | #define SPIX_SPARC_IW_MOVGU (0x81670000) | |
| 532 | #define SPIX_SPARC_IW_MOVL (0x8164c000) | |
| 533 | #define SPIX_SPARC_IW_MOVLE (0x81648000) | |
| 534 | #define SPIX_SPARC_IW_MOVLEU (0x81650000) | |
| 535 | #define SPIX_SPARC_IW_MOVN (0x81640000) | |
| 536 | #define SPIX_SPARC_IW_MOVNE (0x81664000) | |
| 537 | #define SPIX_SPARC_IW_MOVNEG (0x81658000) | |
| 538 | #define SPIX_SPARC_IW_MOVPOS (0x81678000) | |
| 539 | #define SPIX_SPARC_IW_MOVRGEZ (0x81781c00) | |
| 540 | #define SPIX_SPARC_IW_MOVRGZ (0x81781800) | |
| 541 | #define SPIX_SPARC_IW_MOVRLEZ (0x81780800) | |
| 542 | #define SPIX_SPARC_IW_MOVRLZ (0x81780c00) | |
| 543 | #define SPIX_SPARC_IW_MOVRNZ (0x81781400) | |
| 544 | #define SPIX_SPARC_IW_MOVRZ (0x81780400) | |
| 545 | #define SPIX_SPARC_IW_MOVVC (0x8167c000) | |
| 546 | #define SPIX_SPARC_IW_MOVVS (0x8165c000) | |
| 547 | #define SPIX_SPARC_IW_MULSCC (0x81200000) | |
| 548 | #define SPIX_SPARC_IW_MULX (0x80480000) | |
| 549 | #define SPIX_SPARC_IW_NOP (0x01000000) | |
| 550 | #define SPIX_SPARC_IW_OR (0x80100000) | |
| 551 | #define SPIX_SPARC_IW_ORCC (0x80900000) | |
| 552 | #define SPIX_SPARC_IW_ORN (0x80300000) | |
| 553 | #define SPIX_SPARC_IW_ORNCC (0x80b00000) | |
| 554 | #define SPIX_SPARC_IW_PDIST (0x81b007c0) | |
| 555 | #define SPIX_SPARC_IW_POPC (0x81700000) | |
| 556 | #define SPIX_SPARC_IW_PREFETCH (0xc1680000) | |
| 557 | #define SPIX_SPARC_IW_PREFETCHA (0xc1e80000) | |
| 558 | #define SPIX_SPARC_IW_RDASI (0x8140c000) | |
| 559 | #define SPIX_SPARC_IW_RDASR (0x81400000) | |
| 560 | #define SPIX_SPARC_IW_RDCCR (0x81408000) | |
| 561 | #define SPIX_SPARC_IW_RDFPRS (0x81418000) | |
| 562 | #define SPIX_SPARC_IW_RDPC (0x81414000) | |
| 563 | #define SPIX_SPARC_IW_RDPR (0x81500000) | |
| 564 | #define SPIX_SPARC_IW_RDTICK (0x81410000) | |
| 565 | #define SPIX_SPARC_IW_RDY (0x81400000) | |
| 566 | #define SPIX_SPARC_IW_RESTORE (0x81e80000) | |
| 567 | #define SPIX_SPARC_IW_RESTORED (0x83880000) | |
| 568 | #define SPIX_SPARC_IW_RETRY (0x83f00000) | |
| 569 | #define SPIX_SPARC_IW_RETURN (0x81c80000) | |
| 570 | #define SPIX_SPARC_IW_SAVE (0x81e00000) | |
| 571 | #define SPIX_SPARC_IW_SAVED (0x81880000) | |
| 572 | #define SPIX_SPARC_IW_SDIV (0x80780000) | |
| 573 | #define SPIX_SPARC_IW_SDIVCC (0x80f80000) | |
| 574 | #define SPIX_SPARC_IW_SDIVX (0x81680000) | |
| 575 | #define SPIX_SPARC_IW_RESERVED_0 (0x00000000) | |
| 576 | #define SPIX_SPARC_IW_SETHI (0x01000000) | |
| 577 | #define SPIX_SPARC_IW_SHUTDOWN (0x81b01000) | |
| 578 | #define SPIX_SPARC_IW_SIR (0x9f802000) | |
| 579 | #define SPIX_SPARC_IW_SLL (0x81280000) | |
| 580 | #define SPIX_SPARC_IW_SLLX (0x81281000) | |
| 581 | #define SPIX_SPARC_IW_SMUL (0x80580000) | |
| 582 | #define SPIX_SPARC_IW_SMULCC (0x80d80000) | |
| 583 | #define SPIX_SPARC_IW_SRA (0x81380000) | |
| 584 | #define SPIX_SPARC_IW_SRAX (0x81381000) | |
| 585 | #define SPIX_SPARC_IW_SRL (0x81300000) | |
| 586 | #define SPIX_SPARC_IW_SRLX (0x81301000) | |
| 587 | #define SPIX_SPARC_IW_STB (0xc0280000) | |
| 588 | #define SPIX_SPARC_IW_STBA (0xc0a80000) | |
| 589 | #define SPIX_SPARC_IW_STD (0xc0380000) | |
| 590 | #define SPIX_SPARC_IW_STDA (0xc0b80000) | |
| 591 | #define SPIX_SPARC_IW_STDF (0xc1380000) | |
| 592 | #define SPIX_SPARC_IW_STDFA (0xc1b80000) | |
| 593 | #define SPIX_SPARC_IW_STF (0xc1200000) | |
| 594 | #define SPIX_SPARC_IW_STFA (0xc1a00000) | |
| 595 | #define SPIX_SPARC_IW_STFSR (0xc1280000) | |
| 596 | #define SPIX_SPARC_IW_STH (0xc0300000) | |
| 597 | #define SPIX_SPARC_IW_STHA (0xc0b00000) | |
| 598 | #define SPIX_SPARC_IW_STQF (0xc1300000) | |
| 599 | #define SPIX_SPARC_IW_STQFA (0xc1b00000) | |
| 600 | #define SPIX_SPARC_IW_STW (0xc0200000) | |
| 601 | #define SPIX_SPARC_IW_STWA (0xc0a00000) | |
| 602 | #define SPIX_SPARC_IW_STX (0xc0700000) | |
| 603 | #define SPIX_SPARC_IW_STXA (0xc0f00000) | |
| 604 | #define SPIX_SPARC_IW_STXFSR (0xc3280000) | |
| 605 | #define SPIX_SPARC_IW_SUB (0x80200000) | |
| 606 | #define SPIX_SPARC_IW_SUBC (0x80600000) | |
| 607 | #define SPIX_SPARC_IW_SUBCC (0x80a00000) | |
| 608 | #define SPIX_SPARC_IW_SUBCCC (0x80e00000) | |
| 609 | #define SPIX_SPARC_IW_SWAP (0xc0780000) | |
| 610 | #define SPIX_SPARC_IW_SWAPA (0xc0f80000) | |
| 611 | #define SPIX_SPARC_IW_TA (0x91d00000) | |
| 612 | #define SPIX_SPARC_IW_TADDCC (0x81000000) | |
| 613 | #define SPIX_SPARC_IW_TADDCCTV (0x81100000) | |
| 614 | #define SPIX_SPARC_IW_TCC (0x9bd00000) | |
| 615 | #define SPIX_SPARC_IW_TCS (0x8bd00000) | |
| 616 | #define SPIX_SPARC_IW_TE (0x83d00000) | |
| 617 | #define SPIX_SPARC_IW_TG (0x95d00000) | |
| 618 | #define SPIX_SPARC_IW_TGE (0x97d00000) | |
| 619 | #define SPIX_SPARC_IW_TGU (0x99d00000) | |
| 620 | #define SPIX_SPARC_IW_TL (0x87d00000) | |
| 621 | #define SPIX_SPARC_IW_TLE (0x85d00000) | |
| 622 | #define SPIX_SPARC_IW_TLEU (0x89d00000) | |
| 623 | #define SPIX_SPARC_IW_TN (0x81d00000) | |
| 624 | #define SPIX_SPARC_IW_TNE (0x93d00000) | |
| 625 | #define SPIX_SPARC_IW_TNEG (0x8dd00000) | |
| 626 | #define SPIX_SPARC_IW_TPOSZ (0x9dd00000) | |
| 627 | #define SPIX_SPARC_IW_TSUBCC (0x81080000) | |
| 628 | #define SPIX_SPARC_IW_TSUBCCTV (0x81180000) | |
| 629 | #define SPIX_SPARC_IW_TVC (0x9fd00000) | |
| 630 | #define SPIX_SPARC_IW_TVS (0x8fd00000) | |
| 631 | #define SPIX_SPARC_IW_UDIV (0x80700000) | |
| 632 | #define SPIX_SPARC_IW_UDIVCC (0x80f00000) | |
| 633 | #define SPIX_SPARC_IW_UDIVX (0x80680000) | |
| 634 | #define SPIX_SPARC_IW_UMUL (0x80500000) | |
| 635 | #define SPIX_SPARC_IW_UMULCC (0x80d00000) | |
| 636 | #define SPIX_SPARC_IW_RESERVED_1 (0x00000000) | |
| 637 | #define SPIX_SPARC_IW_WRASI (0x87800000) | |
| 638 | #define SPIX_SPARC_IW_WRASR (0x81800000) | |
| 639 | #define SPIX_SPARC_IW_WRCCR (0x85800000) | |
| 640 | #define SPIX_SPARC_IW_WRFPRS (0x8d800000) | |
| 641 | #define SPIX_SPARC_IW_WRPR (0x81900000) | |
| 642 | #define SPIX_SPARC_IW_WRY (0x81800000) | |
| 643 | #define SPIX_SPARC_IW_XNOR (0x80380000) | |
| 644 | #define SPIX_SPARC_IW_XNORCC (0x80b80000) | |
| 645 | #define SPIX_SPARC_IW_XOR (0x80180000) | |
| 646 | #define SPIX_SPARC_IW_XORCC (0x80980000) | |
| 647 | ||
| 648 | /* VIS3.0 instructions */ | |
| 649 | #define SPIX_SPARC_IW_BMASK (0x81b00320) | |
| 650 | #define SPIX_SPARC_IW_BSHUFFLE (0x81b00980) | |
| 651 | #define SPIX_SPARC_IW_EDGE16LN (0x81b00060) | |
| 652 | #define SPIX_SPARC_IW_EDGE16N (0x81b000a0) | |
| 653 | #define SPIX_SPARC_IW_EDGE32LN (0x81b00160) | |
| 654 | #define SPIX_SPARC_IW_EDGE32N (0x81b00120) | |
| 655 | #define SPIX_SPARC_IW_EDGE8LN (0x81b00040) | |
| 656 | #define SPIX_SPARC_IW_EDGE8N (0x81b00020) | |
| 657 | #define SPIX_SPARC_IW_FCHKSM16 (0x81b00880) | |
| 658 | #define SPIX_SPARC_IW_FLCMPD (0x81b02a40) | |
| 659 | #define SPIX_SPARC_IW_FLCMPS (0x81b02a20) | |
| 660 | #define SPIX_SPARC_IW_FMEAN16 (0x81b00800) | |
| 661 | #define SPIX_SPARC_IW_FMERGESP (0x81b009e0) | |
| 662 | #define SPIX_SPARC_IW_FPADDS16 (0x81b00b00) | |
| 663 | #define SPIX_SPARC_IW_FPADDS16S (0x81b00b20) | |
| 664 | #define SPIX_SPARC_IW_FPADDS32 (0x81b00b40) | |
| 665 | #define SPIX_SPARC_IW_FPADDS32S (0x81b00b60) | |
| 666 | #define SPIX_SPARC_IW_FPMOVC16 (0x81b00940) | |
| 667 | #define SPIX_SPARC_IW_FPMOVC32 (0x81b009c0) | |
| 668 | #define SPIX_SPARC_IW_FPSUBS16 (0x81b00b80) | |
| 669 | #define SPIX_SPARC_IW_FPSUBS16S (0x81b00ba0) | |
| 670 | #define SPIX_SPARC_IW_FPSUBS32 (0x81b00bc0) | |
| 671 | #define SPIX_SPARC_IW_FPSUBS32S (0x81b00be0) | |
| 672 | #define SPIX_SPARC_IW_FSLL16 (0x81b00420) | |
| 673 | #define SPIX_SPARC_IW_FSLL32 (0x81b004a0) | |
| 674 | #define SPIX_SPARC_IW_FSLAS16 (0x81b00520) | |
| 675 | #define SPIX_SPARC_IW_FSLAS32 (0x81b005a0) | |
| 676 | #define SPIX_SPARC_IW_FSRA16 (0x81b00560) | |
| 677 | #define SPIX_SPARC_IW_FSRA32 (0x81b005e0) | |
| 678 | #define SPIX_SPARC_IW_FSRL16 (0x81b00460) | |
| 679 | #define SPIX_SPARC_IW_FSRL32 (0x81b004c0) | |
| 680 | #define SPIX_SPARC_IW_LZD (0x81b002e0) | |
| 681 | #define SPIX_SPARC_IW_RDGSR (0x8144c000) | |
| 682 | #define SPIX_SPARC_IW_SFABSS (0x81b02120) | |
| 683 | #define SPIX_SPARC_IW_SFADDS (0x81b02820) | |
| 684 | #define SPIX_SPARC_IW_SFCMPSEQ (0x81b02e20) | |
| 685 | #define SPIX_SPARC_IW_SFCMPSGT (0x81b02ee0) | |
| 686 | #define SPIX_SPARC_IW_SFCMPSLE (0x81b02e20) | |
| 687 | #define SPIX_SPARC_IW_SFCMPSNE (0x81b02e60) | |
| 688 | #define SPIX_SPARC_IW_SFITOS (0x81b03880) | |
| 689 | #define SPIX_SPARC_IW_SFMULS (0x81b02920) | |
| 690 | #define SPIX_SPARC_IW_SFNEGS (0x81b020a0) | |
| 691 | #define SPIX_SPARC_IW_SFSTOI (0x81b03a20) | |
| 692 | #define SPIX_SPARC_IW_SFSUBS (0x81b028a0) | |
| 693 | #define SPIX_SPARC_IW_SIAM (0x81b01020) | |
| 694 | #define SPIX_SPARC_IW_UMULXHI (0x81b002c0) | |
| 695 | #define SPIX_SPARC_IW_WRGSR (0xa7800000) | |
| 696 | #define SPIX_SPARC_IW_ADDXC (0x81b00220) | |
| 697 | #define SPIX_SPARC_IW_ADDXCCC (0x81b00260) | |
| 698 | ||
| 699 | #define SPIX_SPARC_IW_FMADDS (0x81b80020) | |
| 700 | #define SPIX_SPARC_IW_FMADDD (0x81b80040) | |
| 701 | #define SPIX_SPARC_IW_FMSUBS (0x81b800a0) | |
| 702 | #define SPIX_SPARC_IW_FMSUBD (0x81b800c0) | |
| 703 | #define SPIX_SPARC_IW_FNMADDS (0x81b801a0) | |
| 704 | #define SPIX_SPARC_IW_FNMADDD (0x81b801c0) | |
| 705 | #define SPIX_SPARC_IW_FNMSUBS (0x81b80120) | |
| 706 | #define SPIX_SPARC_IW_FNMSUBD (0x81b80140) | |
| 707 | ||
| 708 | #define SPIX_SPARC_IW_FUMADDS (0x81f80020) | |
| 709 | #define SPIX_SPARC_IW_FUMADDD (0x81f80040) | |
| 710 | #define SPIX_SPARC_IW_FUMSUBS (0x81f800a0) | |
| 711 | #define SPIX_SPARC_IW_FUMSUBD (0x81f800c0) | |
| 712 | #define SPIX_SPARC_IW_FUNMADDS (0x81f801a0) | |
| 713 | #define SPIX_SPARC_IW_FUNMADDD (0x81f801c0) | |
| 714 | #define SPIX_SPARC_IW_FUNMSUBS (0x81f80120) | |
| 715 | #define SPIX_SPARC_IW_FUNMSUBD (0x81f80140) | |
| 716 | ||
| 717 | #define SPIX_SPARC_IW_FPADD64 (0x81b00840) | |
| 718 | #define SPIX_SPARC_IW_FPMOVC8 (0x81b00920) | |
| 719 | #define SPIX_SPARC_IW_FPSUB64 (0x81b008c0) | |
| 720 | #define SPIX_SPARC_IW_FUCMPEQ8 (0x81b00780) | |
| 721 | #define SPIX_SPARC_IW_FUCMPGT8 (0x81b00680) | |
| 722 | #define SPIX_SPARC_IW_FUCMPLE8 (0x81b00600) | |
| 723 | #define SPIX_SPARC_IW_FUCMPNE8 (0x81b00640) | |
| 724 | #define SPIX_SPARC_IW_PDISTN (0x81b007e0) | |
| 725 | ||
| 726 | #define SPIX_SPARC_IW_XMULX (0x81b022a0) | |
| 727 | #define SPIX_SPARC_IW_XMULXHI (0x81b022c0) | |
| 728 | ||
| 729 | #define SPIX_SPARC_IW_WRHPR (0x81980000) | |
| 730 | #define SPIX_SPARC_IW_RDHPR (0x81480000) | |
| 731 | ||
| 732 | #define SPIX_SPARC_IW_MOVDTOX (0x81b02200) | |
| 733 | #define SPIX_SPARC_IW_MOVSTOUW (0x81b02220) | |
| 734 | #define SPIX_SPARC_IW_MOVSTOSW (0x81b02260) | |
| 735 | #define SPIX_SPARC_IW_MOVXTOD (0x81b02300) | |
| 736 | #define SPIX_SPARC_IW_MOVWTOS (0x81b02320) | |
| 737 | ||
| 738 | #ifdef __cplusplus | |
| 739 | } | |
| 740 | #endif | |
| 741 | ||
| 742 | #endif /*SPIX_SPARC_IWORDS_H*/ |