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Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / sam-t2 / sam / cpus / vonk / n2 / exe / nas / src / n2_common.rs
CommitLineData
920dae64
AT		 1
2@SIM_set_prompt ("nas");
3
4// Machine configuration
5read-configuration "common.conf"
6
7#ifdef ELF
8load-kernel common.exe
9#else
10load-veri-file mem.image
11#endif // ifdef ELF
12
13#ifdef ONE_THREAD
14pdisable -all
15penable th00
16#elif defined(TWO_THREADS)
17pdisable -all
18penable th00
19penable th01
20#elif defined(FOUR_THREADS)
21pdisable -all
22penable th00
23penable th01
24penable th02
25penable th03
26#endif // ifdef ONE_THREAD
27
28// get symbol address
29@def get_addr(name):
30 cmd= "perl -ne 'if(/%s\s+(\w+)/){ print$1;last}' symbol.tbl " % name
31 addr_str= os.popen(cmd, "r").readline();
32 if not addr_str:
33 addr = 0
34 else:
35 addr = string.atol(addr_str,16)
36 return addr
37
38#ifdef STEP_QUIET
39@RS_set_quiet(1)
40@conf.socket0.setvar = "debug_level=0"
41@conf.socket0.setvar = "tlb_debug=0"
42@conf.swvmem0.setvar = "debug_level=0"
43#endif // ifdef STEP_QUIET
44
45#if defined(MOM)
46
47@conf.mom0.call= "init-anno-sas"
48@conf.mom0.setvar= "itlb0_size_v=0"
49@conf.mom0.setvar= "dtlb0_size_v=0"
50@conf.mom0.setvar= "SKIP_UNCACHED=0"
51@conf.mom0.setvar= "en_thrd_prio_v=0"
52
53#ifdef ONE_THREAD
54@conf.mom0.setvar= "thread_num_per_proc_v=1"
55@conf.mom0.setvar= "pipe_num_per_proc_v=1"
56#elif defined(TWO_THREADS)
57@conf.mom0.setvar= "thread_num_per_proc_v=2"
58#elif defined(FOUR_THREADS)
59@conf.mom0.setvar= "thread_num_per_proc_v=4"
60#else
61@conf.mom0.setvar= "thread_num_per_proc_v=8"
62#endif // ifdef ONE_THREAD
63
64#if defined(L15)
65@conf.mom0.setvar= "l15_cache_v=1"
66@conf.mom0.setvar= "l2_obuf_size_v=30"
67@conf.mom0.setvar= "l2_obuf_watermark_v=22"
68#endif // if defined(L15)
69
70#if defined(L15_RQ_FIRST_PACKET)
71@conf.mom0.setvar= "l15_rq_first_packet_v=1"
72#endif // if defined(L15_RQ_FIRST_PACKET)
73
74#if defined(L2_ALWAYS_HIT)
75@conf.mom0.setvar= "l2_always_hit_v=1"
76#endif // if defined(L2_ALWAYS_HIT)
77
78#if defined(SINGLE_IREFILL)
79@conf.mom0.setvar= "single_irefill_v=1"
80#endif // if defined(SINGLE_IREFILL)
81
82#if defined(FETCH_ACROSS_HALF_LINE)
83@conf.mom0.setvar= "fetch_across_half_line_v=1"
84#endif // if defined(FETCH_ACROSS_HALF_LINE)
85
86#if defined(MOM_RSLT)
87@conf.mom0.setvar= "PRINT_RSLT=1"
88#endif // if defined(MOM_RSLT)
89
90#if defined(MOM_SHOW_IB) || defined(MOM_DEBUG_PIPE)
91@conf.mom0.setvar= "DEBUG_PIPE=1"
92#endif // if defined(MOM_SHOW_IB) || defined(MOM_DEBUG_PIPE)
93
94#if defined(MOM_DEBUSSY)
95@conf.mom0.setvar= "DEBUG_DEBUSSY=1"
96#endif // if defined(MOM_DEBUSSY)
97
98#if defined(THREAD_STATUS_ADDR)
99@conf.mom0.thread_status= THREAD_STATUS_ADDR
100#endif // if defined(THREAD_STATUS_ADDR)
101
102#if defined(SP7)
103@conf.mom0.setvar= "proc_num_v=8"
104#elif defined(SP6)
105@conf.mom0.setvar= "proc_num_v=7"
106#elif defined(SP5)
107@conf.mom0.setvar= "proc_num_v=6"
108#elif defined(SP4)
109@conf.mom0.setvar= "proc_num_v=5"
110#elif defined(SP3)
111@conf.mom0.setvar= "proc_num_v=4"
112#elif defined(SP2)
113@conf.mom0.setvar= "proc_num_v=3"
114#elif defined(SP1)
115@conf.mom0.setvar= "proc_num_v=2"
116#elif defined(SP0)
117@conf.mom0.setvar= "proc_num_v=1"
118#endif // if defined(SP7)
119
120@conf.mom0.PASS= get_addr('\.TRAPS\.T0_GoodTrap_0x100')
121@conf.mom0.FAIL= get_addr('\.TRAPS\.T0_BadTrap_0x101')
122@conf.mom0.HPASS= get_addr('\.HTRAPS\.HT0_GoodTrap_0x100')
123@conf.mom0.HFAIL= get_addr('\.HTRAPS\.HT0_BadTrap_0x101')
124@conf.mom0.DC_ON= get_addr('mom_enable_l1d')
125@conf.mom0.DC_OFF= get_addr('mom_disable_l1d')
126@conf.mom0.IC_ON= get_addr('mom_enable_l1i')
127@conf.mom0.IC_OFF= get_addr('mom_disable_l1i')
128@conf.mom0.T1PASS= get_addr('\.RED\.good_trap')
129@conf.mom0.T1FAIL= get_addr('\.RED\.bad_trap')
130@conf.mom0.APASS= get_addr('\.RED\.good_trap')
131@conf.mom0.AFAIL= get_addr('\.RED\.bad_trap')
132
133#if defined(THREAD_MASK)
134penable -mask=THREAD_MASK
135@conf.mom0.setvar= thread_mask_v=THREAD_MASK
136#endif // if defined(THREAD_MASK)
137
138#if defined(MOM_STAT)
139@conf.mom0.setvar= "THREAD_BASED_STAT=1"
140@conf.mom0.setvar= "print_all_mom_stat=1"
141@conf.mom0.setvar= "START_SIM_IMM=1"
142@conf.mom0.start_cycle= 1
143run 200
144@conf.mom0.reset_all_stat= 1
145#else
146@conf.mom0.setvar= "START_SIM_IMM=1"
147@conf.mom0.start_cycle= 1
148#endif // if defined(MOM_STAT)
149
150
151#ifndef MOM_STEP
152#if defined(MAX_CYCLE)
153run MAX_CYCLE
154#else
155run 1000000
156#endif // if defined(MAX_CYCLE)
157quit
158#endif // ifndef MOM_STEP
159
160#else // if defined(MOM)
161
162// intend to replace THREADS+SPx, THREAD_MASK=10xxxx01 is equivalent to
163// 'SP0 SP3 THREADS=10000001'
164#if defined(THREAD_MASK) || defined(THREAD_MASK1) || defined(THREAD_MASK2) || defined(THREAD_MASK3)
165
166#if defined(THREAD_MASK)
167@conf.swvmem0.thread_mask0 = THREAD_MASK
168#else
169@conf.swvmem0.thread_mask0 = 0
170#endif
171
172#if defined(THREAD_MASK1)
173@conf.swvmem0.thread_mask1 = THREAD_MASK1
174#else
175@conf.swvmem0.thread_mask1 = 0
176#endif
177
178#if defined(THREAD_MASK2)
179@conf.swvmem0.thread_mask2 = THREAD_MASK2
180#else
181@conf.swvmem0.thread_mask2 = 0
182#endif
183
184#if defined(THREAD_MASK3)
185@conf.swvmem0.thread_mask3 = THREAD_MASK3
186#else
187@conf.swvmem0.thread_mask3 = 0
188#endif
189
190#else
191
192// THREADS must work with SPx to set proper CMP registers
193#if defined(THREADS)
194@conf.swvmem0.threads = THREADS
195#endif
196
197#if defined(IGNORE_SP0) || !defined(SP0)
198@conf.swvmem0.ignore_sparc =+ 0
199#endif // if defined(IGNORE_SP0) || !defined(SP0)
200#if defined(IGNORE_SP1) || !defined(SP1)
201@conf.swvmem0.ignore_sparc =+ 1
202#endif // if defined(IGNORE_SP1) || !defined(SP1)
203#if defined(IGNORE_SP2) || !defined(SP2)
204@conf.swvmem0.ignore_sparc =+ 2
205#endif // if defined(IGNORE_SP2) || !defined(SP2)
206#if defined(IGNORE_SP3) || !defined(SP3)
207@conf.swvmem0.ignore_sparc =+ 3
208#endif // if defined(IGNORE_SP3) || !defined(SP3)
209#if defined(IGNORE_SP4) || !defined(SP4)
210@conf.swvmem0.ignore_sparc =+ 4
211#endif // if defined(IGNORE_SP4) || !defined(SP4)
212#if defined(IGNORE_SP5) || !defined(SP5)
213@conf.swvmem0.ignore_sparc =+ 5
214#endif // if defined(IGNORE_SP5) || !defined(SP5)
215#if defined(IGNORE_SP6) || !defined(SP6)
216@conf.swvmem0.ignore_sparc =+ 6
217#endif // if defined(IGNORE_SP6) || !defined(SP6)
218#if defined(IGNORE_SP7) || !defined(SP7)
219@conf.swvmem0.ignore_sparc =+ 7
220#endif // if defined(IGNORE_SP7) || !defined(SP7)
221
222#endif // if defined(THREAD_MASK)
223
224#if defined(THREAD_STATUS_ADDR)
225@conf.swvmem0.thread_status= THREAD_STATUS_ADDR
226#endif // if defined(THREAD_STATUS_ADDR)
227
228#if defined(SAS_RUN)
229
230#if defined(MAX_CYCLE)
231@conf.swvmem0.max_cycle = MAX_CYCLE
232#endif // if defined(MAX_CYCLE)
233
234// if not to go into interactive mode, then let it run until hit a breakpoint
235#if !defined(SAS_IACT)
236run
237quit
238#endif // if !defined(SAS_IACT)
239
240#elif defined(RTL) || defined(PLI_RUN)
241pli-run -1
242quit
243#endif // if-else defined(SAS_RUN)
244
245#endif // if-else defined(MOM)
246
Full OpenSPARC architecture tarball including simulator, hypervisor, and OBP.