Initial commit of OpenSPARC T2 architecture model.

[OpenSPARC-T2-SAM] / sam-t2 / sam / cpus / vonk / n2 / lib / ras / xml / N2_DramErrorLocMem.xml

<!-- interpreter=xml2reg args='-t' -->
<register_list>
<register name="DRAM_ERROR_LOCATION_REG (DRAM_ERROR_LOCATION_REG)">
    <class_name>N2_DramErrorLocMem</class_name>
    <submodule>N2</submodule>
    <comment>
DRAM Error Location Register. Each DRAM channel has an error location register for software to sample to locate a bad memory part. TABLE 12-36 shows the format of the DRAM Error Location Register. TABLE 12-36 Register64 DRAM ErrorLocation Register - DRAM_ERROR_LOCATION_REG (0x84-0000-02a0) (Count 4 Step 4096)
    </comment>
    <base_address>0x84000002a0ULL</base_address>
    <count>4</count>
    <stride>4096</stride>
    <priv>yes</priv>
    <field name="LOCATION">
        <start_offset>0</start_offset>
        <end_offset>35</end_offset>
        <initial_value>0</initial_value>
        <protection>RW</protection>
        <field_type>NORMAL</field_type>
        <comment>
DRAM ECC Error Location, contains the location of the bad nibble. Loaded with each DRAM correctible error.
        </comment>
        <format type="hex"/>
    </field>
    <field name="RSVD0">
        <start_offset>36</start_offset>
        <end_offset>63</end_offset>
        <initial_value>0</initial_value>
        <protection>RO</protection>
        <field_type>ZERO</field_type>
        <comment>
Reserved.
        </comment>
    </field>
</register>
</register_list>