Initial commit of OpenSPARC T2 architecture model.

[OpenSPARC-T2-SAM] / sam-t2 / sam / cpus / vonk / n2 / lib / ras / xml / N2_L2DiagDataAddressingFields.xml

<!-- interpreter=xml2reg args='-t' -->
<register_list>
<register name="L2_DIAG_DATA_ADDRESSING_FIELDS (L2_DIAG_DATA_ADDRESSING_FIELDS)">
    <class_name>N2_L2DiagDataAddressingFields</class_name>
    <submodule>N2</submodule>
    <comment>
This class is based on N2 PRM 1.1 Table 28-43 and splits a virtual
address into the bit fields needed to access the L2 diagnostic data
address space.
    </comment>
    <priv>yes</priv>
    <field name="RSVD2">
        <start_offset>0</start_offset>
        <end_offset>2</end_offset>
        <initial_value>0</initial_value>
        <protection>RO</protection>
        <field_type>ZERO</field_type>
        <comment>
All zero for 64-bit access.
        </comment>
        <format type="hex"/>
    </field>
    <field name="WORD">
        <start_offset>3</start_offset>
        <end_offset>5</end_offset>
        <initial_value>0</initial_value>
        <protection>RW</protection>
        <field_type>NORMAL</field_type>
        <comment>
Selects 64-bit word in 64-byte cache line.
        </comment>
        <format type="hex"/>
    </field>
    <field name="BANK">
        <start_offset>6</start_offset>
        <end_offset>8</end_offset>
        <initial_value>0</initial_value>
        <protection>RW</protection>
        <field_type>NORMAL</field_type>
        <comment>
Selects bank containing the cache line.
        </comment>
        <format type="hex"/>
    </field>
    <field name="SET">
        <start_offset>9</start_offset>
        <end_offset>17</end_offset>
        <initial_value>0</initial_value>
        <protection>RW</protection>
        <field_type>NORMAL</field_type>
        <comment>
Selects cache set containing the cache line.  Assumes L2 cache
hashing is disabled.
        </comment>
    </field>
    <field name="WAY">
        <start_offset>18</start_offset>
        <end_offset>21</end_offset>
        <initial_value>0</initial_value>
        <protection>RW</protection>
        <field_type>NORMAL</field_type>
        <comment>
Selects way in cache set.
        </comment>
    </field>
    <field name="ODDEVEN">
        <start_offset>22</start_offset>
        <end_offset>22</end_offset>
        <initial_value>0</initial_value>
        <protection>RW</protection>
        <field_type>NORMAL</field_type>
        <comment>
Selects 32-bit word for 64-bit word selected by WORD field.
        </comment>
    </field>
    <field name="RSVD1">
        <start_offset>23</start_offset>
        <end_offset>31</end_offset>
        <initial_value>0</initial_value>
        <protection>RO</protection>
        <field_type>ZERO</field_type>
        <comment>
Reserved, can be any value in PRM.  In Riesling, we limit to 0.
        </comment>
    </field>
    <field name="SELECT">
        <start_offset>32</start_offset>
        <end_offset>39</end_offset>
        <initial_value>0xA0</initial_value>
        <protection>RO</protection>
        <field_type>NORMAL</field_type>
        <comment>
Must be 0xA0, 0xA1, 0xB0, or 0xB1 to select L2 diagnostic data access.
        </comment>
    </field>
    <field name="RSVD0">
        <start_offset>40</start_offset>
        <end_offset>63</end_offset>
        <initial_value>0</initial_value>
        <protection>RO</protection>
        <field_type>ZERO</field_type>
        <comment>
Reserved in PRM.  In Riesling, we limit to 0.
        </comment>
    </field>
</register>
</register_list>