Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / sam-t2 / sam / cpus / vonk / ss / api / pli / bin / SS_CsrReadWrite.cc
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: SS_CsrReadWrite.cc
4// Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
5// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
6//
7// The above named program is free software; you can redistribute it and/or
8// modify it under the terms of the GNU General Public
9// License version 2 as published by the Free Software Foundation.
10//
11// The above named program is distributed in the hope that it will be
12// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
13// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14// General Public License for more details.
15//
16// You should have received a copy of the GNU General Public
17// License along with this work; if not, write to the Free Software
18// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
19//
20// ========== Copyright Header End ============================================
21/************************************************************************
22**
23** Copyright (C) 2006, Sun Microsystems, Inc.
24**
25** Sun considers its source code as an unpublished, proprietary
26** trade secret and it is available only under strict license provisions.
27** This copyright notice is placed here only to protect Sun in the event
28** the source is deemed a published work. Disassembly, decompilation,
29** or other means of reducing the object code to human readable form
30** is prohibited by the license agreement under which this code is
31** provided to the user or company in possession of this copy.
32**
33*************************************************************************/
34//
35// @-ARCH-@_CsrReadWrite.cc is automatically generated from
36// ss/api/pli/bin/Bl_CsrReadWrite.cc, do not modify @-ARCH-@_CsrReadWrite.cc
37// make necessary changes in ss/api/pli/bin/Bl_CsrReadWrite.cc instead.
38//
39
40// handle csr_read/write issued by (TLR) testbench, to force csr values
41// (in non-cacheable memory space) explicitly.
42//
43
44#include "@-ARCH-@_CsrReadWrite.h"
45
46using namespace std;
47
48//======================================================================
49// CSR_WRITE: write into real register, the value will stick
50//======================================================================
51void @-ARCH-@_CsrReadWrite::pliWriteCsrReg(@-ARCH-@_Csr* csr, uint64_t pa, uint64_t value, bool littleEndian, int sid)
52{
53 int access = MemoryTransaction::WRITE | MemoryTransaction::INTERNAL;
54 if (littleEndian)
55 access |= MemoryTransaction::LITTLE_ENDIAN;
56
57 csr->write64(pa, value, access, sid);
58}
59
60//======================================================================
61// CSR_READ: provide a follow-me value, the value is "use-once-and-discard"
62//======================================================================
63void @-ARCH-@_CsrReadWrite::pliReadCsrReg(@-ARCH-@_Csr* csr, uint64_t pa, uint64_t value, bool littleEndian, int sid)
64{
65 int access = MemoryTransaction::WRITE | MemoryTransaction::INTERNAL | MemoryTransaction::FOLLOW_ME;
66 if (littleEndian)
67 access |= MemoryTransaction::LITTLE_ENDIAN;
68
69 csr->write64(pa, value, access, sid);
70}