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Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / sam-t2 / sam / cpus / vonk / ss / api / samfe / src / ReadConfigRies.py
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AT		 1# ========== Copyright Header Begin ==========================================
2#
3# OpenSPARC T2 Processor File: ReadConfigRies.py
4# Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
5# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
6#
7# The above named program is free software; you can redistribute it and/or
8# modify it under the terms of the GNU General Public
9# License version 2 as published by the Free Software Foundation.
10#
11# The above named program is distributed in the hope that it will be
12# useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14# General Public License for more details.
15#
16# You should have received a copy of the GNU General Public
17# License along with this work; if not, write to the Free Software
18# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
19#
20# ========== Copyright Header End ============================================
21"""handle riesling frontend's '-x config' option
22"""
23
24import re
25
26PROMPT = '@SIM_set_prompt'
27DIAG_CONF = 'read-configuration'
28MEM_IMAGE = 'load-veri-file'
29IGNORE_SPARC = 'ignore_sparc'
30AT_DEF = '@def'
31CMD = 'cmd'
32NEW_CMD = '@new_command'
33AT_CONF = '@conf'
34
35
36class ReadConfigRies:
37 """handle -x config option
38 """
39
40 def __init__ (self):
41 """
42 """
43 self.data = { }
44 self.data[PROMPT] = ''
45 self.data[DIAG_CONF] = ''
46 self.data[MEM_IMAGE] = ''
47 self.data[AT_DEF] = { }
48 self.data[CMD] = [ ]
49 self.data[IGNORE_SPARC] = [ ]
50 self.data[NEW_CMD] = { }
51 self.data[AT_CONF] = [ ]
52
53 self.initKeyword()
54
55
56 def __str__ (self):
57 """
58 """
59 buffer = [ '-----ReadConfigRies.py-----\n' ]
60 buffer.append('%s = %s\n' % (PROMPT, self.data[PROMPT]))
61 buffer.append('%s = %s\n' % (DIAG_CONF, self.data[DIAG_CONF]))
62 buffer.append('%s = %s\n' % (MEM_IMAGE, self.data[MEM_IMAGE]))
63 buffer.append('%s = %s\n' % (IGNORE_SPARC, self.data[IGNORE_SPARC]))
64 buffer.append('---%s---\n' % (AT_DEF))
65 for key in self.data[AT_DEF].keys():
66 buffer.append(''.join(self.data[AT_DEF][key]))
67 buffer.append('---%s---\n' % (NEW_CMD))
68 for key in self.data[NEW_CMD].keys():
69 buffer.append(''.join(self.data[NEW_CMD][key]))
70 buffer.append('---%s---\n' % (CMD))
71 buffer.append(''.join(self.data[CMD]))
72
73 return ''.join(buffer)
74
75
76 def initKeyword (self):
77 """
78 """
79 self.keywords = { }
80 self.keywords[re.compile('^@num_processors')] = self.ignore
81 self.keywords[re.compile('^\$sim_no_magic_breakpoint')] = self.ignore
82 self.keywords[re.compile('^@SIM_set_prompt')] = self.handlePrompt
83 self.keywords[re.compile('^//')] = self.ignore
84 self.keywords[re.compile('^read-configuration')] = self.handleReadConfig
85 self.keywords[re.compile('^load-kernel')] = self.handleLoadMem
86 self.keywords[re.compile('^load-veri-file')] = self.handleLoadMem
87 self.keywords[re.compile('^@init_swerver')] = self.ignore
88 self.keywords[re.compile('^ciop\d+\.cmd')] = self.ignore
89 self.keywords[re.compile('^ciop\d+\.setvar')] = self.ignore
90 self.keywords[re.compile('^pdisable')] = self.handlePdisable
91 self.keywords[re.compile('^@?def\s+')] = self.handleAtDef
92 self.keywords[re.compile('^@?new_command\s*\(')] = self.handleNewcmd
93 #self.keywords[re.compile('^@conf\.mom\d+\.setvar')] = self.ignore
94 #self.keywords[re.compile('^@conf\.mom\d+\.call')] = self.ignore
95 #self.keywords[re.compile('^@conf\.mom\d+\.thread_status')] = self.ignore
96 #self.keywords[re.compile('^@conf\.mom\d+\.PASS')] = self.ignore
97 #self.keywords[re.compile('^@conf\.mom\d+\.FAIL')] = self.ignore
98 #self.keywords[re.compile('^@conf\.mom\d+\.HPASS')] = self.ignore
99 #self.keywords[re.compile('^@conf\.mom\d+\.HFAIL')] = self.ignore
100 #self.keywords[re.compile('^@conf\.mom\d+\.DC_ON')] = self.ignore
101 #self.keywords[re.compile('^@conf\.mom\d+\.DC_OFF')] = self.ignore
102 #self.keywords[re.compile('^@conf\.mom\d+\.IC_ON')] = self.ignore
103 #self.keywords[re.compile('^@conf\.mom\d+\.IC_OFF')] = self.ignore
104 #self.keywords[re.compile('^@conf\.mom\d+\.APASS')] = self.ignore
105 #self.keywords[re.compile('^@conf\.mom\d+\.AFAIL')] = self.ignore
106 #self.keywords[re.compile('^@conf\.mom\d+\.start_cycle')] = self.ignore
107 #self.keywords[re.compile('^@conf\.mom\d+\.reset_all_stat')] = self.ignore
108 #self.keywords[re.compile('^@conf\.mom\d+\.T1PASS')] = self.ignore
109 #self.keywords[re.compile('^@conf\.mom\d+\.T1FAIL')] = self.ignore
110 self.keywords[re.compile('^run')] = self.handleRun
111 self.keywords[re.compile('^quit')] = self.handleQuit
112 #self.keywords[re.compile('^@conf\.swvmem\d+\.ignore_sparc')] = self.handleIgnoreSparc
113 #self.keywords[re.compile('^@conf\.swvmem\d+\.printf')] = self.ignore
114 #self.keywords[re.compile('^@conf\.swvmem\d+\.thread_status')] = self.ignore
115 self.keywords[re.compile('^th\d+\.write-reg')] = self.handleWriteReg
116 self.keywords[re.compile('^th\d+\.read-reg')] = self.handleReadReg
117 #self.keywords[re.compile('^@conf\.swvmem\d+\.good_trap')] = self.handleTrap
118 #self.keywords[re.compile('^@conf\.swvmem\d+\.bad_trap')] = self.handleTrap
119 #self.keywords[re.compile('^@conf\.swvmem\d+\.max_cycle')] = self.ignore
120 self.keywords[re.compile('^pli-run')] = self.handlePlirun
121 self.keywords[re.compile('^@.*riesling\.sys\.')] = self.handleRiesling
122 self.keywords[re.compile('^@conf\.')] = self.handleAtConf
123
124 self.klist = self.keywords.keys()
125
126
127 def ignore (self, line):
128 """
129 """
130 self.fdtmp.write(line)
131 return None
132
133
134 def arbitrary (self, line):
135 """
136 """
137 # even though we may not know what to do with this line, we will
138 # try to execute it, and ignore any exception it may raise.
139 if line.startswith('@'):
140 line = line[1:]
141 self.data[CMD].append(line)
142 return None
143
144
145 def handlePrompt (self, line):
146 """
147 """
148 lindex = line.find('"')
149 rindex = line.find('"', lindex+1)
150 self.data[PROMPT] = line[lindex+1:rindex]
151 return None
152
153
154 def handleReadConfig (self, line):
155 """
156 """
157 lindex = line.find('"')
158 rindex = line.find('"', lindex+1)
159 self.data[DIAG_CONF] = line[lindex+1:rindex]
160 return None
161
162
163 def handleLoadMem (self, line):
164 """
165 """
166 self.data[MEM_IMAGE] = line.split()[1]
167 return None
168
169
170 def handlePdisable (self, line):
171 """
172 """
173 self.data[CMD].append(line)
174 return None
175
176
177 def handleAtDef (self, line):
178 """
179 """
180 # @def get_addr(name):
181 # def get_addr(name):
182 if line.startswith('@'):
183 line = line[1:]
184 tokens = line.split()
185 index = tokens[1].find('(')
186 fname = tokens[1][:index].strip()
187 if self.data[AT_DEF].has_key(fname):
188 raise RuntimeError, 'function %s is already defined' % (fname)
189 else:
190 self.data[AT_DEF][fname] = [ line ]
191 line = self.fd.readline()
192 # process until encounter a line starting with non-blank char
193 # at the 1st column
194 while re.match('^\s', line):
195 self.data[AT_DEF][fname].append(line)
196 line = self.fd.readline()
197
198 return line
199
200
201 def handleNewcmd (self, line):
202 """
203 """
204 # @new_command(...)
205 # new_command(...)
206 if line.startswith('@'):
207 line = line[1:]
208 lindex = line.find('"')
209 rindex = line.find('"', lindex+1)
210 cmd = line[lindex+1:rindex]
211 if self.data[NEW_CMD].has_key(cmd):
212 raise RuntimeError, 'command %s is already defined' % (cmd)
213 else:
214 self.data[NEW_CMD][cmd] = [ line ]
215 line = self.fd.readline()
216 while line.strip():
217 self.data[NEW_CMD][cmd].append(line)
218 line = self.fd.readline()
219 return None
220
221
222 def handleRun (self, line):
223 """
224 """
225 self.data[CMD].append(line)
226 return None
227
228
229 def handleQuit (self, line):
230 """
231 """
232 self.data[CMD].append(line)
233 return None
234
235
236 def handleIgnoreSparc (self, line):
237 """
238 @conf.swvmem0.ignore_sparc = 0
239 """
240 i = line.find('=')
241 id = line[i+1:].split()[0]
242 self.data[IGNORE_SPARC].append(id)
243 return None
244
245
246 def handleThreadMask (self, line):
247 """
248 # @conf.swvmem0.thread_mask0 = THREAD_MASK
249 # @conf.swvmem0.thread_mask1 = THREAD_MASK1
250
251 use THREAD_MASK to produce THREADS and SPx (for IGNORE_SPARC)
252 """
253 MAX_CORE = 8
254
255 ii = line.find('thread_mask') + len('thread_mask')
256 cpu = int(line[ii:ii+1])
257 tokens = line.replace('=', ' ').split()
258 tokens[1] = tokens[1].lower()
259 if tokens[1].startswith('0x'):
260 tokens[1] = tokens[1][2:]
261 # make sure we have even number of characters, for ease process.
262 if len(tokens[1])%2 != 0:
263 if tokens[1][0] == 'x':
264 tokens[1] = 'x' + tokens[1]
265 else:
266 tokens[1] = '0' + tokens[1]
267
268 # produce IGNORE_SPARC
269 # thread_mask = 00xx11xx, each core is presented by two characters
270 # (8 bits, one for each strand). A 'xx' mean this core should be
271 # disabled, a 'not-mentioned' core is also disabled, otherwise it is
272 # enabled.
273 for i in range(MAX_CORE):
274 if ((2*(i+1) > len(tokens[1])) or
275 (tokens[1][(-2*i)-1] == 'x' and tokens[1][(-2*i)-2] == 'x')):
276 coreid = i + (cpu * MAX_CORE)
277 self.data[IGNORE_SPARC].append(coreid)
278 self.data[AT_CONF].append('@conf.swvmem0.ignore_sparc =+ %d' % (coreid))
279 if (2*i < len(tokens[1])):
280 if (tokens[1][2*i] == 'x') and (tokens[1][(2*i)+1] != 'x'):
281 if i == 0:
282 tokens[1] = '0' + tokens[1][1:]
283 else:
284 tokens[1] = tokens[1][:2*i] + '0' + tokens[1][(2*i)+1:]
285 elif (tokens[1][2*i] != 'x') and (tokens[1][(2*i)+1] == 'x'):
286 if 2*(i+1) >= len(tokens[1]):
287 tokens[1] = tokens[1][:-1] + '0'
288 else:
289 tokens[1] = tokens[1][:(2*i)+1] + '0' + tokens[1][2*(i+1):]
290
291 # produce THREADS
292 self.data[AT_CONF].append('@conf.swvmem0.threads%d = %s' % (cpu, tokens[1].replace('x', '0')))
293
294 # we don't really use thread_mask to set CMP registers, instead we
295 # use the threads and ignore_sparc produced by thread_mask to do that.
296 # this is mainly for backward compatibility.
297
298 # keep the revised line to be added to list
299 line = ' = '.join(tokens)
300
301 return line
302
303
304 def handleWriteReg (self, line):
305 """
306 th00.write-reg reg-name = ccr 0x00
307 """
308 # just to make sure there are space before/after the = sign
309 tokens = line.replace('=', ' = ').split()
310 cmd = '%s %s %s\n' % (tokens[0], tokens[3], tokens[4])
311 self.data[CMD].append(cmd)
312 return None
313
314
315 def handleReadReg (self, line):
316 """
317 th00.read-reg reg-name = ccr
318 """
319 # just to make sure there are space before/after the = sign
320 tokens = line.replace('=', ' = ').split()
321 cmd = '%s %s\n' % (tokens[0], tokens[3])
322 self.data[CMD].append(cmd)
323 return None
324
325
326 def handleTrap (self, line):
327 """
328 @conf.swvmem0.good_trap = get_addr('\.HTRAPS\.HT0_GoodTrap_0x100')
329 @conf.swvmem0.bad_trap = get_addr('\.TRAPS\.T0_BadTrap_0x101')
330 """
331 lindex = line.find('get_addr')
332 lindex = line.find("'", lindex)
333 rindex = line.find("'", lindex+1)
334 symbol = line[lindex+1:rindex]
335 symbol = symbol.replace('\\', '')
336 # convert it into a break command
337 cmd = 'break &%s' % (symbol)
338 self.data[CMD].append(cmd)
339 return None
340
341
342 def handlePlirun (self, line):
343 """
344 """
345 self.data[CMD].append(line)
346 return None
347
348
349 def handleRiesling (self, line):
350 """allow riesling frontend native calls in configuration file
351 @riesling.sys.frontend-native-call, e.g.,
352 @riesling.sys.cpu0.core0.strand0.archstate.getPc()
353 """
354 self.data[CMD].append(line[1:])
355 return None
356
357
358 def handleAtConf (self, line):
359 """
360 """
361 if line.find('ignore_sparc') > -1:
362 self.handleIgnoreSparc(line)
363 elif line.find('good_trap') > -1 or line.find('bad_trap') > -1:
364 self.handleTrap(line)
365 elif line.startswith('@conf.swvmem0.thread_mask'):
366 # @conf.swvmem0.thread_mask = THREAD_MASK
367 line = self.handleThreadMask(line)
368## elif line.startswith('@conf.swvmem0.cpu'):
369## # @conf.swvmem0.cpu = 1
370## tokens = line.replace('=', ' ').split()
371## cpu = int(tokens[1])
372## if cpu < 1:
373## cpu = 1
374## elif cpu > 4:
375## cpu = 4
376## tokens[1] = str(cpu)
377## line = ' = '.join(tokens)
378
379 # keep all @conf.zzz statements in AT_CONF
380 self.data[AT_CONF].append(line)
381
382 # @conf.mom0's, which is used by blaze/mom, can mix with other
383 # commands, e.g.,
384 # @conf.mom0.call= "init-anno-sas"
385 # @conf.mom0.setvar= "itlb0_size_v=0"
386 # @conf.mom0.PASS= get_addr('\.TRAPS\.T0_GoodTrap_0x100')
387 # @conf.mom0.thread_status= THREAD_STATUS_ADDR
388 # @conf.mom0.start_cycle= 1
389 # run 200
390 # @conf.mom0.reset_all_stat= 1
391 # their execution order is important, so we have to keep @conf.mom0
392 # as part of CMD, blaze use 'mom setvar' as keyword
393 CONF_MOM = '@conf.mom0.'
394 CONF_MOM_SET = '@conf.mom0.setvar'
395 sline = line.strip()
396 if sline.startswith(CONF_MOM):
397 sline = sline[len(CONF_MOM):]
398 sline = sline.replace('=', ' ').replace('"', ' ')
399 tokens = sline.split()
400 cmd = 'mom %s\n' % (' '.join(tokens))
401 self.data[CMD].append(cmd)
402 return None
403
404## CONF_MOM = '@conf.mom0.'
405## CONF_MOM_SET = '@conf.mom0.setvar'
406## sline = line.strip()
407## if sline.startswith(CONF_MOM):
408## if sline.startswith(CONF_MOM_SET):
409## lindex = sline.find('"')
410## rindex = sline.find('"', lindex+1)
411## setcmd = sline[lindex+1:rindex]
412## else:
413## setcmd = sline[len(CONF_MOM):]
414
415## index = setcmd.find('=')
416## lop = setcmd[0:index].strip()
417## rop = setcmd[index+1:].strip()
418## cmd = 'mom setvar %s %s\n' % (lop, rop)
419## self.data[CMD].append(cmd)
420## return None
421
422
423 def readConfig (self, fname):
424 """
425 """
426 try:
427 TMP = '.rs_config_ignore'
428 self.fdtmp = open(TMP, 'w')
429 self.fd = open(fname, 'r')
430 line = self.fd.readline()
431 while line:
432 sline = line.strip()
433 rline = None
434 if sline:
435 match = 0
436 for key in self.klist:
437 if key.match(sline):
438 rline = self.keywords[key](line)
439 match = 1
440 break # out of for loop
441 if match == 0:
442 # if cannot find a match, handle it as arbitrary
443 # statement
444 self.arbitrary(line)
445
446 # next line
447 if rline != None:
448 line = rline
449 else:
450 line = self.fd.readline()
451
452 self.fdtmp.close()
453 self.fd.close()
454 except:
455 raise
456
457
458"""self-testing
459"""
460if __name__ == "__main__":
461 """
462 """
463 # unit test here
464 import sys
465 reader = ReadConfigRies()
466 reader.readConfig(sys.argv[1])
467 print reader
Full OpenSPARC architecture tarball including simulator, hypervisor, and OBP.