Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / sam-t2 / sam / cpus / vonk / ss / lib / cpu / src / SS_LsuTrap.s
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: SS_LsuTrap.s
5* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
6* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
7*
8* The above named program is free software; you can redistribute it and/or
9* modify it under the terms of the GNU General Public
10* License version 2 as published by the Free Software Foundation.
11*
12* The above named program is distributed in the hope that it will be
13* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
14* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15* General Public License for more details.
16*
17* You should have received a copy of the GNU General Public
18* License along with this work; if not, write to the Free Software
19* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
20*
21* ========== Copyright Header End ============================================
22*/
23#if !defined(ARCH_X64)
24
25.register %g2,#scratch
26.register %g3,#scratch
27
28.section ".text"
29
30.global ss_data_trap_mem_address_not_aligned
31.type ss_data_trap_mem_address_not_aligned, #function
32
33ss_data_trap_mem_address_not_aligned:
34
35 ldptr [S_PTR + DATA_TRAP],%g1
36 jmpl %g1,%g0
37 mov T_MEM_ADDRESS_NOT_ALIGNED,%o5
38
39.global ss_data_trap_lddf_mem_address_not_aligned
40.type ss_data_trap_lddf_mem_address_not_aligned, #function
41
42ss_data_trap_lddf_mem_address_not_aligned:
43
44 and %o4,7,%g2 ! lddf has a special case when the lower three
45 ldptr [S_PTR + DATA_TRAP],%g1 ! bits of the address is 3'b100, it's a remnant
46 cmp %g2,4 ! of the old v8 mode ...
47 mov T_MEM_ADDRESS_NOT_ALIGNED,%o5
48 jmpl %g1,%g0
49 move %xcc,T_LDDF_MEM_ADDRESS_NOT_ALIGNED,%o5
50
51.global ss_data_trap_stdf_mem_address_not_aligned
52.type ss_data_trap_stdf_mem_address_not_aligned, #function
53
54ss_data_trap_stdf_mem_address_not_aligned:
55
56 and %o4,7,%g2 ! stdf has a special case when the lower three
57 ldptr [S_PTR + DATA_TRAP],%g1 ! bits of the address is 3'b100, it's a remnant
58 cmp %g2,4 ! of the old v8 mode ...
59 mov T_MEM_ADDRESS_NOT_ALIGNED,%o5
60 jmpl %g1,%g0
61 move %xcc,T_STDF_MEM_ADDRESS_NOT_ALIGNED,%o5
62
63.global ss_data_trap_mem_address_range
64.type ss_data_trap_mem_address_range, #function
65
66ss_data_trap_mem_address_range:
67
68 ldptr [S_PTR + DATA_TRAP],%g1
69 jmpl %g1,%g0
70 mov T_MEM_ADDRESS_RANGE,%o5
71
72.global ss_data_trap_va_watchpoint
73.type ss_data_trap_va_watchpoint, #function
74
75ss_data_trap_va_watchpoint:
76
77 ldptr [S_PTR + DATA_TRAP],%g1
78 jmpl %g1,%g0
79 mov T_VA_WATCHPOINT,%o5
80
81.global ss_data_trap_dae_invalid_asi
82.type ss_data_trap_dae_invalid_asi, #function
83
84ss_data_trap_dae_invalid_asi:
85
86 ldptr [S_PTR + DATA_TRAP],%g1
87 jmpl %g1,%g0
88 mov T_DAE_INVALID_ASI,%o5
89
90.global ss_data_trap_privileged_action
91.type ss_data_trap_privileged_action, #function
92
93ss_data_trap_privileged_action:
94
95 ldptr [S_PTR + DATA_TRAP],%g1
96 jmpl %g1,%g0
97 mov T_PRIVILEGED_ACTION,%o5
98
99#endif