projects / OpenSPARC-T2-SAM / blame
| Commit | Line | Data |
|---|---|---|
| 920dae64 AT |
1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== | |
| 3 | * | |
| 4 | * OpenSPARC T2 Processor File: mpi_cnfg.h | |
| 5 | * Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved. | |
| 6 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES. | |
| 7 | * | |
| 8 | * The above named program is free software; you can redistribute it and/or | |
| 9 | * modify it under the terms of the GNU General Public | |
| 10 | * License version 2 as published by the Free Software Foundation. | |
| 11 | * | |
| 12 | * The above named program is distributed in the hope that it will be | |
| 13 | * useful, but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 15 | * General Public License for more details. | |
| 16 | * | |
| 17 | * You should have received a copy of the GNU General Public | |
| 18 | * License along with this work; if not, write to the Free Software | |
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. | |
| 20 | * | |
| 21 | * ========== Copyright Header End ============================================ | |
| 22 | */ | |
| 23 | /* | |
| 24 | * Copyright 2004 Sun Microsystems, Inc. All rights reserved. | |
| 25 | * Use is subject to license terms. | |
| 26 | */ | |
| 27 | ||
| 28 | #ifndef _SYS_MPI_CNFG_H | |
| 29 | #define _SYS_MPI_CNFG_H | |
| 30 | ||
| 31 | #pragma ident "@(#)mpi_cnfg.h 1.2 04/11/08 SMI" | |
| 32 | ||
| 33 | #ifdef __cplusplus | |
| 34 | extern "C" { | |
| 35 | #endif | |
| 36 | ||
| 37 | /* | |
| 38 | * Config Message and Structures | |
| 39 | */ | |
| 40 | typedef struct config_page_header { | |
| 41 | uint8_t PageVersion; | |
| 42 | uint8_t PageLength; | |
| 43 | uint8_t PageNumber; | |
| 44 | uint8_t PageType; | |
| 45 | } config_page_header_t; | |
| 46 | ||
| 47 | typedef union config_page_header_union { | |
| 48 | config_page_header_t Struct; | |
| 49 | uint8_t Bytes[4]; | |
| 50 | uint16_t Word16[2]; | |
| 51 | uint32_t Word32; | |
| 52 | } config_page_header_union_t; | |
| 53 | ||
| 54 | /* | |
| 55 | * The extended header is used for 1064 and on | |
| 56 | */ | |
| 57 | typedef struct config_extended_page_header { | |
| 58 | uint8_t PageVersion; | |
| 59 | uint8_t Reserved1; | |
| 60 | uint8_t PageNumber; | |
| 61 | uint8_t PageType; | |
| 62 | uint16_t ExtPageLength; | |
| 63 | uint8_t ExtPageType; | |
| 64 | uint8_t Reserved2; | |
| 65 | } config_extended_page_header_t; | |
| 66 | ||
| 67 | /* | |
| 68 | * PageType field values | |
| 69 | */ | |
| 70 | #define MPI_CONFIG_PAGEATTR_READ_ONLY 0x00 | |
| 71 | #define MPI_CONFIG_PAGEATTR_CHANGEABLE 0x10 | |
| 72 | #define MPI_CONFIG_PAGEATTR_PERSISTENT 0x20 | |
| 73 | #define MPI_CONFIG_PAGEATTR_RO_PERSISTENT 0x30 | |
| 74 | #define MPI_CONFIG_PAGEATTR_MASK 0xF0 | |
| 75 | ||
| 76 | #define MPI_CONFIG_PAGETYPE_IO_UNIT 0x00 | |
| 77 | #define MPI_CONFIG_PAGETYPE_IOC 0x01 | |
| 78 | #define MPI_CONFIG_PAGETYPE_BIOS 0x02 | |
| 79 | #define MPI_CONFIG_PAGETYPE_SCSI_PORT 0x03 | |
| 80 | #define MPI_CONFIG_PAGETYPE_SCSI_DEVICE 0x04 | |
| 81 | #define MPI_CONFIG_PAGETYPE_FC_PORT 0x05 | |
| 82 | #define MPI_CONFIG_PAGETYPE_FC_DEVICE 0x06 | |
| 83 | #define MPI_CONFIG_PAGETYPE_LAN 0x07 | |
| 84 | #define MPI_CONFIG_PAGETYPE_RAID_VOLUME 0x08 | |
| 85 | #define MPI_CONFIG_PAGETYPE_MANUFACTURING 0x09 | |
| 86 | #define MPI_CONFIG_PAGETYPE_RAID_PHYSDISK 0x0A | |
| 87 | #define MPI_CONFIG_PAGETYPE_INBAND 0x0B | |
| 88 | #define MPI_CONFIG_PAGETYPE_EXTENDED 0x0F | |
| 89 | #define MPI_CONFIG_PAGETYPE_MASK 0x0F | |
| 90 | ||
| 91 | #define MPI_CONFIG_TYPENUM_MASK 0x0FFF | |
| 92 | ||
| 93 | /* | |
| 94 | * ExtPageType field values | |
| 95 | */ | |
| 96 | #define MPI_CONFIG_EXTPAGETYPE_SAS_IO_UNIT 0x10 | |
| 97 | #define MPI_CONFIG_EXTPAGETYPE_SAS_EXPANDER 0x11 | |
| 98 | #define MPI_CONFIG_EXTPAGETYPE_SAS_DEVICE 0x12 | |
| 99 | #define MPI_CONFIG_EXTPAGETYPE_SAS_PHY 0x13 | |
| 100 | ||
| 101 | /* | |
| 102 | * Page Address field values | |
| 103 | */ | |
| 104 | #define MPI_SCSI_PORT_PGAD_PORT_MASK 0x000000FF | |
| 105 | ||
| 106 | #define MPI_SCSI_DEVICE_TARGET_ID_MASK 0x000000FF | |
| 107 | #define MPI_SCSI_DEVICE_TARGET_ID_SHIFT 0 | |
| 108 | #define MPI_SCSI_DEVICE_BUS_MASK 0x0000FF00 | |
| 109 | #define MPI_SCSI_DEVICE_BUS_SHIFT 8 | |
| 110 | ||
| 111 | #define MPI_FC_PORT_PGAD_PORT_MASK 0xF0000000 | |
| 112 | #define MPI_FC_PORT_PGAD_PORT_SHIFT 28 | |
| 113 | #define MPI_FC_PORT_PGAD_FORM_MASK 0x0F000000 | |
| 114 | #define MPI_FC_PORT_PGAD_FORM_INDEX 0x01000000 | |
| 115 | #define MPI_FC_PORT_PGAD_INDEX_MASK 0x0000FFFF | |
| 116 | #define MPI_FC_PORT_PGAD_INDEX_SHIFT 0 | |
| 117 | ||
| 118 | #define MPI_FC_DEVICE_PGAD_PORT_MASK 0xF0000000 | |
| 119 | #define MPI_FC_DEVICE_PGAD_PORT_SHIFT 28 | |
| 120 | #define MPI_FC_DEVICE_PGAD_FORM_MASK 0x0F000000 | |
| 121 | #define MPI_FC_DEVICE_PGAD_FORM_NEXT_DID 0x00000000 | |
| 122 | #define MPI_FC_DEVICE_PGAD_ND_PORT_MASK 0xF0000000 | |
| 123 | #define MPI_FC_DEVICE_PGAD_ND_PORT_SHIFT 28 | |
| 124 | #define MPI_FC_DEVICE_PGAD_ND_DID_MASK 0x00FFFFFF | |
| 125 | #define MPI_FC_DEVICE_PGAD_ND_DID_SHIFT 0 | |
| 126 | #define MPI_FC_DEVICE_PGAD_FORM_BUS_TID 0x01000000 | |
| 127 | #define MPI_FC_DEVICE_PGAD_BT_BUS_MASK 0x0000FF00 | |
| 128 | #define MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT 8 | |
| 129 | #define MPI_FC_DEVICE_PGAD_BT_TID_MASK 0x000000FF | |
| 130 | #define MPI_FC_DEVICE_PGAD_BT_TID_SHIFT 0 | |
| 131 | ||
| 132 | #define MPI_PHYSDISK_PGAD_PHYSDISKNUM_MASK 0x000000FF | |
| 133 | #define MPI_PHYSDISK_PGAD_PHYSDISKNUM_SHIFT 0 | |
| 134 | ||
| 135 | #define MPI_SAS_EXPAND_PGAD_FORM_MASK 0xF0000000 | |
| 136 | #define MPI_SAS_EXPAND_PGAD_FORM_SHIFT 28 | |
| 137 | #define MPI_SAS_EXPAND_PGAD_FORM_GET_NEXT_HANDLE 0x00000000 | |
| 138 | #define MPI_SAS_EXPAND_PGAD_FORM_HANDLE_PHY_NUM 0x00000001 | |
| 139 | #define MPI_SAS_EXPAND_PGAD_FORM_HANDLE 0x00000002 | |
| 140 | #define MPI_SAS_EXPAND_PGAD_GNH_MASK_HANDLE 0x0000FFFF | |
| 141 | #define MPI_SAS_EXPAND_PGAD_GNH_SHIFT_HANDLE 0 | |
| 142 | #define MPI_SAS_EXPAND_PGAD_HPN_MASK_PHY 0x00FF0000 | |
| 143 | #define MPI_SAS_EXPAND_PGAD_HPN_SHIFT_PHY 16 | |
| 144 | #define MPI_SAS_EXPAND_PGAD_HPN_MASK_HANDLE 0x0000FFFF | |
| 145 | #define MPI_SAS_EXPAND_PGAD_HPN_SHIFT_HANDLE 0 | |
| 146 | #define MPI_SAS_EXPAND_PGAD_H_MASK_HANDLE 0x0000FFFF | |
| 147 | #define MPI_SAS_EXPAND_PGAD_H_SHIFT_HANDLE 0 | |
| 148 | ||
| 149 | #define MPI_SAS_DEVICE_PGAD_FORM_MASK 0xF0000000 | |
| 150 | #define MPI_SAS_DEVICE_PGAD_FORM_SHIFT 28 | |
| 151 | #define MPI_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE 0x00000000 | |
| 152 | #define MPI_SAS_DEVICE_PGAD_FORM_BUS_TARGET_ID 0x00000001 | |
| 153 | #define MPI_SAS_DEVICE_PGAD_FORM_HANDLE 0x00000002 | |
| 154 | #define MPI_SAS_DEVICE_PGAD_GNH_HANDLE_MASK 0x0000FFFF | |
| 155 | #define MPI_SAS_DEVICE_PGAD_GNH_HANDLE_SHIFT 0 | |
| 156 | #define MPI_SAS_DEVICE_PGAD_BT_BUS_MASK 0x0000FF00 | |
| 157 | #define MPI_SAS_DEVICE_PGAD_BT_BUS_SHIFT 8 | |
| 158 | #define MPI_SAS_DEVICE_PGAD_BT_TID_MASK 0x000000FF | |
| 159 | #define MPI_SAS_DEVICE_PGAD_BT_TID_SHIFT 0 | |
| 160 | #define MPI_SAS_DEVICE_PGAD_H_HANDLE_MASK 0x0000FFFF | |
| 161 | #define MPI_SAS_DEVICE_PGAD_H_HANDLE_SHIFT 0 | |
| 162 | ||
| 163 | #define MPI_SAS_PHY_PGAD_PHY_NUMBER_MASK 0x000000FF | |
| 164 | #define MPI_SAS_PHY_PGAD_PHY_NUMBER_SHIFT 0 | |
| 165 | ||
| 166 | /* | |
| 167 | * Config Message | |
| 168 | */ | |
| 169 | typedef struct msg_config { | |
| 170 | uint8_t Action; | |
| 171 | uint8_t Reserved; | |
| 172 | uint8_t ChainOffset; | |
| 173 | uint8_t Function; | |
| 174 | uint16_t ExtPageLength; /* 1064 only */ | |
| 175 | uint8_t ExtPageType; /* 1064 only */ | |
| 176 | uint8_t MsgFlags; | |
| 177 | uint32_t MsgContext; | |
| 178 | uint8_t Reserved2[8]; | |
| 179 | config_page_header_t Header; | |
| 180 | uint32_t PageAddress; | |
| 181 | sge_io_union_t PageBufferSGE; | |
| 182 | } msg_config_t; | |
| 183 | ||
| 184 | /* | |
| 185 | * Action field values | |
| 186 | */ | |
| 187 | #define MPI_CONFIG_ACTION_PAGE_HEADER 0x00 | |
| 188 | #define MPI_CONFIG_ACTION_PAGE_READ_CURRENT 0x01 | |
| 189 | #define MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT 0x02 | |
| 190 | #define MPI_CONFIG_ACTION_PAGE_DEFAULT 0x03 | |
| 191 | #define MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM 0x04 | |
| 192 | #define MPI_CONFIG_ACTION_PAGE_READ_DEFAULT 0x05 | |
| 193 | #define MPI_CONFIG_ACTION_PAGE_READ_NVRAM 0x06 | |
| 194 | ||
| 195 | /* | |
| 196 | * Config Reply Message | |
| 197 | */ | |
| 198 | typedef struct msg_config_reply { | |
| 199 | uint8_t Action; | |
| 200 | uint8_t Reserved; | |
| 201 | uint8_t MsgLength; | |
| 202 | uint8_t Function; | |
| 203 | uint16_t ExtPageLength; | |
| 204 | uint8_t ExtPageType; | |
| 205 | uint8_t MsgFlags; | |
| 206 | uint32_t MsgContext; | |
| 207 | uint8_t Reserved2[2]; | |
| 208 | uint16_t IOCStatus; | |
| 209 | uint32_t IOCLogInfo; | |
| 210 | config_page_header_t Header; | |
| 211 | } msg_config_reply_t; | |
| 212 | ||
| 213 | /* | |
| 214 | * Manufacturing Config pages | |
| 215 | */ | |
| 216 | #define MPI_MANUFACTPAGE_VENDORID_LSILOGIC 0x1000 | |
| 217 | #define MPI_MANUFACTPAGE_DEVICEID_FC909 0x0621 | |
| 218 | #define MPI_MANUFACTPAGE_DEVICEID_FC919 0x0624 | |
| 219 | #define MPI_MANUFACTPAGE_DEVICEID_FC929 0x0622 | |
| 220 | #define MPI_MANUFACTPAGE_DEVICEID_FC919X 0x0628 | |
| 221 | #define MPI_MANUFACTPAGE_DEVICEID_FC929X 0x0626 | |
| 222 | #define MPI_MANUFACTPAGE_DEVID_53C1030 0x0030 | |
| 223 | #define MPI_MANUFACTPAGE_DEVID_53C1030ZC 0x0031 | |
| 224 | #define MPI_MANUFACTPAGE_DEVID_1030_53C1035 0x0032 | |
| 225 | #define MPI_MANUFACTPAGE_DEVID_1030ZC_53C1035 0x0033 | |
| 226 | #define MPI_MANUFACTPAGE_DEVID_53C1035 0x0040 | |
| 227 | #define MPI_MANUFACTPAGE_DEVID_53C1035ZC 0x0041 | |
| 228 | #define MPI_MANUFACTPAGE_DEVID_SAS1064 0x0050 | |
| 229 | ||
| 230 | typedef struct config_page_manufacturing_0 { | |
| 231 | config_page_header_t Header; | |
| 232 | uint8_t ChipName[16]; | |
| 233 | uint8_t ChipRevision[8]; | |
| 234 | uint8_t BoardName[16]; | |
| 235 | uint8_t BoardAssembly[16]; | |
| 236 | uint8_t BoardTracerNumber[16]; | |
| 237 | } config_page_manufacturing_0_t; | |
| 238 | ||
| 239 | #define MPI_MANUFACTURING0_PAGEVERSION 0x00 | |
| 240 | ||
| 241 | typedef struct config_page_manufacturing_1 { | |
| 242 | config_page_header_t Header; | |
| 243 | uint8_t VPD[256]; | |
| 244 | } config_page_manufacturing_1_t; | |
| 245 | ||
| 246 | #define MPI_MANUFACTURING1_PAGEVERSION 0x00 | |
| 247 | ||
| 248 | typedef struct mpi_chip_revision_id { | |
| 249 | uint16_t DeviceID; | |
| 250 | uint8_t PCIRevisionID; | |
| 251 | uint8_t Reserved; | |
| 252 | } mpi_chip_revision_id_t; | |
| 253 | ||
| 254 | /* | |
| 255 | * Host code (drivers, BIOS, utilities, etc.) should leave this | |
| 256 | * define set to one and check Header.PageLength at runtime. | |
| 257 | */ | |
| 258 | #ifndef MPI_MAN_PAGE_2_HW_SETTINGS_WORDS | |
| 259 | #define MPI_MAN_PAGE_2_HW_SETTINGS_WORDS 1 | |
| 260 | #endif | |
| 261 | ||
| 262 | typedef struct config_page_manufacturing_2 { | |
| 263 | config_page_header_t Header; | |
| 264 | mpi_chip_revision_id_t ChipId; | |
| 265 | uint32_t HwSettings[MPI_MAN_PAGE_2_HW_SETTINGS_WORDS]; | |
| 266 | } config_page_manufacturing_2_t; | |
| 267 | ||
| 268 | #define MPI_MANUFACTURING2_PAGEVERSION 0x00 | |
| 269 | ||
| 270 | /* | |
| 271 | * Host code (drivers, BIOS, utilities, etc.) should leave this | |
| 272 | * define set to one and check Header.PageLength at runtime. | |
| 273 | */ | |
| 274 | #ifndef MPI_MAN_PAGE_3_INFO_WORDS | |
| 275 | #define MPI_MAN_PAGE_3_INFO_WORDS 1 | |
| 276 | #endif | |
| 277 | ||
| 278 | typedef struct config_page_manufacturing_3 { | |
| 279 | config_page_header_t Header; | |
| 280 | mpi_chip_revision_id_t ChipId; | |
| 281 | uint32_t Info[MPI_MAN_PAGE_3_INFO_WORDS]; | |
| 282 | } config_page_manufacturing_3_t; | |
| 283 | ||
| 284 | #define MPI_MANUFACTURING3_PAGEVERSION 0x00 | |
| 285 | ||
| 286 | typedef struct config_page_manufacturing_4 { | |
| 287 | config_page_header_t Header; | |
| 288 | uint32_t Reserved1; | |
| 289 | uint8_t InfoOffset0; | |
| 290 | uint8_t InfoSize0; | |
| 291 | uint8_t InfoOffset1; | |
| 292 | uint8_t InfoSize1; | |
| 293 | uint8_t InquirySize; | |
| 294 | uint8_t Flags; | |
| 295 | uint16_t Reserved2; | |
| 296 | uint8_t InquiryData[56]; | |
| 297 | uint32_t ISVolumeSettings; | |
| 298 | uint32_t IMEVolumeSettings; | |
| 299 | uint32_t IMVolumeSettings; | |
| 300 | } config_page_manufacturing_4_t; | |
| 301 | ||
| 302 | #define MPI_MANUFACTURING4_PAGEVERSION 0x01 | |
| 303 | #define MPI_MANPAGE4_IR_NO_MIX_SAS_SATA 0x01 | |
| 304 | ||
| 305 | typedef struct config_page_manufacturing_5 { | |
| 306 | config_page_header_t Header; | |
| 307 | uint32_t BaseWWID_L; | |
| 308 | uint32_t BaseWWID_H; | |
| 309 | } config_page_manufacturing_5_t; | |
| 310 | ||
| 311 | #define MPI_MANUFACTURING5_PAGEVERSION 0x00 | |
| 312 | ||
| 313 | typedef struct config_page_manufacturing_6 { | |
| 314 | config_page_header_t Header; | |
| 315 | uint32_t ProductSpecificInfo; | |
| 316 | } config_page_manufacturing_6_t; | |
| 317 | ||
| 318 | #define MPI_MANUFACTURING6_PAGEVERSION 0x00 | |
| 319 | ||
| 320 | /* | |
| 321 | * IO Unit Config Pages | |
| 322 | */ | |
| 323 | typedef struct config_page_io_unit_0 { | |
| 324 | config_page_header_t Header; | |
| 325 | uint64_t UniqueValue; | |
| 326 | } config_page_io_unit_0_t; | |
| 327 | ||
| 328 | #define MPI_IOUNITPAGE0_PAGEVERSION 0x00 | |
| 329 | ||
| 330 | typedef struct config_page_io_unit_1 { | |
| 331 | config_page_header_t Header; | |
| 332 | uint32_t Flags; | |
| 333 | } config_page_io_unit_1_t; | |
| 334 | ||
| 335 | #define MPI_IOUNITPAGE1_PAGEVERSION 0x01 | |
| 336 | ||
| 337 | #define MPI_IOUNITPAGE1_MULTI_FUNCTION 0x00000000 | |
| 338 | #define MPI_IOUNITPAGE1_SINGLE_FUNCTION 0x00000001 | |
| 339 | #define MPI_IOUNITPAGE1_MULTI_PATHING 0x00000002 | |
| 340 | #define MPI_IOUNITPAGE1_SINGLE_PATHING 0x00000000 | |
| 341 | #define MPI_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID 0x00000004 | |
| 342 | #define MPI_IOUNITPAGE1_DISABLE_QUEUE_FULL_HANDLING 0x00000020 | |
| 343 | #define MPI_IOUNITPAGE1_DISABLE_IR 0x00000040 | |
| 344 | #define MPI_IOUNITPAGE1_FORCE_32 0x00000080 | |
| 345 | #define MPI_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE 0x00000100 | |
| 346 | ||
| 347 | typedef struct mpi_adapter_info { | |
| 348 | uint8_t PciBusNumber; | |
| 349 | uint8_t PciDeviceAndFunctionNumber; | |
| 350 | uint16_t AdapterFlags; | |
| 351 | } mpi_adapter_info_t; | |
| 352 | ||
| 353 | #define MPI_ADAPTER_INFO_FLAGS_EMBEDDED 0x0001 | |
| 354 | #define MPI_ADAPTER_INFO_FLAGS_INIT_STATUS 0x0002 | |
| 355 | ||
| 356 | typedef struct config_page_io_unit_2 { | |
| 357 | config_page_header_t Header; | |
| 358 | uint32_t Flags; | |
| 359 | uint32_t BiosVersion; | |
| 360 | mpi_adapter_info_t AdapterOrder[4]; | |
| 361 | } config_page_io_unit_2_t; | |
| 362 | ||
| 363 | #define MPI_IOUNITPAGE2_PAGEVERSION 0x00 | |
| 364 | ||
| 365 | #define MPI_IOUNITPAGE2_FLAGS_PAUSE_ON_ERROR 0x00000002 | |
| 366 | #define MPI_IOUNITPAGE2_FLAGS_VERBOSE_ENABLE 0x00000004 | |
| 367 | #define MPI_IOUNITPAGE2_FLAGS_COLOR_VIDEO_DISABLE 0x00000008 | |
| 368 | #define MPI_IOUNITPAGE2_FLAGS_DONT_HOOK_INT_40 0x00000010 | |
| 369 | ||
| 370 | #define MPI_IOUNITPAGE2_FLAGS_DEV_LIST_DISPLAY_MASK 0x000000E0 | |
| 371 | #define MPI_IOUNITPAGE2_FLAGS_INSTALLED_DEV_DISPLAY 0x00000000 | |
| 372 | #define MPI_IOUNITPAGE2_FLAGS_ADAPTER_DISPLAY 0x00000020 | |
| 373 | #define MPI_IOUNITPAGE2_FLAGS_ADAPTER_DEV_DISPLAY 0x00000040 | |
| 374 | ||
| 375 | /* | |
| 376 | * Host code (drivers, BIOS, utilities, etc.) should leave this | |
| 377 | * define set to one and check Header.PageLength at runtime. | |
| 378 | */ | |
| 379 | #ifndef MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX | |
| 380 | #define MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX 1 | |
| 381 | #endif | |
| 382 | ||
| 383 | typedef struct config_page_io_unit_3 { | |
| 384 | config_page_header_t Header; | |
| 385 | uint8_t GPIOCount; | |
| 386 | uint8_t Reserved1; | |
| 387 | uint16_t Reserved2; | |
| 388 | uint16_t GPIOVal[MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX]; | |
| 389 | } config_page_io_unit_3_t; | |
| 390 | ||
| 391 | #define MPI_IOUNITPAGE3_PAGEVERSION 0x01 | |
| 392 | ||
| 393 | #define MPI_IOUNITPAGE3_GPIO_FUNCTION_MASK 0xFC | |
| 394 | #define MPI_IOUNITPAGE3_GPIO_FUNCTION_SHIFT 2 | |
| 395 | #define MPI_IOUNITPAGE3_GPIO_SETTING_OFF 0x00 | |
| 396 | #define MPI_IOUNITPAGE3_GPIO_SETTING_ON 0x01 | |
| 397 | ||
| 398 | /* | |
| 399 | * IOC Config Pages | |
| 400 | */ | |
| 401 | typedef struct config_page_ioc_0 { | |
| 402 | config_page_header_t Header; | |
| 403 | uint32_t TotalNVStore; | |
| 404 | uint32_t FreeNVStore; | |
| 405 | uint16_t VendorID; | |
| 406 | uint16_t DeviceID; | |
| 407 | uint8_t RevisionID; | |
| 408 | uint8_t Reserved[3]; | |
| 409 | uint32_t ClassCode; | |
| 410 | uint16_t SubsystemVendorID; | |
| 411 | uint16_t SubsystemID; | |
| 412 | } config_page_ioc_0_t; | |
| 413 | ||
| 414 | #define MPI_IOCPAGE0_PAGEVERSION 0x01 | |
| 415 | ||
| 416 | typedef struct config_page_ioc_1 { | |
| 417 | config_page_header_t Header; | |
| 418 | uint32_t Flags; | |
| 419 | uint32_t CoalescingTimeout; | |
| 420 | uint8_t CoalescingDepth; | |
| 421 | uint8_t PCISlotNum; | |
| 422 | uint8_t Reserved[2]; | |
| 423 | } config_page_ioc_1_t; | |
| 424 | ||
| 425 | #define MPI_IOCPAGE1_PAGEVERSION 0x01 | |
| 426 | #define MPI_IOCPAGE1_EEDP_HOST_SUPPORTS_DIF 0x08000000 | |
| 427 | #define MPI_IOCPAGE1_EEDP_MODE_MASK 0x07000000 | |
| 428 | #define MPI_IOCPAGE1_EEDP_MODE_OFF 0x00000000 | |
| 429 | #define MPI_IOCPAGE1_EEDP_MODE_T10 0x01000000 | |
| 430 | #define MPI_IOCPAGE1_EEDP_MODE_LSI_1 0x02000000 | |
| 431 | #define MPI_IOCPAGE1_EEDP_MODE_LSI_2 0x03000000 | |
| 432 | #define MPI_IOCPAGE1_REPLY_COALESCING 0x00000001 | |
| 433 | #define MPI_IOCPAGE1_PCISLOTNUM_UNKNOWN 0xFF | |
| 434 | ||
| 435 | typedef struct config_page_ioc_2_raid_vol { | |
| 436 | uint8_t VolumeID; | |
| 437 | uint8_t VolumeBus; | |
| 438 | uint8_t VolumeIOC; | |
| 439 | uint8_t VolumePageNumber; | |
| 440 | uint8_t VolumeType; | |
| 441 | uint8_t Flags; | |
| 442 | uint16_t Reserved3; | |
| 443 | } config_page_ioc_2_raid_vol_t; | |
| 444 | ||
| 445 | #define MPI_RAID_VOL_TYPE_IS 0x00 | |
| 446 | #define MPI_RAID_VOL_TYPE_IME 0x01 | |
| 447 | #define MPI_RAID_VOL_TYPE_IM 0x02 | |
| 448 | #define MPI_IOCPAGE2_FLAG_VOLUME_INACTIVE 0x08 | |
| 449 | ||
| 450 | /* | |
| 451 | * Host code (drivers, BIOS, utilities, etc.) should leave this | |
| 452 | * define set to one and check Header.PageLength at runtime. | |
| 453 | */ | |
| 454 | #ifndef MPI_IOC_PAGE_2_RAID_VOLUME_MAX | |
| 455 | #define MPI_IOC_PAGE_2_RAID_VOLUME_MAX 1 | |
| 456 | #endif | |
| 457 | ||
| 458 | typedef struct config_page_ioc_2 { | |
| 459 | config_page_header_t Header; | |
| 460 | uint32_t CapabilitiesFlags; | |
| 461 | uint8_t NumActiveVolumes; | |
| 462 | uint8_t MaxVolumes; | |
| 463 | uint8_t NumActivePhysDisks; | |
| 464 | uint8_t MaxPhysDisks; | |
| 465 | config_page_ioc_2_raid_vol_t RaidVolume[MPI_IOC_PAGE_2_RAID_VOLUME_MAX]; | |
| 466 | } config_page_ioc_2_t; | |
| 467 | ||
| 468 | #define MPI_IOCPAGE2_PAGEVERSION 0x02 | |
| 469 | ||
| 470 | /* | |
| 471 | * IOC Page 2 Capabilities flags | |
| 472 | */ | |
| 473 | #define MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT 0x00000001 | |
| 474 | #define MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT 0x00000002 | |
| 475 | #define MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT 0x00000004 | |
| 476 | #define MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT 0x20000000 | |
| 477 | #define MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT 0x40000000 | |
| 478 | #define MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT 0x80000000 | |
| 479 | ||
| 480 | typedef struct ioc_3_phys_disk { | |
| 481 | uint8_t PhysDiskID; | |
| 482 | uint8_t PhysDiskBus; | |
| 483 | uint8_t PhysDiskIOC; | |
| 484 | uint8_t PhysDiskNum; | |
| 485 | } ioc_3_phys_disk_t; | |
| 486 | ||
| 487 | /* | |
| 488 | * Host code (drivers, BIOS, utilities, etc.) should leave this | |
| 489 | * define set to one and check Header.PageLength at runtime. | |
| 490 | */ | |
| 491 | #ifndef MPI_IOC_PAGE_3_PHYSDISK_MAX | |
| 492 | #define MPI_IOC_PAGE_3_PHYSDISK_MAX 1 | |
| 493 | #endif | |
| 494 | ||
| 495 | typedef struct config_page_ioc_3 { | |
| 496 | config_page_header_t Header; | |
| 497 | uint8_t NumPhysDisks; | |
| 498 | uint8_t Reserved1; | |
| 499 | uint16_t Reserved2; | |
| 500 | ioc_3_phys_disk_t PhysDisk[MPI_IOC_PAGE_3_PHYSDISK_MAX]; | |
| 501 | } config_page_ioc_3_t; | |
| 502 | ||
| 503 | #define MPI_IOCPAGE3_PAGEVERSION 0x00 | |
| 504 | ||
| 505 | typedef struct ioc_4_sep { | |
| 506 | uint8_t SEPTargetID; | |
| 507 | uint8_t SEPBus; | |
| 508 | uint16_t Reserved; | |
| 509 | } ioc_4_sep_t; | |
| 510 | ||
| 511 | /* | |
| 512 | * Host code (drivers, BIOS, utilities, etc.) should leave this | |
| 513 | * define set to one and check Header.PageLength at runtime. | |
| 514 | */ | |
| 515 | #ifndef MPI_IOC_PAGE_4_SEP_MAX | |
| 516 | #define MPI_IOC_PAGE_4_SEP_MAX 1 | |
| 517 | #endif | |
| 518 | ||
| 519 | typedef struct config_page_ioc_4 { | |
| 520 | config_page_header_t Header; | |
| 521 | uint8_t ActiveSEP; | |
| 522 | uint8_t MaxSEP; | |
| 523 | uint16_t Reserved1; | |
| 524 | ioc_4_sep_t SEP[MPI_IOC_PAGE_4_SEP_MAX]; | |
| 525 | } config_page_ioc_4_t; | |
| 526 | ||
| 527 | #define MPI_IOCPAGE4_PAGEVERSION 0x00 | |
| 528 | ||
| 529 | /* | |
| 530 | * SCSI Port Config Pages | |
| 531 | */ | |
| 532 | typedef struct config_page_scsi_port_0 { | |
| 533 | config_page_header_t Header; | |
| 534 | uint32_t Capabilities; | |
| 535 | uint32_t PhysicalInterface; | |
| 536 | } config_page_scsi_port_0_t; | |
| 537 | ||
| 538 | #define MPI_SCSIPORTPAGE0_PAGEVERSION 0x01 | |
| 539 | ||
| 540 | /* | |
| 541 | * Capabilities | |
| 542 | */ | |
| 543 | #define MPI_SCSIPORTPAGE0_CAP_IU 0x00000001 | |
| 544 | #define MPI_SCSIPORTPAGE0_CAP_DT 0x00000002 | |
| 545 | #define MPI_SCSIPORTPAGE0_CAP_QAS 0x00000004 | |
| 546 | #define MPI_SCSIPORTPAGE0_CAP_PACING_TRANSFERS 0x00000008 | |
| 547 | #define MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK 0x0000FF00 | |
| 548 | #define MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK 0x00FF0000 | |
| 549 | #define MPI_SCSIPORTPAGE0_CAP_WIDE 0x20000000 | |
| 550 | #define MPI_SCSIPORTPAGE0_CAP_AIP 0x80000000 | |
| 551 | ||
| 552 | /* | |
| 553 | * Physical Interface | |
| 554 | */ | |
| 555 | #define MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK 0x00000003 | |
| 556 | #define MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD 0x01 | |
| 557 | #define MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE 0x02 | |
| 558 | #define MPI_SCSIPORTPAGE0_PHY_SIGNAL_LVD 0x03 | |
| 559 | ||
| 560 | typedef struct config_page_scsi_port_1 { | |
| 561 | config_page_header_t Header; | |
| 562 | uint32_t Configuration; | |
| 563 | uint32_t OnBusTimerValue; | |
| 564 | } config_page_scsi_port_1_t; | |
| 565 | ||
| 566 | #define MPI_SCSIPORTPAGE1_PAGEVERSION 0x02 | |
| 567 | ||
| 568 | #define MPI_SCSIPORTPAGE1_CFG_PORT_SCSI_ID_MASK 0x000000FF | |
| 569 | #define MPI_SCSIPORTPAGE1_CFG_PORT_RESPONSE_ID_MASK 0xFFFF0000 | |
| 570 | ||
| 571 | typedef struct mpi_device_info { | |
| 572 | uint8_t Timeout; | |
| 573 | uint8_t SyncFactor; | |
| 574 | uint16_t DeviceFlags; | |
| 575 | } mpi_device_info_t; | |
| 576 | ||
| 577 | typedef struct config_page_scsi_port_2 { | |
| 578 | config_page_header_t Header; | |
| 579 | uint32_t PortFlags; | |
| 580 | uint32_t PortSettings; | |
| 581 | mpi_device_info_t DeviceSettings[16]; | |
| 582 | } config_page_scsi_port_2_t; | |
| 583 | ||
| 584 | #define MPI_SCSIPORTPAGE2_PAGEVERSION 0x01 | |
| 585 | ||
| 586 | #define MPI_SCSIPORTPAGE2_PORT_FLAGS_SCAN_HIGH_TO_LOW 0x00000001 | |
| 587 | #define MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET 0x00000004 | |
| 588 | #define MPI_SCSIPORTPAGE2_PORT_FLAGS_ALTERNATE_CHS 0x00000008 | |
| 589 | #define MPI_SCSIPORTPAGE2_PORT_FLAGS_TERMINATION_DISABLE 0x00000010 | |
| 590 | ||
| 591 | #define MPI_SCSIPORTPAGE2_PORT_HOST_ID_MASK 0x0000000F | |
| 592 | #define MPI_SCSIPORTPAGE2_PORT_MASK_INIT_HBA 0x00000030 | |
| 593 | #define MPI_SCSIPORTPAGE2_PORT_DISABLE_INIT_HBA 0x00000000 | |
| 594 | #define MPI_SCSIPORTPAGE2_PORT_BIOS_INIT_HBA 0x00000010 | |
| 595 | #define MPI_SCSIPORTPAGE2_PORT_OS_INIT_HBA 0x00000020 | |
| 596 | #define MPI_SCSIPORTPAGE2_PORT_BIOS_OS_INIT_HBA 0x00000030 | |
| 597 | #define MPI_SCSIPORTPAGE2_PORT_REMOVABLE_MEDIA 0x000000C0 | |
| 598 | #define MPI_SCSIPORTPAGE2_PORT_SPINUP_DELAY_MASK 0x00000F00 | |
| 599 | #define MPI_SCSIPORTPAGE2_PORT_MASK_NEGO_MASTER_SETTINGS 0x00003000 | |
| 600 | #define MPI_SCSIPORTPAGE2_PORT_NEGO_MASTER_SETTINGS 0x00000000 | |
| 601 | #define MPI_SCSIPORTPAGE2_PORT_NONE_MASTER_SETTINGS 0x00001000 | |
| 602 | #define MPI_SCSIPORTPAGE2_PORT_ALL_MASTER_SETTINGS 0x00003000 | |
| 603 | ||
| 604 | #define MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE 0x0001 | |
| 605 | #define MPI_SCSIPORTPAGE2_DEVICE_ID_SCAN_ENABLE 0x0002 | |
| 606 | #define MPI_SCSIPORTPAGE2_DEVICE_LUN_SCAN_ENABLE 0x0004 | |
| 607 | #define MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE 0x0008 | |
| 608 | #define MPI_SCSIPORTPAGE2_DEVICE_WIDE_DISABLE 0x0010 | |
| 609 | #define MPI_SCSIPORTPAGE2_DEVICE_BOOT_CHOICE 0x0020 | |
| 610 | ||
| 611 | /* | |
| 612 | * SCSI Target Device Config Pages | |
| 613 | */ | |
| 614 | typedef struct config_page_scsi_device_0 { | |
| 615 | config_page_header_t Header; | |
| 616 | uint32_t NegotiatedParameters; | |
| 617 | uint32_t Information; | |
| 618 | } config_page_scsi_device_0_t; | |
| 619 | ||
| 620 | #define MPI_SCSIDEVPAGE0_PAGEVERSION 0x02 | |
| 621 | ||
| 622 | #define MPI_SCSIDEVPAGE0_NP_IU 0x00000001 | |
| 623 | #define MPI_SCSIDEVPAGE0_NP_DT 0x00000002 | |
| 624 | #define MPI_SCSIDEVPAGE0_NP_QAS 0x00000004 | |
| 625 | #define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_PERIOD_MASK 0x0000FF00 | |
| 626 | #define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_OFFSET_MASK 0x00FF0000 | |
| 627 | #define MPI_SCSIDEVPAGE0_NP_WIDE 0x20000000 | |
| 628 | #define MPI_SCSIDEVPAGE0_NP_AIP 0x80000000 | |
| 629 | ||
| 630 | #define MPI_SCSIDEVPAGE0_INFO_PARAMS_NEGOTIATED 0x00000001 | |
| 631 | #define MPI_SCSIDEVPAGE0_INFO_SDTR_REJECTED 0x00000002 | |
| 632 | #define MPI_SCSIDEVPAGE0_INFO_WDTR_REJECTED 0x00000004 | |
| 633 | #define MPI_SCSIDEVPAGE0_INFO_PPR_REJECTED 0x00000008 | |
| 634 | ||
| 635 | typedef struct config_page_scsi_device_1 { | |
| 636 | config_page_header_t Header; | |
| 637 | uint32_t RequestedParameters; | |
| 638 | uint32_t Reserved; | |
| 639 | uint32_t Configuration; | |
| 640 | } config_page_scsi_device_1_t; | |
| 641 | ||
| 642 | #define MPI_SCSIDEVPAGE1_PAGEVERSION 0x03 | |
| 643 | ||
| 644 | #define MPI_SCSIDEVPAGE1_RP_IU 0x00000001 | |
| 645 | #define MPI_SCSIDEVPAGE1_RP_DT 0x00000002 | |
| 646 | #define MPI_SCSIDEVPAGE1_RP_QAS 0x00000004 | |
| 647 | #define MPI_SCSIDEVPAGE1_RP_MIN_SYNC_PERIOD_MASK 0x0000FF00 | |
| 648 | #define MPI_SCSIDEVPAGE1_RP_MAX_SYNC_OFFSET_MASK 0x00FF0000 | |
| 649 | #define MPI_SCSIDEVPAGE1_RP_WIDE 0x20000000 | |
| 650 | #define MPI_SCSIDEVPAGE1_RP_AIP 0x80000000 | |
| 651 | ||
| 652 | #define MPI_SCSIDEVPAGE1_DV_LVD_DRIVE_STRENGTH_MASK 0x00000003 | |
| 653 | #define MPI_SCSIDEVPAGE1_DV_SE_SLEW_RATE_MASK 0x00000300 | |
| 654 | ||
| 655 | #define MPI_SCSIDEVPAGE1_CONF_WDTR_DISALLOWED 0x00000002 | |
| 656 | #define MPI_SCSIDEVPAGE1_CONF_SDTR_DISALLOWED 0x00000004 | |
| 657 | ||
| 658 | typedef struct config_page_scsi_device_2 { | |
| 659 | config_page_header_t Header; | |
| 660 | uint32_t DomainValidation; | |
| 661 | uint32_t ParityPipeSelect; | |
| 662 | uint32_t DataPipeSelect; | |
| 663 | } config_page_scsi_device_2_t; | |
| 664 | ||
| 665 | #define MPI_SCSIDEVPAGE2_PAGEVERSION 0x00 | |
| 666 | ||
| 667 | #define MPI_SCSIDEVPAGE2_DV_ISI_ENABLE 0x00000010 | |
| 668 | #define MPI_SCSIDEVPAGE2_DV_SECONDARY_DRIVER_ENABLE 0x00000020 | |
| 669 | #define MPI_SCSIDEVPAGE2_DV_SLEW_RATE_CTRL 0x00000380 | |
| 670 | #define MPI_SCSIDEVPAGE2_DV_PRIM_DRIVE_STR_CTRL 0x00001C00 | |
| 671 | #define MPI_SCSIDEVPAGE2_DV_SECOND_DRIVE_STR_CTRL 0x0000E000 | |
| 672 | #define MPI_SCSIDEVPAGE2_DV_XCLKH_ST 0x10000000 | |
| 673 | #define MPI_SCSIDEVPAGE2_DV_XCLKS_ST 0x20000000 | |
| 674 | #define MPI_SCSIDEVPAGE2_DV_XCLKH_DT 0x40000000 | |
| 675 | #define MPI_SCSIDEVPAGE2_DV_XCLKS_DT 0x80000000 | |
| 676 | ||
| 677 | #define MPI_SCSIDEVPAGE2_PPS_PPS_MASK 0x00000003 | |
| 678 | ||
| 679 | #define MPI_SCSIDEVPAGE2_DPS_BIT_0_PL_SELECT_MASK 0x00000003 | |
| 680 | #define MPI_SCSIDEVPAGE2_DPS_BIT_1_PL_SELECT_MASK 0x0000000C | |
| 681 | #define MPI_SCSIDEVPAGE2_DPS_BIT_2_PL_SELECT_MASK 0x00000030 | |
| 682 | #define MPI_SCSIDEVPAGE2_DPS_BIT_3_PL_SELECT_MASK 0x000000C0 | |
| 683 | #define MPI_SCSIDEVPAGE2_DPS_BIT_4_PL_SELECT_MASK 0x00000300 | |
| 684 | #define MPI_SCSIDEVPAGE2_DPS_BIT_5_PL_SELECT_MASK 0x00000C00 | |
| 685 | #define MPI_SCSIDEVPAGE2_DPS_BIT_6_PL_SELECT_MASK 0x00003000 | |
| 686 | #define MPI_SCSIDEVPAGE2_DPS_BIT_7_PL_SELECT_MASK 0x0000C000 | |
| 687 | #define MPI_SCSIDEVPAGE2_DPS_BIT_8_PL_SELECT_MASK 0x00030000 | |
| 688 | #define MPI_SCSIDEVPAGE2_DPS_BIT_9_PL_SELECT_MASK 0x000C0000 | |
| 689 | #define MPI_SCSIDEVPAGE2_DPS_BIT_10_PL_SELECT_MASK 0x00300000 | |
| 690 | #define MPI_SCSIDEVPAGE2_DPS_BIT_11_PL_SELECT_MASK 0x00C00000 | |
| 691 | #define MPI_SCSIDEVPAGE2_DPS_BIT_12_PL_SELECT_MASK 0x03000000 | |
| 692 | #define MPI_SCSIDEVPAGE2_DPS_BIT_13_PL_SELECT_MASK 0x0C000000 | |
| 693 | #define MPI_SCSIDEVPAGE2_DPS_BIT_14_PL_SELECT_MASK 0x30000000 | |
| 694 | #define MPI_SCSIDEVPAGE2_DPS_BIT_15_PL_SELECT_MASK 0xC0000000 | |
| 695 | ||
| 696 | /* | |
| 697 | * FC Port Config Pages | |
| 698 | */ | |
| 699 | typedef struct config_page_fc_port_0 { | |
| 700 | config_page_header_t Header; | |
| 701 | uint32_t Flags; | |
| 702 | uint8_t MPIPortNumber; | |
| 703 | uint8_t Reserved[3]; | |
| 704 | uint32_t PortIdentifier; | |
| 705 | uint64_t WWNN; | |
| 706 | uint64_t WWPN; | |
| 707 | uint32_t SupportedServiceClass; | |
| 708 | uint32_t SupportedSpeeds; | |
| 709 | uint32_t CurrentSpeed; | |
| 710 | uint32_t MaxFrameSize; | |
| 711 | uint64_t FabricWWNN; | |
| 712 | uint64_t FabricWWPN; | |
| 713 | uint32_t DiscoveredPortsCount; | |
| 714 | uint32_t MaxInitiators; | |
| 715 | } config_page_fc_port_0_t; | |
| 716 | ||
| 717 | #define MPI_FCPORTPAGE0_PAGEVERSION 0x01 | |
| 718 | ||
| 719 | #define MPI_FCPORTPAGE0_FLAGS_PROT_MASK 0x0000000F | |
| 720 | #define MPI_FCPORTPAGE0_FLAGS_PROT_FCP_INIT \ | |
| 721 | MPI_PORTFACTS_PROTOCOL_INITIATOR | |
| 722 | #define MPI_FCPORTPAGE0_FLAGS_PROT_FCP_TARG \ | |
| 723 | MPI_PORTFACTS_PROTOCOL_TARGET | |
| 724 | #define MPI_FCPORTPAGE0_FLAGS_PROT_LAN \ | |
| 725 | MPI_PORTFACTS_PROTOCOL_LAN | |
| 726 | #define MPI_FCPORTPAGE0_FLAGS_PROT_LOGBUSADDR \ | |
| 727 | MPI_PORTFACTS_PROTOCOL_LOGBUSADDR | |
| 728 | ||
| 729 | #define MPI_FCPORTPAGE0_FLAGS_ALIAS_ALPA_SUPPORTED 0x00000010 | |
| 730 | #define MPI_FCPORTPAGE0_FLAGS_ALIAS_WWN_SUPPORTED 0x00000020 | |
| 731 | #define MPI_FCPORTPAGE0_FLAGS_FABRIC_WWN_VALID 0x00000030 | |
| 732 | ||
| 733 | #define MPI_FCPORTPAGE0_FLAGS_ATTACH_TYPE_MASK 0x00000F00 | |
| 734 | #define MPI_FCPORTPAGE0_FLAGS_ATTACH_NO_INIT 0x00000000 | |
| 735 | #define MPI_FCPORTPAGE0_FLAGS_ATTACH_POINT_TO_POINT 0x00000100 | |
| 736 | #define MPI_FCPORTPAGE0_FLAGS_ATTACH_PRIVATE_LOOP 0x00000200 | |
| 737 | #define MPI_FCPORTPAGE0_FLAGS_ATTACH_FABRIC_DIRECT 0x00000400 | |
| 738 | #define MPI_FCPORTPAGE0_FLAGS_ATTACH_PUBLIC_LOOP 0x00000800 | |
| 739 | ||
| 740 | #define MPI_FCPORTPAGE0_FLAGS_ATTACH_TYPE_MASK 0x00000F00 | |
| 741 | #define MPI_FCPORTPAGE0_FLAGS_ATTACH_NO_INIT 0x00000000 | |
| 742 | #define MPI_FCPORTPAGE0_FLAGS_ATTACH_POINT_TO_POINT 0x00000100 | |
| 743 | #define MPI_FCPORTPAGE0_FLAGS_ATTACH_PRIVATE_LOOP 0x00000200 | |
| 744 | #define MPI_FCPORTPAGE0_FLAGS_ATTACH_FABRIC_DIRECT 0x00000400 | |
| 745 | #define MPI_FCPORTPAGE0_FLAGS_ATTACH_PUBLIC_LOOP 0x00000800 | |
| 746 | ||
| 747 | #define MPI_FCPORTPAGE0_LTYPE_RESERVED 0x00 | |
| 748 | #define MPI_FCPORTPAGE0_LTYPE_OTHER 0x01 | |
| 749 | #define MPI_FCPORTPAGE0_LTYPE_UNKNOWN 0x02 | |
| 750 | #define MPI_FCPORTPAGE0_LTYPE_COPPER 0x03 | |
| 751 | #define MPI_FCPORTPAGE0_LTYPE_SINGLE_1300 0x04 | |
| 752 | #define MPI_FCPORTPAGE0_LTYPE_SINGLE_1500 0x05 | |
| 753 | #define MPI_FCPORTPAGE0_LTYPE_50_LASER_MULTI 0x06 | |
| 754 | #define MPI_FCPORTPAGE0_LTYPE_50_LED_MULTI 0x07 | |
| 755 | #define MPI_FCPORTPAGE0_LTYPE_62_LASER_MULTI 0x08 | |
| 756 | #define MPI_FCPORTPAGE0_LTYPE_62_LED_MULTI 0x09 | |
| 757 | #define MPI_FCPORTPAGE0_LTYPE_MULTI_LONG_WAVE 0x0A | |
| 758 | #define MPI_FCPORTPAGE0_LTYPE_MULTI_SHORT_WAVE 0x0B | |
| 759 | #define MPI_FCPORTPAGE0_LTYPE_LASER_SHORT_WAVE 0x0C | |
| 760 | #define MPI_FCPORTPAGE0_LTYPE_LED_SHORT_WAVE 0x0D | |
| 761 | #define MPI_FCPORTPAGE0_LTYPE_1300_LONG_WAVE 0x0E | |
| 762 | #define MPI_FCPORTPAGE0_LTYPE_1500_LONG_WAVE 0x0F | |
| 763 | ||
| 764 | #define MPI_FCPORTPAGE0_PORTSTATE_UNKNOWN 0x01 | |
| 765 | #define MPI_FCPORTPAGE0_PORTSTATE_ONLINE 0x02 | |
| 766 | #define MPI_FCPORTPAGE0_PORTSTATE_OFFLINE 0x03 | |
| 767 | #define MPI_FCPORTPAGE0_PORTSTATE_BYPASSED 0x04 | |
| 768 | #define MPI_FCPORTPAGE0_PORTSTATE_DIAGNOST 0x05 | |
| 769 | #define MPI_FCPORTPAGE0_PORTSTATE_LINKDOWN 0x06 | |
| 770 | #define MPI_FCPORTPAGE0_PORTSTATE_ERROR 0x07 | |
| 771 | #define MPI_FCPORTPAGE0_PORTSTATE_LOOPBACK 0x08 | |
| 772 | ||
| 773 | #define MPI_FCPORTPAGE0_SUPPORT_CLASS_1 0x00000001 | |
| 774 | #define MPI_FCPORTPAGE0_SUPPORT_CLASS_2 0x00000002 | |
| 775 | #define MPI_FCPORTPAGE0_SUPPORT_CLASS_3 0x00000004 | |
| 776 | ||
| 777 | #define MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED 0x00000001 | |
| 778 | #define MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED 0x00000002 | |
| 779 | #define MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED 0x00000004 | |
| 780 | ||
| 781 | #define MPI_FCPORTPAGE0_CURRENT_SPEED_1GBIT \ | |
| 782 | MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED | |
| 783 | #define MPI_FCPORTPAGE0_CURRENT_SPEED_2GBIT \ | |
| 784 | MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED | |
| 785 | #define MPI_FCPORTPAGE0_CURRENT_SPEED_10GBIT \ | |
| 786 | MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED | |
| 787 | ||
| 788 | typedef struct config_page_fc_port_1 { | |
| 789 | config_page_header_t Header; | |
| 790 | uint32_t Flags; | |
| 791 | uint64_t NoSEEPROMWWNN; | |
| 792 | uint64_t NoSEEPROMWWPN; | |
| 793 | uint8_t HardALPA; | |
| 794 | uint8_t LinkConfig; | |
| 795 | uint8_t TopologyConfig; | |
| 796 | uint8_t Reserved; | |
| 797 | } config_page_fc_port_1_t; | |
| 798 | ||
| 799 | #define MPI_FCPORTPAGE1_PAGEVERSION 0x02 | |
| 800 | ||
| 801 | #define MPI_FCPORTPAGE1_FLAGS_EXT_FCP_STATUS_EN 0x08000000 | |
| 802 | #define MPI_FCPORTPAGE1_FLAGS_IMMEDIATE_ERROR_REPLY 0x04000000 | |
| 803 | #define MPI_FCPORTPAGE1_FLAGS_SORT_BY_DID 0x00000001 | |
| 804 | #define MPI_FCPORTPAGE1_FLAGS_SORT_BY_WWN 0x00000000 | |
| 805 | ||
| 806 | /* | |
| 807 | * Flags used for programming protocol modes in NVStore | |
| 808 | */ | |
| 809 | #define MPI_FCPORTPAGE1_FLAGS_PROT_MASK 0xF0000000 | |
| 810 | #define MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT 28 | |
| 811 | #define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_INIT \ | |
| 812 | ((uint32_t)MPI_PORTFACTS_PROTOCOL_INITIATOR << \ | |
| 813 | MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT) | |
| 814 | #define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_TARG \ | |
| 815 | ((uint32_t)MPI_PORTFACTS_PROTOCOL_TARGET << \ | |
| 816 | MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT) | |
| 817 | #define MPI_FCPORTPAGE1_FLAGS_PROT_LAN \ | |
| 818 | ((uint32_t)MPI_PORTFACTS_PROTOCOL_LAN << \ | |
| 819 | MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT) | |
| 820 | #define MPI_FCPORTPAGE1_FLAGS_PROT_LOGBUSADDR \ | |
| 821 | ((uint32_t)MPI_PORTFACTS_PROTOCOL_LOGBUSADDR << \ | |
| 822 | MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT) | |
| 823 | ||
| 824 | #define MPI_FCPORTPAGE1_HARD_ALPA_NOT_USED 0xFF | |
| 825 | ||
| 826 | #define MPI_FCPORTPAGE1_LCONFIG_SPEED_MASK 0x0F | |
| 827 | #define MPI_FCPORTPAGE1_LCONFIG_SPEED_1GIG 0x00 | |
| 828 | #define MPI_FCPORTPAGE1_LCONFIG_SPEED_2GIG 0x01 | |
| 829 | #define MPI_FCPORTPAGE1_LCONFIG_SPEED_4GIG 0x02 | |
| 830 | #define MPI_FCPORTPAGE1_LCONFIG_SPEED_10GIG 0x03 | |
| 831 | #define MPI_FCPORTPAGE1_LCONFIG_SPEED_AUTO 0x0F | |
| 832 | ||
| 833 | #define MPI_FCPORTPAGE1_TOPOLOGY_MASK 0x0F | |
| 834 | #define MPI_FCPORTPAGE1_TOPOLOGY_NLPORT 0x01 | |
| 835 | #define MPI_FCPORTPAGE1_TOPOLOGY_NPORT 0x02 | |
| 836 | #define MPI_FCPORTPAGE1_TOPOLOGY_AUTO 0x0F | |
| 837 | ||
| 838 | typedef struct config_page_fc_port_2 { | |
| 839 | config_page_header_t Header; | |
| 840 | uint8_t NumberActive; | |
| 841 | uint8_t ALPA[127]; | |
| 842 | } config_page_fc_port_2_t; | |
| 843 | ||
| 844 | #define MPI_FCPORTPAGE2_PAGEVERSION 0x01 | |
| 845 | ||
| 846 | typedef struct wwn_format { | |
| 847 | uint64_t WWNN; | |
| 848 | uint64_t WWPN; | |
| 849 | } wwn_format_t; | |
| 850 | ||
| 851 | typedef union fc_port_persistent_physical_id { | |
| 852 | wwn_format_t WWN; | |
| 853 | uint32_t Did; | |
| 854 | } fc_port_persistent_physical_id_t; | |
| 855 | ||
| 856 | typedef struct fc_port_persistent { | |
| 857 | fc_port_persistent_physical_id_t PhysicalIdentifier; | |
| 858 | uint8_t TargetID; | |
| 859 | uint8_t Bus; | |
| 860 | uint16_t Flags; | |
| 861 | } fc_port_persistent_t; | |
| 862 | ||
| 863 | #define MPI_PERSISTENT_FLAGS_SHIFT 16 | |
| 864 | #define MPI_PERSISTENT_FLAGS_ENTRY_VALID 0x0001 | |
| 865 | #define MPI_PERSISTENT_FLAGS_SCAN_ID 0x0002 | |
| 866 | #define MPI_PERSISTENT_FLAGS_SCAN_LUNS 0x0004 | |
| 867 | #define MPI_PERSISTENT_FLAGS_BOOT_DEVICE 0x0008 | |
| 868 | #define MPI_PERSISTENT_FLAGS_BY_DID 0x0080 | |
| 869 | ||
| 870 | /* | |
| 871 | * Host code (drivers, BIOS, utilities, etc.) should leave this | |
| 872 | * define set to one and check Header.PageLength at runtime. | |
| 873 | */ | |
| 874 | #ifndef MPI_FC_PORT_PAGE_3_ENTRY_MAX | |
| 875 | #define MPI_FC_PORT_PAGE_3_ENTRY_MAX 1 | |
| 876 | #endif | |
| 877 | ||
| 878 | typedef struct config_page_fc_port_3 { | |
| 879 | config_page_header_t Header; | |
| 880 | fc_port_persistent_t Entry[MPI_FC_PORT_PAGE_3_ENTRY_MAX]; | |
| 881 | } config_page_fc_port_3_t; | |
| 882 | ||
| 883 | #define MPI_FCPORTPAGE3_PAGEVERSION 0x01 | |
| 884 | ||
| 885 | typedef struct config_page_fc_port_4 { | |
| 886 | config_page_header_t Header; | |
| 887 | uint32_t PortFlags; | |
| 888 | uint32_t PortSettings; | |
| 889 | } config_page_fc_port_4_t; | |
| 890 | ||
| 891 | #define MPI_FCPORTPAGE4_PAGEVERSION 0x00 | |
| 892 | ||
| 893 | #define MPI_FCPORTPAGE4_PORT_FLAGS_ALTERNATE_CHS 0x00000008 | |
| 894 | ||
| 895 | #define MPI_FCPORTPAGE4_PORT_MASK_INIT_HBA 0x00000030 | |
| 896 | #define MPI_FCPORTPAGE4_PORT_DISABLE_INIT_HBA 0x00000000 | |
| 897 | #define MPI_FCPORTPAGE4_PORT_BIOS_INIT_HBA 0x00000010 | |
| 898 | #define MPI_FCPORTPAGE4_PORT_OS_INIT_HBA 0x00000020 | |
| 899 | #define MPI_FCPORTPAGE4_PORT_BIOS_OS_INIT_HBA 0x00000030 | |
| 900 | #define MPI_FCPORTPAGE4_PORT_REMOVABLE_MEDIA 0x000000C0 | |
| 901 | #define MPI_FCPORTPAGE4_PORT_SPINUP_DELAY_MASK 0x00000F00 | |
| 902 | ||
| 903 | typedef struct config_page_fc_port_5_alias_info { | |
| 904 | uint8_t Flags; | |
| 905 | uint8_t AliasAlpa; | |
| 906 | uint16_t Reserved; | |
| 907 | uint64_t AliasWWNN; | |
| 908 | uint64_t AliasWWPN; | |
| 909 | } config_page_fc_port_5_alias_info_t; | |
| 910 | ||
| 911 | /* | |
| 912 | * Host code (drivers, BIOS, utilities, etc.) should leave this | |
| 913 | * define set to one and check Header.PageLength at runtime. | |
| 914 | */ | |
| 915 | #ifndef MPI_FC_PORT_PAGE_5_ALIAS_MAX | |
| 916 | #define MPI_FC_PORT_PAGE_5_ALIAS_MAX 1 | |
| 917 | #endif | |
| 918 | ||
| 919 | typedef struct config_page_fc_port_5 { | |
| 920 | config_page_header_t Header; | |
| 921 | config_page_fc_port_5_alias_info_t | |
| 922 | AliasInfo[MPI_FC_PORT_PAGE_5_ALIAS_MAX]; | |
| 923 | } config_page_fc_port_5_t; | |
| 924 | ||
| 925 | #define MPI_FCPORTPAGE5_PAGEVERSION 0x00 | |
| 926 | ||
| 927 | #define MPI_FCPORTPAGE5_FLAGS_ALIAS_ALPA_VALID 0x01 | |
| 928 | #define MPI_FCPORTPAGE5_FLAGS_ALIAS_WWN_VALID 0x02 | |
| 929 | ||
| 930 | typedef struct config_page_fc_port_6 { | |
| 931 | config_page_header_t Header; | |
| 932 | uint32_t Reserved; | |
| 933 | uint64_t TimeSinceReset; | |
| 934 | uint64_t TxFrames; | |
| 935 | uint64_t RxFrames; | |
| 936 | uint64_t TxWords; | |
| 937 | uint64_t RxWords; | |
| 938 | uint64_t LipCount; | |
| 939 | uint64_t NosCount; | |
| 940 | uint64_t ErrorFrames; | |
| 941 | uint64_t DumpedFrames; | |
| 942 | uint64_t LinkFailureCount; | |
| 943 | uint64_t LossOfSyncCount; | |
| 944 | uint64_t LossOfSignalCount; | |
| 945 | uint64_t PrimativeSeqErrCount; | |
| 946 | uint64_t InvalidTxWordCount; | |
| 947 | uint64_t InvalidCrcCount; | |
| 948 | uint64_t FcpInitiatorIoCount; | |
| 949 | } config_page_fc_port_6_t; | |
| 950 | ||
| 951 | #define MPI_FCPORTPAGE6_PAGEVERSION 0x00 | |
| 952 | ||
| 953 | typedef struct config_page_fc_port_7 { | |
| 954 | config_page_header_t Header; | |
| 955 | uint32_t Reserved; | |
| 956 | uint8_t PortSymbolicName[256]; | |
| 957 | } config_page_fc_port_7_t; | |
| 958 | ||
| 959 | #define MPI_FCPORTPAGE7_PAGEVERSION 0x00 | |
| 960 | ||
| 961 | typedef struct config_page_fc_port_8 { | |
| 962 | config_page_header_t Header; | |
| 963 | uint32_t BitVector[8]; | |
| 964 | } config_page_fc_port_8_t; | |
| 965 | ||
| 966 | #define MPI_FCPORTPAGE8_PAGEVERSION 0x00 | |
| 967 | ||
| 968 | typedef struct config_page_fc_port_9 { | |
| 969 | config_page_header_t Header; | |
| 970 | uint32_t Reserved; | |
| 971 | uint64_t GlobalWWPN; | |
| 972 | uint64_t GlobalWWNN; | |
| 973 | uint32_t UnitType; | |
| 974 | uint32_t PhysicalPortNumber; | |
| 975 | uint32_t NumAttachedNodes; | |
| 976 | uint16_t IPVersion; | |
| 977 | uint16_t UDPPortNumber; | |
| 978 | uint8_t IPAddress[16]; | |
| 979 | uint16_t Reserved1; | |
| 980 | uint16_t TopologyDiscoveryFlags; | |
| 981 | } config_page_fc_port_9_t; | |
| 982 | ||
| 983 | #define MPI_FCPORTPAGE9_PAGEVERSION 0x00 | |
| 984 | ||
| 985 | /* | |
| 986 | * FC Device Config Pages | |
| 987 | */ | |
| 988 | typedef struct config_page_fc_device_0 { | |
| 989 | config_page_header_t Header; | |
| 990 | uint64_t WWNN; | |
| 991 | uint64_t WWPN; | |
| 992 | uint32_t PortIdentifier; | |
| 993 | uint8_t Protocol; | |
| 994 | uint8_t Flags; | |
| 995 | uint16_t BBCredit; | |
| 996 | uint16_t MaxRxFrameSize; | |
| 997 | uint8_t Reserved1; | |
| 998 | uint8_t PortNumber; | |
| 999 | uint8_t FcPhLowestVersion; | |
| 1000 | uint8_t FcPhHighestVersion; | |
| 1001 | uint8_t CurrentTargetID; | |
| 1002 | uint8_t CurrentBus; | |
| 1003 | } config_page_fc_device_0_t; | |
| 1004 | ||
| 1005 | #define MPI_FC_DEVICE_PAGE_0_PAGEVERSION 0x02 | |
| 1006 | ||
| 1007 | #define MPI_FC_DEVICE_PAGE0_FLAGS_TARGETID_BUS_VALID 0x01 | |
| 1008 | ||
| 1009 | #define MPI_FC_DEVICE_PAGE_0_PROT_IP 0x01 | |
| 1010 | #define MPI_FC_DEVICE_PAGE_0_PROT_FCP_TARGET 0x02 | |
| 1011 | #define MPI_FC_DEVICE_PAGE_0_PROT_FCP_INITIATOR 0x04 | |
| 1012 | ||
| 1013 | #define MPI_FC_DEVICE_PAGE0_PGAD_PORT_MASK \ | |
| 1014 | (MPI_FC_DEVICE_PGAD_PORT_MASK) | |
| 1015 | #define MPI_FC_DEVICE_PAGE0_PGAD_FORM_MASK \ | |
| 1016 | (MPI_FC_DEVICE_PGAD_FORM_MASK) | |
| 1017 | #define MPI_FC_DEVICE_PAGE0_PGAD_FORM_NEXT_DID \ | |
| 1018 | (MPI_FC_DEVICE_PGAD_FORM_NEXT_DID) | |
| 1019 | #define MPI_FC_DEVICE_PAGE0_PGAD_FORM_BUS_TID \ | |
| 1020 | (MPI_FC_DEVICE_PGAD_FORM_BUS_TID) | |
| 1021 | #define MPI_FC_DEVICE_PAGE0_PGAD_DID_MASK \ | |
| 1022 | (MPI_FC_DEVICE_PGAD_ND_DID_MASK) | |
| 1023 | #define MPI_FC_DEVICE_PAGE0_PGAD_BUS_MASK \ | |
| 1024 | (MPI_FC_DEVICE_PGAD_BT_BUS_MASK) | |
| 1025 | #define MPI_FC_DEVICE_PAGE0_PGAD_BUS_SHIFT \ | |
| 1026 | (MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT) | |
| 1027 | #define MPI_FC_DEVICE_PAGE0_PGAD_TID_MASK \ | |
| 1028 | (MPI_FC_DEVICE_PGAD_BT_TID_MASK) | |
| 1029 | ||
| 1030 | /* | |
| 1031 | * RAID Volume Config Pages | |
| 1032 | */ | |
| 1033 | typedef struct raid_vol0_phys_disk { | |
| 1034 | uint16_t Reserved; | |
| 1035 | uint8_t PhysDiskMap; | |
| 1036 | uint8_t PhysDiskNum; | |
| 1037 | } raid_vol0_phys_disk_t; | |
| 1038 | ||
| 1039 | #define MPI_RAIDVOL0_PHYSDISK_PRIMARY 0x01 | |
| 1040 | #define MPI_RAIDVOL0_PHYSDISK_SECONDARY 0x02 | |
| 1041 | ||
| 1042 | typedef struct raid_vol0_status { | |
| 1043 | uint8_t Flags; | |
| 1044 | uint8_t State; | |
| 1045 | uint16_t Reserved; | |
| 1046 | } raid_vol0_status_t; | |
| 1047 | ||
| 1048 | /* | |
| 1049 | * RAID Volume Page 0 VolumeStatus defines | |
| 1050 | */ | |
| 1051 | #define MPI_RAIDVOL0_STATUS_FLAG_ENABLED 0x01 | |
| 1052 | #define MPI_RAIDVOL0_STATUS_FLAG_QUIESCED 0x02 | |
| 1053 | #define MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS 0x04 | |
| 1054 | #define MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE 0x08 | |
| 1055 | ||
| 1056 | #define MPI_RAIDVOL0_STATUS_STATE_OPTIMAL 0x00 | |
| 1057 | #define MPI_RAIDVOL0_STATUS_STATE_DEGRADED 0x01 | |
| 1058 | #define MPI_RAIDVOL0_STATUS_STATE_FAILED 0x02 | |
| 1059 | ||
| 1060 | typedef struct raid_vol0_settings { | |
| 1061 | uint16_t Settings; | |
| 1062 | uint8_t HotSparePool; | |
| 1063 | uint8_t Reserved; | |
| 1064 | } raid_vol0_settings_t; | |
| 1065 | ||
| 1066 | /* | |
| 1067 | * RAID Volume Page 0 VolumeSettings defines | |
| 1068 | */ | |
| 1069 | #define MPI_RAIDVOL0_SETTING_WRITE_CACHING_ENABLE 0x0001 | |
| 1070 | #define MPI_RAIDVOL0_SETTING_OFFLINE_ON_SMART 0x0002 | |
| 1071 | #define MPI_RAIDVOL0_SETTING_AUTO_CONFIGURE 0x0004 | |
| 1072 | #define MPI_RAIDVOL0_SETTING_PRIORITY_RESYNC 0x0008 | |
| 1073 | #define MPI_RAIDVOL0_SETTING_USE_PRODUCT_ID_SUFFIX 0x0010 | |
| 1074 | #define MPI_RAIDVOL0_SETTING_USE_DEFAULTS 0x8000 | |
| 1075 | ||
| 1076 | /* | |
| 1077 | * RAID Volume Page 0 HotSparePool defines, also used in RAID Physical Disk | |
| 1078 | */ | |
| 1079 | #define MPI_RAID_HOT_SPARE_POOL_0 0x01 | |
| 1080 | #define MPI_RAID_HOT_SPARE_POOL_1 0x02 | |
| 1081 | #define MPI_RAID_HOT_SPARE_POOL_2 0x04 | |
| 1082 | #define MPI_RAID_HOT_SPARE_POOL_3 0x08 | |
| 1083 | #define MPI_RAID_HOT_SPARE_POOL_4 0x10 | |
| 1084 | #define MPI_RAID_HOT_SPARE_POOL_5 0x20 | |
| 1085 | #define MPI_RAID_HOT_SPARE_POOL_6 0x40 | |
| 1086 | #define MPI_RAID_HOT_SPARE_POOL_7 0x80 | |
| 1087 | ||
| 1088 | /* | |
| 1089 | * Host code (drivers, BIOS, utilities, etc.) should leave this | |
| 1090 | * define set to one and check Header.PageLength at runtime. | |
| 1091 | */ | |
| 1092 | #ifndef MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX | |
| 1093 | #define MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX 1 | |
| 1094 | #endif | |
| 1095 | ||
| 1096 | typedef struct config_page_raid_vol_0 { | |
| 1097 | config_page_header_t Header; | |
| 1098 | uint8_t VolumeID; | |
| 1099 | uint8_t VolumeBus; | |
| 1100 | uint8_t VolumeIOC; | |
| 1101 | uint8_t VolumeType; | |
| 1102 | raid_vol0_status_t VolumeStatus; | |
| 1103 | raid_vol0_settings_t VolumeSettings; | |
| 1104 | uint32_t MaxLBA; | |
| 1105 | uint32_t Reserved1; | |
| 1106 | uint32_t StripeSize; | |
| 1107 | uint32_t Reserved2; | |
| 1108 | uint32_t Reserved3; | |
| 1109 | uint8_t NumPhysDisks; | |
| 1110 | uint8_t Reserved4; | |
| 1111 | uint16_t Reserved5; | |
| 1112 | raid_vol0_phys_disk_t PhysDisk[MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX]; | |
| 1113 | } config_page_raid_vol_0_t; | |
| 1114 | ||
| 1115 | #define MPI_RAIDVOLPAGE0_PAGEVERSION 0x00 | |
| 1116 | ||
| 1117 | /* | |
| 1118 | * RAID Physical Disk Config Pages | |
| 1119 | */ | |
| 1120 | typedef struct raid_phys_disk0_error_data { | |
| 1121 | uint8_t ErrorCdbByte; | |
| 1122 | uint8_t ErrorSenseKey; | |
| 1123 | uint16_t Reserved; | |
| 1124 | uint16_t ErrorCount; | |
| 1125 | uint8_t ErrorASC; | |
| 1126 | uint8_t ErrorASCQ; | |
| 1127 | uint16_t SmartCount; | |
| 1128 | uint8_t SmartASC; | |
| 1129 | uint8_t SmartASCQ; | |
| 1130 | } raid_phys_disk0_error_data_t; | |
| 1131 | ||
| 1132 | typedef struct raid_phys_disk_inquiry_data { | |
| 1133 | uint8_t VendorID[8]; | |
| 1134 | uint8_t ProductID[16]; | |
| 1135 | uint8_t ProductRevLevel[4]; | |
| 1136 | uint8_t Info[32]; | |
| 1137 | } raid_phys_disk0_inquiry_data_t; | |
| 1138 | ||
| 1139 | typedef struct raid_phys_disk0_settings { | |
| 1140 | uint8_t SepID; | |
| 1141 | uint8_t SepBus; | |
| 1142 | uint8_t HotSparePool; | |
| 1143 | uint8_t PhysDiskSettings; | |
| 1144 | } raid_phys_disk0_settings_t; | |
| 1145 | ||
| 1146 | typedef struct raid_phys_disk0_status { | |
| 1147 | uint8_t Flags; | |
| 1148 | uint8_t State; | |
| 1149 | uint16_t Reserved; | |
| 1150 | } raid_phys_disk0_status_t; | |
| 1151 | ||
| 1152 | /* | |
| 1153 | * RAID Volume 2 IM Physical Disk DiskStatus flags | |
| 1154 | */ | |
| 1155 | #define MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC 0x01 | |
| 1156 | #define MPI_PHYSDISK0_STATUS_FLAG_QUIESCED 0x02 | |
| 1157 | ||
| 1158 | #define MPI_PHYSDISK0_STATUS_ONLINE 0x00 | |
| 1159 | #define MPI_PHYSDISK0_STATUS_MISSING 0x01 | |
| 1160 | #define MPI_PHYSDISK0_STATUS_NOT_COMPATIBLE 0x02 | |
| 1161 | #define MPI_PHYSDISK0_STATUS_FAILED 0x03 | |
| 1162 | #define MPI_PHYSDISK0_STATUS_INITIALIZING 0x04 | |
| 1163 | #define MPI_PHYSDISK0_STATUS_OFFLINE_REQUESTED 0x05 | |
| 1164 | #define MPI_PHYSDISK0_STATUS_FAILED_REQUESTED 0x06 | |
| 1165 | #define MPI_PHYSDISK0_STATUS_OTHER_OFFLINE 0xFF | |
| 1166 | ||
| 1167 | typedef struct config_page_raid_phys_disk_0 { | |
| 1168 | config_page_header_t Header; | |
| 1169 | uint8_t PhysDiskID; | |
| 1170 | uint8_t PhysDiskBus; | |
| 1171 | uint8_t PhysDiskIOC; | |
| 1172 | uint8_t PhysDiskNum; | |
| 1173 | raid_phys_disk0_settings_t PhysDiskSettings; | |
| 1174 | uint32_t Reserved1; | |
| 1175 | uint32_t Reserved2; | |
| 1176 | uint32_t Reserved3; | |
| 1177 | uint8_t DiskIdentifier[16]; | |
| 1178 | raid_phys_disk0_inquiry_data_t InquiryData; | |
| 1179 | raid_phys_disk0_status_t PhysDiskStatus; | |
| 1180 | uint32_t MaxLBA; | |
| 1181 | raid_phys_disk0_error_data_t ErrorData; | |
| 1182 | } config_page_raid_phys_disk_0_t; | |
| 1183 | ||
| 1184 | #define MPI_RAIDPHYSDISKPAGE0_PAGEVERSION 0x00 | |
| 1185 | ||
| 1186 | /* | |
| 1187 | * LAN Config Pages | |
| 1188 | */ | |
| 1189 | typedef struct config_page_lan_0 { | |
| 1190 | config_page_header_t Header; | |
| 1191 | uint16_t TxRxModes; | |
| 1192 | uint16_t Reserved; | |
| 1193 | uint32_t PacketPrePad; | |
| 1194 | } config_page_lan_0_t; | |
| 1195 | ||
| 1196 | #define MPI_LAN_PAGE0_PAGEVERSION 0x01 | |
| 1197 | ||
| 1198 | #define MPI_LAN_PAGE0_RETURN_LOOPBACK 0x0000 | |
| 1199 | #define MPI_LAN_PAGE0_SUPPRESS_LOOPBACK 0x0001 | |
| 1200 | #define MPI_LAN_PAGE0_LOOPBACK_MASK 0x0001 | |
| 1201 | ||
| 1202 | typedef struct config_page_lan_1 { | |
| 1203 | config_page_header_t Header; | |
| 1204 | uint16_t Reserved; | |
| 1205 | uint8_t CurrentDeviceState; | |
| 1206 | uint8_t Reserved1; | |
| 1207 | uint32_t MinPacketSize; | |
| 1208 | uint32_t MaxPacketSize; | |
| 1209 | uint32_t HardwareAddressLow; | |
| 1210 | uint32_t HardwareAddressHigh; | |
| 1211 | uint32_t MaxWireSpeedLow; | |
| 1212 | uint32_t MaxWireSpeedHigh; | |
| 1213 | uint32_t BucketsRemaining; | |
| 1214 | uint32_t MaxReplySize; | |
| 1215 | uint32_t NegWireSpeedLow; | |
| 1216 | uint32_t NegWireSpeedHigh; | |
| 1217 | } config_page_lan_1_t; | |
| 1218 | ||
| 1219 | #define MPI_LAN_PAGE1_PAGEVERSION 0x03 | |
| 1220 | ||
| 1221 | #define MPI_LAN_PAGE1_DEV_STATE_RESET 0x00 | |
| 1222 | #define MPI_LAN_PAGE1_DEV_STATE_OPERATIONAL 0x01 | |
| 1223 | ||
| 1224 | /* | |
| 1225 | * Inband config pages | |
| 1226 | */ | |
| 1227 | typedef struct config_page_inband_0 { | |
| 1228 | config_page_header_t Header; | |
| 1229 | mpi_version_format_t InbandVersion; | |
| 1230 | uint16_t MaximumBuffers; | |
| 1231 | uint16_t Reserved1; | |
| 1232 | } config_page_inband_0_t; | |
| 1233 | ||
| 1234 | /* | |
| 1235 | * SAS IO Unit config pages | |
| 1236 | */ | |
| 1237 | typedef struct mpi_sas_io_unit0_phy_data { | |
| 1238 | uint8_t Port; | |
| 1239 | uint8_t PortFlags; | |
| 1240 | uint8_t PhyFlags; | |
| 1241 | uint8_t NegotiatedLinkRate; | |
| 1242 | uint32_t ControllerPhyDeviceInfo; | |
| 1243 | uint16_t AttachedDeviceHandle; | |
| 1244 | uint16_t ControllerDevHandle; | |
| 1245 | uint32_t Reserved2; | |
| 1246 | } mpi_sas_io_unit0_phy_data_t; | |
| 1247 | ||
| 1248 | /* | |
| 1249 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | |
| 1250 | * one and check Header.PageLength at runtime. | |
| 1251 | */ | |
| 1252 | #ifndef MPI_SAS_IOUNIT0_PHY_MAX | |
| 1253 | #define MPI_SAS_IOUNIT0_PHY_MAX 1 | |
| 1254 | #endif | |
| 1255 | ||
| 1256 | typedef struct config_page_sas_io_unit_0 { | |
| 1257 | config_extended_page_header_t Header; | |
| 1258 | uint32_t Reserved1; | |
| 1259 | uint8_t NumPhys; | |
| 1260 | uint8_t Reserved2; | |
| 1261 | uint16_t Reserved3; | |
| 1262 | mpi_sas_io_unit0_phy_data_t PhyData[MPI_SAS_IOUNIT0_PHY_MAX]; | |
| 1263 | } config_page_sas_io_unit_0_t; | |
| 1264 | ||
| 1265 | #define MPI_SASIOUNITPAGE0_PAGEVERSION 0x00 | |
| 1266 | ||
| 1267 | #define MPI_SAS_IOUNIT0_PORT_FLAGS_DISCOVERY_IN_PROGRESS 0x08 | |
| 1268 | #define MPI_SAS_IOUNIT0_PORT_FLAGS_0_TARGET_IOC_NUM 0x00 | |
| 1269 | #define MPI_SAS_IOUNIT0_PORT_FLAGS_1_TARGET_IOC_NUM 0x04 | |
| 1270 | #define MPI_SAS_IOUNIT0_PORT_FLAGS_WAIT_FOR_PORTENABLE 0x02 | |
| 1271 | #define MPI_SAS_IOUNIT0_PORT_FLAGS_AUTO_PORT_CONFIG 0x01 | |
| 1272 | ||
| 1273 | #define MPI_SAS_IOUNIT0_PHY_FLAGS_PHY_DISABLED 0x04 | |
| 1274 | #define MPI_SAS_IOUNIT0_PHY_FLAGS_TX_INVERT 0x02 | |
| 1275 | #define MPI_SAS_IOUNIT0_PHY_FLAGS_RX_INVERT 0x01 | |
| 1276 | ||
| 1277 | #define MPI_SAS_IOUNIT0_RATE_UNKNOWN 0x00 | |
| 1278 | #define MPI_SAS_IOUNIT0_RATE_PHY_DISABLED 0x01 | |
| 1279 | #define MPI_SAS_IOUNIT0_RATE_FAILED_SPEED_NEGOTIATION 0x02 | |
| 1280 | #define MPI_SAS_IOUNIT0_RATE_SATA_OOB_COMPLETE 0x03 | |
| 1281 | #define MPI_SAS_IOUNIT0_RATE_1_5 0x08 | |
| 1282 | #define MPI_SAS_IOUNIT0_RATE_3_0 0x09 | |
| 1283 | ||
| 1284 | typedef struct mpi_sas_io_unit1_phy_data { | |
| 1285 | uint8_t Port; | |
| 1286 | uint8_t PortFlags; | |
| 1287 | uint8_t PhyFlags; | |
| 1288 | uint8_t MaxMinLinkRate; | |
| 1289 | uint32_t ControllerPhyDeviceInfo; | |
| 1290 | uint32_t Reserved1; | |
| 1291 | } mpi_sas_io_unit1_phy_data_t; | |
| 1292 | ||
| 1293 | /* | |
| 1294 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | |
| 1295 | * one and check Header.PageLength at runtime. | |
| 1296 | */ | |
| 1297 | #ifndef MPI_SAS_IOUNIT1_PHY_MAX | |
| 1298 | #define MPI_SAS_IOUNIT1_PHY_MAX 1 | |
| 1299 | #endif | |
| 1300 | ||
| 1301 | typedef struct config_page_sas_io_unit_1 { | |
| 1302 | config_extended_page_header_t Header; | |
| 1303 | uint32_t Reserved1; | |
| 1304 | uint8_t NumPhys; | |
| 1305 | uint8_t Reserved2; | |
| 1306 | uint16_t Reserved3; | |
| 1307 | mpi_sas_io_unit1_phy_data_t PhyData[MPI_SAS_IOUNIT1_PHY_MAX]; | |
| 1308 | } config_page_sas_io_unit_1_t; | |
| 1309 | ||
| 1310 | #define MPI_SASIOUNITPAGE1_PAGEVERSION 0x00 | |
| 1311 | ||
| 1312 | #define MPI_SAS_IOUNIT1_PORT_FLAGS_0_TARGET_IOC_NUM 0x00 | |
| 1313 | #define MPI_SAS_IOUNIT1_PORT_FLAGS_1_TARGET_IOC_NUM 0x04 | |
| 1314 | #define MPI_SAS_IOUNIT1_PORT_FLAGS_WAIT_FOR_PORTENABLE 0x02 | |
| 1315 | #define MPI_SAS_IOUNIT1_PORT_FLAGS_AUTO_PORT_CONFIG 0x01 | |
| 1316 | ||
| 1317 | #define MPI_SAS_IOUNIT1_PHY_FLAGS_PHY_DISABLE 0x04 | |
| 1318 | #define MPI_SAS_IOUNIT1_PHY_FLAGS_TX_INVERT 0x02 | |
| 1319 | #define MPI_SAS_IOUNIT1_PHY_FLAGS_RX_INVERT 0x01 | |
| 1320 | ||
| 1321 | #define MPI_SAS_IOUNIT1_MAX_RATE_MASK 0xF0 | |
| 1322 | #define MPI_SAS_IOUNIT1_MAX_RATE_1_5 0x80 | |
| 1323 | #define MPI_SAS_IOUNIT1_MAX_RATE_3_0 0x90 | |
| 1324 | #define MPI_SAS_IOUNIT1_MIN_RATE_MASK 0x0F | |
| 1325 | #define MPI_SAS_IOUNIT1_MIN_RATE_1_5 0x08 | |
| 1326 | #define MPI_SAS_IOUNIT1_MIN_RATE_3_0 0x09 | |
| 1327 | ||
| 1328 | typedef struct config_page_sas_io_unit_2 { | |
| 1329 | config_extended_page_header_t Header; | |
| 1330 | uint32_t Reserved1; | |
| 1331 | uint16_t MaxPersistentIDs; | |
| 1332 | uint16_t NumPersistentIDsUsed; | |
| 1333 | uint8_t Status; | |
| 1334 | uint8_t Flags; | |
| 1335 | uint16_t Reserved2; | |
| 1336 | } config_page_sas_io_unit_2_t; | |
| 1337 | ||
| 1338 | #define MPI_SASIOUNITPAGE2_PAGEVERSION 0x00 | |
| 1339 | ||
| 1340 | #define MPI_SAS_IOUNIT2_STATUS_DISABLED_PERSISTENT_MAPPINGS 0x02 | |
| 1341 | #define MPI_SAS_IOUNIT2_STATUS_FULL_PERSISTENT_MAPPINGS 0x01 | |
| 1342 | ||
| 1343 | #define MPI_SAS_IOUNIT2_FLAGS_DISABLE_PERSISTENT_MAPPINGS 0x01 | |
| 1344 | ||
| 1345 | ||
| 1346 | typedef struct config_page_sas_io_unit_3 { | |
| 1347 | config_extended_page_header_t Header; | |
| 1348 | uint32_t Reserved1; | |
| 1349 | uint32_t MaxInvalidDwordCount; | |
| 1350 | uint32_t InvalidDwordCountTime; | |
| 1351 | uint32_t MaxRunningDisparityErrorCount; | |
| 1352 | uint32_t RunningDisparityErrorTime; | |
| 1353 | uint32_t MaxLossDwordSynchCount; | |
| 1354 | uint32_t LossDwordSynchCountTime; | |
| 1355 | uint32_t MaxPhyResetProblemCount; | |
| 1356 | uint32_t PhyResetProblemTime; | |
| 1357 | } config_page_sas_io_unit_3_t; | |
| 1358 | ||
| 1359 | #define MPI_SASIOUNITPAGE3_PAGEVERSION 0x00 | |
| 1360 | ||
| 1361 | typedef struct config_page_sas_expander_0 { | |
| 1362 | config_extended_page_header_t Header; | |
| 1363 | uint32_t Reserved1; | |
| 1364 | uint64_t SASAddress; | |
| 1365 | uint32_t Reserved2; | |
| 1366 | uint16_t DevHandle; | |
| 1367 | uint16_t ParentDevHandle; | |
| 1368 | uint16_t ExpanderChangeCount; | |
| 1369 | uint16_t ExpanderRouteIndexes; | |
| 1370 | uint8_t NumPhys; | |
| 1371 | uint8_t SASLevel; | |
| 1372 | uint8_t Flags; | |
| 1373 | uint8_t Reserved3; | |
| 1374 | } config_page_sas_expander_0_t; | |
| 1375 | ||
| 1376 | #define MPI_SASEXPANDER0_PAGEVERSION 0x00 | |
| 1377 | ||
| 1378 | #define MPI_SAS_EXPANDER0_FLAGS_ROUTE_TABLE_CONFIG 0x02 | |
| 1379 | #define MPI_SAS_EXPANDER0_FLAGS_CONFIG_IN_PROGRESS 0x01 | |
| 1380 | ||
| 1381 | ||
| 1382 | typedef struct config_page_sas_expander_1 { | |
| 1383 | config_extended_page_header_t Header; | |
| 1384 | uint32_t Reserved1; | |
| 1385 | uint8_t NumPhys; | |
| 1386 | uint8_t Phy; | |
| 1387 | uint16_t Reserved2; | |
| 1388 | uint8_t ProgrammedLinkRate; | |
| 1389 | uint8_t HwLinkRate; | |
| 1390 | uint16_t AttachedDevHandle; | |
| 1391 | uint32_t PhyInfo; | |
| 1392 | uint32_t AttachedDeviceInfo; | |
| 1393 | uint16_t OwnerDevHandle; | |
| 1394 | uint8_t ChangeCount; | |
| 1395 | uint8_t Reserved3; | |
| 1396 | uint8_t PhyIdentifier; | |
| 1397 | uint8_t AttachedPhyIdentifier; | |
| 1398 | uint8_t NumTableEntriesProg; | |
| 1399 | uint8_t DiscoveryInfo; | |
| 1400 | uint32_t Reserved4; | |
| 1401 | } config_page_sas_expander_1_t; | |
| 1402 | ||
| 1403 | #define MPI_SASEXPANDER1_PAGEVERSION 0x00 | |
| 1404 | ||
| 1405 | /* use MPI_SAS_PHY0_PRATE_ defines for ProgrammedLinkRate */ | |
| 1406 | ||
| 1407 | /* use MPI_SAS_PHY0_HWRATE_ defines for HwLinkRate */ | |
| 1408 | ||
| 1409 | /* use MPI_SAS_PHY0_PHYINFO_ defines for PhyInfo */ | |
| 1410 | ||
| 1411 | /* see mpi_sas.h for values for SAS Expander Page 1 AttachedDeviceInfo values */ | |
| 1412 | ||
| 1413 | /* values for SAS Expander Page 1 DiscoveryInfo field */ | |
| 1414 | #define MPI_SAS_EXPANDER1_DISCINFO_LINK_STATUS_CHANGE 0x02 | |
| 1415 | #define MPI_SAS_EXPANDER1_DISCINFO_NO_ROUTING_ENTRIES 0x01 | |
| 1416 | ||
| 1417 | typedef struct config_page_sas_device_0 { | |
| 1418 | config_extended_page_header_t Header; | |
| 1419 | uint32_t Reserved1; | |
| 1420 | uint32_t SASAddress_L; | |
| 1421 | uint32_t SASAddress_H; | |
| 1422 | uint32_t Reserved2; | |
| 1423 | uint16_t DevHandle; | |
| 1424 | uint8_t TargetID; | |
| 1425 | uint8_t Bus; | |
| 1426 | uint32_t DeviceInfo; | |
| 1427 | uint16_t Flags; | |
| 1428 | uint8_t PhysicalPort; | |
| 1429 | uint8_t Reserved3; | |
| 1430 | } config_page_sas_device_0_t; | |
| 1431 | ||
| 1432 | #define MPI_SASDEVICE0_PAGEVERSION 0x00 | |
| 1433 | ||
| 1434 | #define MPI_SAS_DEVICE0_FLAGS_MAPPING_PERSISTENT 0x04 | |
| 1435 | #define MPI_SAS_DEVICE0_FLAGS_DEVICE_MAPPED 0x02 | |
| 1436 | #define MPI_SAS_DEVICE0_FLAGS_DEVICE_PRESENT 0x01 | |
| 1437 | ||
| 1438 | typedef struct config_page_sas_device_1 { | |
| 1439 | config_extended_page_header_t Header; | |
| 1440 | uint32_t Reserved1; | |
| 1441 | uint32_t SASAddress_L; | |
| 1442 | uint32_t SASAddress_H; | |
| 1443 | uint32_t Reserved2; | |
| 1444 | uint16_t DevHandle; | |
| 1445 | uint8_t TargetID; | |
| 1446 | uint8_t Bus; | |
| 1447 | uint8_t InitialRegDeviceFIS[20]; | |
| 1448 | } config_page_sas_device_1_t; | |
| 1449 | ||
| 1450 | #define MPI_SASDEVICE1_PAGEVERSION 0x00 | |
| 1451 | ||
| 1452 | typedef struct config_page_sas_phy_0 { | |
| 1453 | config_extended_page_header_t Header; | |
| 1454 | uint32_t Reserved1; | |
| 1455 | uint32_t SASAddress_L; | |
| 1456 | uint32_t SASAddress_H; | |
| 1457 | uint16_t AttachedDevHandle; | |
| 1458 | uint8_t AttachedPhyIdentifier; | |
| 1459 | uint8_t Reserved2; | |
| 1460 | uint32_t AttachedDeviceInfo; | |
| 1461 | uint8_t ProgrammedLinkRate; | |
| 1462 | uint8_t HwLinkRate; | |
| 1463 | uint8_t ChangeCount; | |
| 1464 | uint8_t Reserved3; | |
| 1465 | uint32_t PhyInfo; | |
| 1466 | } config_page_sas_phy_0_t; | |
| 1467 | ||
| 1468 | #define MPI_SASPHY0_PAGEVERSION 0x00 | |
| 1469 | ||
| 1470 | #define MPI_SAS_PHY0_PRATE_MAX_RATE_MASK 0xF0 | |
| 1471 | #define MPI_SAS_PHY0_PRATE_MAX_RATE_NOT_PROGRAMMABLE 0x00 | |
| 1472 | #define MPI_SAS_PHY0_PRATE_MAX_RATE_1_5 0x80 | |
| 1473 | #define MPI_SAS_PHY0_PRATE_MAX_RATE_3_0 0x90 | |
| 1474 | #define MPI_SAS_PHY0_PRATE_MIN_RATE_MASK 0x0F | |
| 1475 | #define MPI_SAS_PHY0_PRATE_MIN_RATE_NOT_PROGRAMMABLE 0x00 | |
| 1476 | #define MPI_SAS_PHY0_PRATE_MIN_RATE_1_5 0x08 | |
| 1477 | #define MPI_SAS_PHY0_PRATE_MIN_RATE_3_0 0x09 | |
| 1478 | ||
| 1479 | #define MPI_SAS_PHY0_HWRATE_MAX_RATE_MASK 0xF0 | |
| 1480 | #define MPI_SAS_PHY0_HWRATE_MAX_RATE_1_5 0x80 | |
| 1481 | #define MPI_SAS_PHY0_HWRATE_MAX_RATE_3_0 0x90 | |
| 1482 | #define MPI_SAS_PHY0_HWRATE_MIN_RATE_MASK 0x0F | |
| 1483 | #define MPI_SAS_PHY0_HWRATE_MIN_RATE_1_5 0x08 | |
| 1484 | #define MPI_SAS_PHY0_HWRATE_MIN_RATE_3_0 0x09 | |
| 1485 | ||
| 1486 | #define MPI_SAS_PHY0_PHYINFO_SATA_PORT_ACTIVE 0x00004000 | |
| 1487 | #define MPI_SAS_PHY0_PHYINFO_SATA_PORT_SELECTOR 0x00002000 | |
| 1488 | #define MPI_SAS_PHY0_PHYINFO_VIRTUAL_PHY 0x00001000 | |
| 1489 | ||
| 1490 | #define MPI_SAS_PHY0_PHYINFO_MASK_PARTIAL_PATHWAY_TIME 0x00000F00 | |
| 1491 | #define MPI_SAS_PHY0_PHYINFO_SHIFT_PARTIAL_PATHWAY_TIME 8 | |
| 1492 | ||
| 1493 | #define MPI_SAS_PHY0_PHYINFO_MASK_ROUTING_ATTRIBUTE 0x000000F0 | |
| 1494 | #define MPI_SAS_PHY0_PHYINFO_DIRECT_ROUTING 0x00000000 | |
| 1495 | #define MPI_SAS_PHY0_PHYINFO_SUBTRACTIVE_ROUTING 0x00000010 | |
| 1496 | #define MPI_SAS_PHY0_PHYINFO_TABLE_ROUTING 0x00000020 | |
| 1497 | ||
| 1498 | #define MPI_SAS_PHY0_PHYINFO_MASK_LINK_RATE 0x0000000F | |
| 1499 | #define MPI_SAS_PHY0_PHYINFO_UNKNOWN_LINK_RATE 0x00000000 | |
| 1500 | #define MPI_SAS_PHY0_PHYINFO_PHY_DISABLED 0x00000001 | |
| 1501 | #define MPI_SAS_PHY0_PHYINFO_NEGOTIATION_FAILED 0x00000002 | |
| 1502 | #define MPI_SAS_PHY0_PHYINFO_SATA_OOB_COMPLETE 0x00000003 | |
| 1503 | #define MPI_SAS_PHY0_PHYINFO_RATE_1_5 0x00000008 | |
| 1504 | #define MPI_SAS_PHY0_PHYINFO_RATE_3_0 0x00000009 | |
| 1505 | ||
| 1506 | typedef struct config_page_sas_phy_1 { | |
| 1507 | config_extended_page_header_t Header; | |
| 1508 | uint32_t Reserved1; | |
| 1509 | uint32_t InvalidDwordCount; | |
| 1510 | uint32_t RunningDisparityErrorCount; | |
| 1511 | uint32_t LossDwordSynchCount; | |
| 1512 | uint32_t PhyResetProblemCount; | |
| 1513 | } config_page_sas_phy_1_t; | |
| 1514 | ||
| 1515 | #define MPI_SASPHY1_PAGEVERSION 0x00 | |
| 1516 | ||
| 1517 | #ifdef __cplusplus | |
| 1518 | } | |
| 1519 | #endif | |
| 1520 | ||
| 1521 | #endif /* _SYS_MPI_CNFG_H */ |