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1 | <!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML//EN"> |
2 | <html> | |
3 | <head> | |
4 | <title>SPARC Architectural Model: User Commands</title> | |
5 | </head> | |
6 | <body bgcolor="#FFFFFF" LANG="en-US"> | |
7 | <div STYLE="margin-bottom: 0cm"></div> | |
8 | ||
9 | <h2> | |
10 | pregs | |
11 | </h2> | |
12 | ||
13 | <h4> | |
14 | NAME | |
15 | </h4> | |
16 | <ul> | |
17 | pregs - print cpu architecture registers | |
18 | </ul> | |
19 | ||
20 | <h4>SYNOPSIS</h4> | |
21 | <tt> | |
22 | <ul> | |
23 | pregs [-w|-g|-f|-df|-pr|-asr|-hpr|-trap] | |
24 | [-cpu <i>cpu_set</i>] | |
25 | [-cwp <i>window-pointer</i>] [-gl <i>global-level</i>] [-tl <i>trap-level</i>] | |
26 | </ul> | |
27 | </tt> | |
28 | ||
29 | <h4>DESCRIPTION</h4> | |
30 | <ul> | |
31 | Prints cpu registers. | |
32 | <p> | |
33 | By default, only the registers of the cpu specified by <a | |
34 | href="cmd_pselect.html">pselect</a> are printed. | |
35 | The <a href="flag_cpu.html">-cpu</a> flag may be used to override this. | |
36 | <p> | |
37 | The -w ,-g, -f, -df, -pr, -asr, -hpr, and -trap flags select which | |
38 | registers are printed. If none of these are given, pregs prints the | |
39 | windowed and global registers plus the pc, npc, tt, tl, gl, cwp, | |
40 | pstate, and hpstate registers. | |
41 | <p> | |
42 | The -w ,-g, -f, -df, -asr, -pr, -hpr, and -trap flags may be used in | |
43 | any combination. The registers they output are as follows: | |
44 | <br><br> | |
45 | <table cellpadding=5%> | |
46 | <tr> | |
47 | <th>Flag</th><th>Register Set</i></th> | |
48 | </tr> | |
49 | <tr> | |
50 | <td valign="top">-w</td><td>The windowed registers: i0-i7, o0-o7, l0-l7</td> | |
51 | </tr> | |
52 | <tr> | |
53 | <td valign="top">-g</td><td>The global registers: g0-g7</td> | |
54 | </tr> | |
55 | <tr> | |
56 | <td valign="top">-f</td><td>The single precision floating point | |
57 | registers: f0-f31 and fsr</td> | |
58 | </tr> | |
59 | <tr> | |
60 | <td valign="top">-df</td><td>The double precision floating point | |
61 | registers: d0-d62 and fsr</td> | |
62 | </tr> | |
63 | <tr> | |
64 | <td valign="top">-asr</td><td>ASR related registers: | |
65 | y, ccr, asi, tick, pc, fprs, pcr, pic, gsr, softint_set, softint_clr, | |
66 | softint, tick_cmpr, stick, and stick_cmpr | |
67 | </td> | |
68 | </tr> | |
69 | <tr> | |
70 | <td valign="top">-pr</td><td>Privileged registers: | |
71 | tpc, tnpc, tstate, tt, pr_tick, tba, pstate, tl, pil, cwp, | |
72 | cansave, canrestore, cleanwin, otherwin, wstate, and gl | |
73 | </td> | |
74 | </tr> | |
75 | <tr> | |
76 | <td valign="top">-hpr</td><td>Hyperprivileged registers: | |
77 | hpstate, htstate, hintp, htba, hver, and hstick_cmpr</td> | |
78 | </tr> | |
79 | <tr> | |
80 | <td valign="top">-trap</td><td>Trap related registers: tpc, tnpc, tstate, tt, pstate, | |
81 | tl, cwp, gl</td> | |
82 | </tr> | |
83 | </table><br> | |
84 | <p> | |
85 | By default, the current cwp register, global level, and trap level are | |
86 | used to access windowed registers, global registers, and trap | |
87 | registers, respectively. | |
88 | <br><br> | |
89 | <table cellpadding=5%> | |
90 | <tr> | |
91 | <th>Flag</th><th>Behavior</i></th> | |
92 | </tr> | |
93 | <tr> | |
94 | <td valign="top">-cwp <i>window-pointer</i></td><td>Sets the register window used to access | |
95 | windowed registers</td> | |
96 | </tr> | |
97 | <tr> | |
98 | <td valign="top">-gl <i>global-level</i></td><td>Sets the global level used to access global | |
99 | registers</td> | |
100 | </tr> | |
101 | <tr> | |
102 | <td valign="top">-tl <i>trap-level</i></td><td>Sets the trap level used to access trap | |
103 | registers</td> | |
104 | </tr> | |
105 | </table> | |
106 | </ul> | |
107 | ||
108 | <h4>RETURN VALUES</h4> | |
109 | <ul> | |
110 | Print the value of cpu architecture registers. | |
111 | </ul> | |
112 | ||
113 | <h4>SEE ALSO</h4> | |
114 | <ul><a href="cmd_read-reg.html">read-reg</a></ul> | |
115 | ||
116 | <hr> | |
117 | </body> | |
118 | </html> |