Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / sam-t2 / sam / include / BL_Memory.h
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: BL_Memory.h
5* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
6* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
7*
8* The above named program is free software; you can redistribute it and/or
9* modify it under the terms of the GNU General Public
10* License version 2 as published by the Free Software Foundation.
11*
12* The above named program is distributed in the hope that it will be
13* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
14* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15* General Public License for more details.
16*
17* You should have received a copy of the GNU General Public
18* License along with this work; if not, write to the Free Software
19* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
20*
21* ========== Copyright Header End ============================================
22*/
23#ifndef __BL_Memory_h__
24#define __BL_Memory_h__
25
26/* Common Memory Interface - All Memory implementations *MUST*
27 derive from this abstract base class
28 -- This Memory abstraction is a step in the direction of one
29 single build for all memory flavours
30 -- API Supports simple Memory implementations like Sparse memory
31 model as well as exotic ones like Chip-kill memory model
32 -- Performance lost due to virtualization of methods can be
33 recovered by suitable downcasts and derived class
34 qualifications
35*/
36
37
38class BL_Memory
39{
40 public:
41
42 // Supported Fetch Operation (instruction fetch)
43
44 virtual uint32_t fetch32( uint64_t addr )=0;
45 virtual void fetch256( uint64_t addr, uint64_t data[4] )=0;
46 virtual void fetch512( uint64_t addr, uint64_t data[8] )=0;
47
48 // Supported Store Operations. st8(), st16(), st32() and st64() are gueranteed to be atomic.
49 // st128() and st512() are atomic per 64bit quantity.
50
51 virtual void st8( uint64_t addr, uint8_t data )=0;
52 virtual void st16( uint64_t addr, uint16_t data )=0;
53 virtual void st32( uint64_t addr, uint32_t data )=0;
54 virtual void st64( uint64_t addr, uint64_t data )=0;
55 virtual void st128( uint64_t addr, uint64_t data[2] )=0;
56 virtual void st512( uint64_t addr, uint64_t data[8] )=0;
57
58 // Supported Load Operations. ld8[su]() to ld64() are quaranteed to be atomic. ld128() and
59 // above are atomic at the 64 bit granularity.
60
61 virtual uint8_t ld8u ( uint64_t addr )=0;
62 virtual int8_t ld8s( uint64_t addr )=0;
63 virtual uint16_t ld16u( uint64_t addr )=0;
64 virtual int16_t ld16s( uint64_t addr )=0;
65 virtual uint32_t ld32u( uint64_t addr )=0;
66 virtual int32_t ld32s( uint64_t addr )=0;
67 virtual uint64_t ld64( uint64_t addr )=0;
68 virtual void ld128( uint64_t addr, uint64_t data[2] )=0;
69 virtual void ld512( uint64_t addr, uint64_t data[8] )=0;
70 virtual void ld256( uint64_t addr, uint64_t data[4] )=0;
71
72 // st64partial() performs 8 byte partial store. The bytes to store are specified by mask. A 1 in bit N of
73 // mask denotes that byte (data >> (8*N)) & 0xff should be written to memory
74
75 virtual void st64partial( uint64_t addr, uint64_t data, uint64_t mask )=0;
76
77 // ld128atomic() (aka load twin double, load quad atomic) atomically loads two
78 // 64bit values from memory at addr into rd. rd[0] is the value at addr, rd[1]
79 // is the value at addr + 8. Note ld128 does() not guarantee atomicity.
80
81 virtual void ld128atomic( uint64_t addr, uint64_t data[2] )=0;
82
83 // ldstub() return a byte from memory at addr, and set the byte at addr
84 // to 0xff. The ldstub() operation is atomic.
85
86 virtual uint8_t ldstub( uint64_t addr )=0;
87
88 // swap() stores the 32bit value rd with the 32bit value at addr.
89 // The old 32bit value at addr is returned. The operation is atomic.
90
91 virtual uint32_t swap( uint64_t addr, uint32_t rd )=0;
92
93 // casx() compares the 64bit value rs2 with the 64bit value at addr.
94 // If the two values are equal, the value rd is stored in the
95 // 64bit value at addr. In both cases the old 64bit value at addr is
96 // returned, that is the value at addr before the storei happened.
97 // The casx() operation is atomic.
98
99 virtual uint64_t casx( uint64_t addr, uint64_t rd, uint64_t rs2 )=0;
100
101 // cas() is as casx, but for 32bit.
102
103 virtual uint32_t cas( uint64_t addr, uint32_t rd, uint32_t rs2 )=0;
104
105 // flush() writes dirty data in the cache back to memory.
106
107 virtual void flush( uint64_t addr, uint_t size ){} // process does not provide data.
108
109};
110
111#endif /* __BL_Memory_h__ */