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Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / sam-t2 / sam / system / mem / SS_Memory.s
CommitLineData
920dae64
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: SS_Memory.s
5* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
6* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
7*
8* The above named program is free software; you can redistribute it and/or
9* modify it under the terms of the GNU General Public
10* License version 2 as published by the Free Software Foundation.
11*
12* The above named program is distributed in the hope that it will be
13* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
14* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15* General Public License for more details.
16*
17* You should have received a copy of the GNU General Public
18* License along with this work; if not, write to the Free Software
19* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
20*
21* ========== Copyright Header End ============================================
22*/
23
24#if defined(ARCH_X64)
25
26/*============================================================================*\
27 * For AMD64 ABI documentation, visit http://www.x86-64.org
28\*============================================================================*/
29
30 .text
31
32/*============================================================================*\
33 * uint8_t ss_ldstub( void* base, uint64_t ofs )
34\*============================================================================*/
35 .align 16
36 .globl ss_ldstub
37 .type ss_ldstub, @function
38ss_ldstub:
39 addq %rsi,%rdi
40 movb $0xff,%al
41 lock
42 xchgb (%rdi),%al
43 ret
44 .size ss_ldstub, [.-ss_ldstub]
45
46/*============================================================================*\
47 * uint32_t ss_swap( uint32_t rd, void* base, uint64_t ofs )
48\*============================================================================*/
49 .align 16
50 .globl ss_swap
51 .type ss_swap, @function
52ss_swap:
53 addq %rdx,%rsi
54 bswapl %edi
55 lock
56 xchgl (%rsi),%edi
57 bswapl %edi
58 movl %edi,%eax
59 ret
60 .size ss_swap, [.-ss_swap]
61
62/*============================================================================*\
63 * uint32_t ss_cas( uint32_t rd, void* base, uint32_t rs2 )
64\*============================================================================*/
65 .align 16
66 .globl ss_cas
67 .type ss_cas, @function
68ss_cas:
69 movl %edx,%eax
70 bswapl %edi
71 bswapl %eax
72 lock
73 cmpxchgl %edi,(%rsi)
74 bswapl %eax
75 ret
76 .size ss_cas, [.-ss_cas]
77
78/*============================================================================*\
79 * uint64_t ss_casx( uint64_t rd, void* base, uint64_t rs2 )
80\*============================================================================*/
81 .align 16
82 .globl ss_casx
83 .type ss_casx, @function
84ss_casx:
85 movq %rdx,%rax
86 bswapq %rdi
87 bswapq %rax
88 lock
89 cmpxchgq %rdi,(%rsi)
90 bswapq %rax
91 ret
92 .size ss_casx, [.-ss_casx]
93
94/*============================================================================*\
95 * void ss_stp8( double rd, void* base, uint64_t mask )
96 * The mask register:
97 * SPARC:
98 * bits 76543210
99 * mask for byte 7 --------^^^^^^^^
100 * mask for byte 6 ---------+||||||
101 * mask for byte 5 ----------+|||||
102 * mask for byte 4 -----------+||||
103 * mask for byte 3 ------------+|||
104 * mask for byte 2 -------------+||
105 * mask for byte 1 --------------+|
106 * mask for byte 0 ---------------+
107 * AMD64:
108 * bits 65433210
109 * 35791357
110 * mask for byte 7 --------^^^^^^^^
111 * mask for byte 6 ---------+||||||
112 * mask for byte 5 ----------+|||||
113 * mask for byte 4 -----------+||||
114 * mask for byte 3 ------------+|||
115 * mask for byte 2 -------------+||
116 * mask for byte 1 --------------+|
117 * mask for byte 0 ---------------+
118\*============================================================================*/
119 .align 16
120 .globl ss_stp8
121 .type ss_stp8, @function
122ss_stp8:
123 shlq $0x7,%rsi
124 movq %rsi,%r8
125 shlq $0x7,%rsi
126 orq %rsi,%r8
127 shlq $0x7,%rsi
128 orq %rsi,%r8
129 shlq $0x7,%rsi
130 orq %rsi,%r8
131 shlq $0x7,%rsi
132 orq %rsi,%r8
133 shlq $0x7,%rsi
134 orq %rsi,%r8
135 shlq $0x7,%rsi
136 orq %rsi,%r8
137 shlq $0x7,%rsi
138 orq %rsi,%r8
139 bswapq %r8 /* byte swap the mask */
140 movdq %r8,%mm1
141 movdq %xmm0,%r8
142 bswapq %r8 /* byte swap the data */
143 movdq %r8,%mm0
144 maskmovq %mm0,%mm1
145 ret
146 .size ss_stp8, [.-ss_stp8]
147
148/*============================================================================*\
149 * uint16_t ss_byteswap16( uint16_t v )
150\*============================================================================*/
151 .align 16
152 .globl ss_byteswap16
153 .type ss_byteswap16, @function
154ss_byteswap16:
155 movw %di,%ax
156 xchgb %ah,%al
157 ret
158 .size ss_byteswap16, [.-ss_byteswap16]
159
160/*============================================================================*\
161 * uint32_t ss_byteswap32( uint32_t v )
162\*============================================================================*/
163 .align 16
164 .globl ss_byteswap32
165 .type ss_byteswap32, @function
166ss_byteswap32:
167 movl %edi,%eax
168 bswapl %eax
169 ret
170 .size ss_byteswap32, [.-ss_byteswap32]
171
172/*============================================================================*\
173 * uint64_t ss_byteswap64( uint64_t v )
174\*============================================================================*/
175 .align 16
176 .globl ss_byteswap64
177 .type ss_byteswap64, @function
178ss_byteswap64:
179 movq %rdi,%rax
180 bswapq %rax
181 ret
182 .size ss_byteswap64, [.-ss_byteswap64]
183
184#else
185
186.register %g2,#scratch
187.register %g3,#scratch
188.section ".text"
189
190/*============================================================================*\
191 * uint8_t ss_ldstub( void* base, uint64_t ofs )
192\*============================================================================*/
193
194.align 8
195.global ss_ldstub
196.type ss_ldstub, #function
197
198ss_ldstub:
199
200#if defined(ARCH_V9)
201
202#elif defined(ARCH_V8)
203
204 sllx %o1,32,%o1 ! ofs is o1:o2
205 srl %o2,0,%o2
206 or %o1,%o2,%o1
207
208#else
209#error "Need ARCH definition"
210#endif
211
212 ldstub [%o0+%o1],%o0
213
214 retl
215 nop
216
217
218/*============================================================================*\
219 * uint32_t ss_swap( uint32_t rd, void* base, uint64_t ofs )
220\*============================================================================*/
221
222.align 8
223.global ss_swap
224.type ss_swap, #function
225
226ss_swap:
227
228#if defined(ARCH_V9)
229
230#elif defined(ARCH_V8)
231
232 sllx %o2,32,%o2 ! ofs is o2:o3
233 srl %o3,0,%o3
234 or %o2,%o3,%o2
235
236#else
237#error "Need ARCH definition"
238#endif
239
240 swap [%o1+%o2],%o0
241
242 retl
243 nop
244
245
246/*============================================================================*\
247 * uint32_t ss_cas( uint32_t rd, void* base, uint32_t rs2 )
248\*============================================================================*/
249
250.align 8
251.global ss_cas
252.type ss_cas, #function
253
254ss_cas:
255 casa [%o1]0x80,%o2,%o0
256 retl
257 nop
258
259
260/*============================================================================*\
261 * uint64_t ss_casx( uint64_t rd, void* base, uint64_t rs2 )
262\*============================================================================*/
263
264.align 8
265.global ss_casx
266.type ss_casx, #function
267
268ss_casx:
269
270#if defined(ARCH_V9)
271
272 casxa [%o1]0x80,%o2,%o0
273 retl
274 nop
275
276#elif defined(ARCH_V8)
277
278 sllx %o0,32,%o0 ! rd is o0:o1
279 srl %o1,0,%o1
280 or %o0,%o1,%o1
281 sllx %o3,32,%o3 ! rs2 is r3:o4
282 srl %o4,0,%o4
283 or %o3,%o4,%o3
284 casxa [%o2]0x80,%o3,%o1 ! base is o2
285 retl
286 srlx %o1,32,%o0 ! result is o0:o1
287
288#else
289#error "Need ARCH definition"
290#endif
291
292/*============================================================================*\
293 * void ss_stp8( double rd, void* base, uint64_t mask )
294 *
295 * Handle partial store, mask is a bytemask (ASI used intrhe stda is 0xc0)
296\*============================================================================*/
297
298.align 8
299.global ss_stp8
300.type ss_stp8, #function
301
302ss_stp8:
303
304#if defined(ARCH_V9)
305
306 retl
307 stda %f0,[%o1 + %o2]0xc0 ! f0 is double !! (o0:o1)
308
309#elif defined(ARCH_V8)
310
311 sllx %o3,32,%o3 ! mask is o3:o4
312 srl %o4,0,%o4
313 or %o3,%o4,%o3
314
315 retl
316 stda %f0,[%o2 + %o3]0xc0 ! f0 is double !! (o0:o1)
317
318#else
319#error "Need ARCH definition"
320#endif
321
322#endif
Full OpenSPARC architecture tarball including simulator, hypervisor, and OBP.