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* Hypervisor Software File: pc16550.h
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#pragma ident "@(#)pc16550.h 1.3 04/07/21 SMI"
* Hypervisor UART console definitions
* Some Line Status Register (FCR) bits
* Some FIFO Control Register (FCR) bits
#define FCR_FIFO_ENABLE 0x1
#define FCR_RCVR_RESET 0x2
#define FCR_XMIT_RESET 0x4
* Line Control Register settings
* Baud rate settings for Divisor Latch Low (DLL) and Most (DLM)