Initial commit of OpenSPARC T2 architecture model.

[OpenSPARC-T2-SAM] / sam-t2 / sam / cpus / vonk / n2 / lib / ras / xml / N2_L2AddressingFields.xml

<!-- interpreter=xml2reg args='-t' -->
<register_list>
<register name="L2_ADDRESSING_FIELDS (L2_ADDRESSING_FIELDS)">
   <class_name>N2_L2AddressingFields</class_name>
   <submodule>N2</submodule>
   <comment>
This class is based on N2 PRM 1.1 Table B-4 and splits a virtual
address into the bit fields needed to index the L2 cache.  This class
assumes 8 L2 banks.
   </comment>
   <priv>yes</priv>
   <field name="RSVD">
       <start_offset>0</start_offset>
       <end_offset>2</end_offset>
       <initial_value>0</initial_value>
       <protection>RO</protection>
       <field_type>ZERO</field_type>
       <comment>
All zero for 64-bit access.
       </comment>
       <format type="hex"/>
   </field>
   <field name="WORD">
       <start_offset>3</start_offset>
       <end_offset>5</end_offset>
       <initial_value>0</initial_value>
       <protection>RW</protection>
       <field_type>NORMAL</field_type>
       <comment>
Selects 64-bit (doubleword) in cache line.  See PRM Rev 1.1 Tbl. 28-43
       </comment>
       <format type="hex"/>
   </field>
   <field name="BANK">
       <start_offset>6</start_offset>
       <end_offset>8</end_offset>
       <initial_value>0</initial_value>
       <protection>RW</protection>
       <field_type>NORMAL</field_type>
       <comment>
Selects bank containing the cache line.
       </comment>
       <format type="hex"/>
   </field>
   <field name="SET">
       <start_offset>9</start_offset>
       <end_offset>17</end_offset>
       <initial_value>0</initial_value>
       <protection>RW</protection>
       <field_type>NORMAL</field_type>
       <comment>
Selects cache set containing the cache line.  Assumes L2 cache
hashing is disabled.
       </comment>
   </field>
   <field name="TAG">
       <start_offset>18</start_offset>
       <end_offset>39</end_offset>
       <initial_value>0</initial_value>
       <protection>RW</protection>
       <field_type>NORMAL</field_type>
       <comment>
Tag for cache line.
       </comment>
   </field>
</register>
</register_list>