Commit | Line | Data |
---|---|---|
0801d37f | 1 | /* up.c 4.19 81/02/22 */ |
008c0481 | 2 | |
66b4fb09 | 3 | #include "up.h" |
3f3a34c3 | 4 | #if NSC21 > 0 |
008c0481 | 5 | /* |
10fb932f | 6 | * UNIBUS disk driver with overlapped seeks and ECC recovery. |
008c0481 | 7 | */ |
355250d9 | 8 | #define DELAY(N) { register int d; d = N; while (--d > 0); } |
008c0481 BJ |
9 | |
10 | #include "../h/param.h" | |
11 | #include "../h/systm.h" | |
3f3a34c3 BJ |
12 | #include "../h/cpu.h" |
13 | #include "../h/nexus.h" | |
41888f16 | 14 | #include "../h/dk.h" |
008c0481 BJ |
15 | #include "../h/buf.h" |
16 | #include "../h/conf.h" | |
17 | #include "../h/dir.h" | |
18 | #include "../h/user.h" | |
19 | #include "../h/map.h" | |
80e7c811 | 20 | #include "../h/pte.h" |
008c0481 BJ |
21 | #include "../h/mba.h" |
22 | #include "../h/mtpr.h" | |
008c0481 | 23 | #include "../h/vm.h" |
b7333467 | 24 | #include "../h/uba.h" |
0ff318b2 | 25 | #include "../h/cmap.h" |
008c0481 | 26 | |
0ff318b2 | 27 | #include "../h/upreg.h" |
008c0481 | 28 | |
3f3a34c3 BJ |
29 | struct up_softc { |
30 | int sc_softas; | |
71236e46 | 31 | int sc_ndrive; |
3f3a34c3 BJ |
32 | int sc_wticks; |
33 | } up_softc[NSC21]; | |
008c0481 | 34 | |
3f3a34c3 | 35 | /* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */ |
008c0481 BJ |
36 | struct size |
37 | { | |
38 | daddr_t nblocks; | |
39 | int cyloff; | |
40 | } up_sizes[8] = { | |
41 | 15884, 0, /* A=cyl 0 thru 26 */ | |
42 | 33440, 27, /* B=cyl 27 thru 81 */ | |
d1778415 | 43 | 495520, 0, /* C=cyl 0 thru 814 */ |
008c0481 BJ |
44 | 15884, 562, /* D=cyl 562 thru 588 */ |
45 | 55936, 589, /* E=cyl 589 thru 680 */ | |
46 | 81472, 681, /* F=cyl 681 thru 814 */ | |
47 | 153824, 562, /* G=cyl 562 thru 814 */ | |
008c0481 | 48 | 291346, 82, /* H=cyl 82 thru 561 */ |
3f3a34c3 BJ |
49 | }, fj_sizes[8] = { |
50 | 15884, 0, /* A=cyl 0 thru 49 */ | |
51 | 33440, 50, /* B=cyl 50 thru 154 */ | |
52 | 263360, 0, /* C=cyl 0 thru 822 */ | |
53 | 0, 0, | |
54 | 0, 0, | |
55 | 0, 0, | |
56 | 0, 0, | |
57 | 213760, 155, /* H=cyl 155 thru 822 */ | |
008c0481 | 58 | }; |
3f3a34c3 | 59 | /* END OF STUFF WHICH SHOULD BE READ IN PER DISK */ |
008c0481 | 60 | |
3f3a34c3 BJ |
61 | #define _upSDIST 2 /* 1.0 msec */ |
62 | #define _upRDIST 4 /* 2.0 msec */ | |
63 | ||
64 | int upSDIST = _upSDIST; | |
65 | int upRDIST = _upRDIST; | |
66 | ||
71236e46 | 67 | int upprobe(), upslave(), upattach(), updgo(), upintr(); |
3f3a34c3 BJ |
68 | struct uba_minfo *upminfo[NSC21]; |
69 | struct uba_dinfo *updinfo[NUP]; | |
71236e46 | 70 | struct uba_dinfo *upip[NSC21][4]; |
d763a2b7 | 71 | |
71236e46 | 72 | u_short upstd[] = { 0776700, 0774400, 0776300, 0 }; |
0801d37f | 73 | struct uba_driver scdriver = |
71236e46 | 74 | { upprobe, upslave, upattach, updgo, upstd, "up", updinfo, "sc", upminfo }; |
3f3a34c3 BJ |
75 | struct buf uputab[NUP]; |
76 | ||
77 | struct upst { | |
78 | short nsect; | |
79 | short ntrak; | |
80 | short nspc; | |
81 | short ncyl; | |
82 | struct size *sizes; | |
83 | } upst[] = { | |
71236e46 BJ |
84 | 32, 19, 32*19, 823, up_sizes, /* 9300/cdc */ |
85 | /* 9300 actually has 815 cylinders... */ | |
3f3a34c3 BJ |
86 | 32, 10, 32*10, 823, fj_sizes, /* fujitsu 160m */ |
87 | }; | |
008c0481 | 88 | |
0801d37f BJ |
89 | u_char up_offset[16] = |
90 | { P400,M400,P400,M400,P800,M800,P800,M800,P1200,M1200,P1200,M1200,0,0,0,0 }; | |
008c0481 | 91 | |
0801d37f | 92 | struct buf rupbuf[NUP]; |
008c0481 | 93 | |
008c0481 BJ |
94 | #define b_cylin b_resid |
95 | ||
008c0481 BJ |
96 | #ifdef INTRLVE |
97 | daddr_t dkblock(); | |
98 | #endif | |
3f3a34c3 BJ |
99 | |
100 | int upwstart, upwatch(); /* Have started guardian */ | |
7e00c42b | 101 | int upseek; |
3f3a34c3 BJ |
102 | |
103 | /*ARGSUSED*/ | |
71236e46 | 104 | upprobe(reg) |
3f3a34c3 | 105 | caddr_t reg; |
008c0481 | 106 | { |
d763a2b7 BJ |
107 | register int br, cvec; |
108 | ||
71236e46 BJ |
109 | #ifdef lint |
110 | br = 0; cvec = br; br = cvec; | |
111 | #endif | |
112 | ((struct device *)reg)->upcs1 = (IE|RDY); | |
113 | DELAY(10); | |
114 | ((struct device *)reg)->upcs1 = 0; | |
d763a2b7 | 115 | return (1); |
3f3a34c3 BJ |
116 | } |
117 | ||
71236e46 | 118 | upslave(ui, reg) |
3f3a34c3 BJ |
119 | struct uba_dinfo *ui; |
120 | caddr_t reg; | |
121 | { | |
122 | register struct device *upaddr = (struct device *)reg; | |
3f3a34c3 BJ |
123 | |
124 | upaddr->upcs1 = 0; /* conservative */ | |
71236e46 | 125 | upaddr->upcs2 = ui->ui_slave; |
3f3a34c3 BJ |
126 | if (upaddr->upcs2&NED) { |
127 | upaddr->upcs1 = DCLR|GO; | |
128 | return (0); | |
129 | } | |
71236e46 BJ |
130 | return (1); |
131 | } | |
132 | ||
133 | upattach(ui) | |
134 | register struct uba_dinfo *ui; | |
135 | { | |
136 | ||
6a81870e | 137 | if (upwstart == 0) { |
49c84d3f | 138 | timeout(upwatch, (caddr_t)0, HZ); |
6a81870e BJ |
139 | upwstart++; |
140 | } | |
b7333467 BJ |
141 | if (ui->ui_dk >= 0) |
142 | dk_mspw[ui->ui_dk] = .0000020345; | |
71236e46 BJ |
143 | upip[ui->ui_ctlr][ui->ui_slave] = ui; |
144 | up_softc[ui->ui_ctlr].sc_ndrive++; | |
3f3a34c3 BJ |
145 | } |
146 | ||
3f3a34c3 BJ |
147 | upstrategy(bp) |
148 | register struct buf *bp; | |
149 | { | |
150 | register struct uba_dinfo *ui; | |
3f3a34c3 BJ |
151 | register struct upst *st; |
152 | register int unit; | |
7e00c42b | 153 | register struct buf *dp; |
3f3a34c3 | 154 | int xunit = minor(bp->b_dev) & 07; |
7e00c42b | 155 | long bn, sz; |
3f3a34c3 | 156 | |
7e00c42b | 157 | sz = (bp->b_bcount+511) >> 9; |
008c0481 | 158 | unit = dkunit(bp); |
3f3a34c3 BJ |
159 | if (unit >= NUP) |
160 | goto bad; | |
161 | ui = updinfo[unit]; | |
162 | if (ui == 0 || ui->ui_alive == 0) | |
163 | goto bad; | |
164 | st = &upst[ui->ui_type]; | |
165 | if (bp->b_blkno < 0 || | |
166 | (bn = dkblock(bp))+sz > st->sizes[xunit].nblocks) | |
167 | goto bad; | |
168 | bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff; | |
008c0481 | 169 | (void) spl5(); |
7e00c42b BJ |
170 | dp = &uputab[ui->ui_unit]; |
171 | disksort(dp, bp); | |
172 | if (dp->b_active == 0) { | |
3f3a34c3 BJ |
173 | (void) upustart(ui); |
174 | bp = &ui->ui_mi->um_tab; | |
175 | if (bp->b_actf && bp->b_active == 0) | |
176 | (void) upstart(ui->ui_mi); | |
008c0481 BJ |
177 | } |
178 | (void) spl0(); | |
3f3a34c3 BJ |
179 | return; |
180 | ||
181 | bad: | |
182 | bp->b_flags |= B_ERROR; | |
183 | iodone(bp); | |
184 | return; | |
008c0481 BJ |
185 | } |
186 | ||
3f3a34c3 BJ |
187 | upustart(ui) |
188 | register struct uba_dinfo *ui; | |
008c0481 BJ |
189 | { |
190 | register struct buf *bp, *dp; | |
3f3a34c3 BJ |
191 | register struct uba_minfo *um; |
192 | register struct device *upaddr; | |
193 | register struct upst *st; | |
008c0481 BJ |
194 | daddr_t bn; |
195 | int sn, cn, csn; | |
eb891eaa | 196 | int didie = 0; |
008c0481 | 197 | |
71236e46 BJ |
198 | if (ui == 0) |
199 | return (0); | |
200 | /* | |
201 | * The SC21 cancels commands if you just say | |
202 | * cs1 = IE | |
203 | * so we are cautious about handling of cs1. | |
204 | * Also don't bother to clear as bits other than in upintr(). | |
205 | */ | |
3f3a34c3 BJ |
206 | dk_busy &= ~(1<<ui->ui_dk); |
207 | dp = &uputab[ui->ui_unit]; | |
7bc8d985 | 208 | if ((bp = dp->b_actf) == NULL) |
eb891eaa | 209 | goto out; |
3f3a34c3 BJ |
210 | /* dont confuse controller by giving SEARCH while dt in progress */ |
211 | um = ui->ui_mi; | |
212 | if (um->um_tab.b_active) { | |
d763a2b7 | 213 | up_softc[um->um_ctlr].sc_softas |= 1<<ui->ui_slave; |
2a3b9a7f BJ |
214 | return (0); |
215 | } | |
a3f430e0 BJ |
216 | if (dp->b_active) |
217 | goto done; | |
218 | dp->b_active = 1; | |
3f3a34c3 BJ |
219 | upaddr = (struct device *)um->um_addr; |
220 | upaddr->upcs2 = ui->ui_slave; | |
7bc8d985 | 221 | if ((upaddr->upds & VV) == 0) { |
71236e46 | 222 | /* SHOULD WARN SYSTEM THAT THIS HAPPENED */ |
7bc8d985 | 223 | upaddr->upcs1 = IE|DCLR|GO; |
008c0481 | 224 | upaddr->upcs1 = IE|PRESET|GO; |
008c0481 | 225 | upaddr->upof = FMT22; |
eb891eaa | 226 | didie = 1; |
008c0481 | 227 | } |
008c0481 | 228 | if ((upaddr->upds & (DPR|MOL)) != (DPR|MOL)) |
2a3b9a7f | 229 | goto done; |
71236e46 BJ |
230 | if (up_softc[um->um_ctlr].sc_ndrive == 1) |
231 | goto done; | |
3f3a34c3 | 232 | st = &upst[ui->ui_type]; |
008c0481 BJ |
233 | bn = dkblock(bp); |
234 | cn = bp->b_cylin; | |
3f3a34c3 BJ |
235 | sn = bn%st->nspc; |
236 | sn = (sn + st->nsect - upSDIST) % st->nsect; | |
7bc8d985 BJ |
237 | if (cn - upaddr->updc) |
238 | goto search; /* Not on-cylinder */ | |
2a3b9a7f BJ |
239 | else if (upseek) |
240 | goto done; /* Ok just to be on-cylinder */ | |
008c0481 | 241 | csn = (upaddr->upla>>6) - sn - 1; |
7bc8d985 | 242 | if (csn < 0) |
3f3a34c3 BJ |
243 | csn += st->nsect; |
244 | if (csn > st->nsect - upRDIST) | |
008c0481 | 245 | goto done; |
008c0481 BJ |
246 | search: |
247 | upaddr->updc = cn; | |
2a3b9a7f BJ |
248 | if (upseek) |
249 | upaddr->upcs1 = IE|SEEK|GO; | |
7e00c42b | 250 | else { |
2a3b9a7f BJ |
251 | upaddr->upda = sn; |
252 | upaddr->upcs1 = IE|SEARCH|GO; | |
253 | } | |
eb891eaa | 254 | didie = 1; |
3f3a34c3 BJ |
255 | if (ui->ui_dk >= 0) { |
256 | dk_busy |= 1<<ui->ui_dk; | |
257 | dk_seek[ui->ui_dk]++; | |
008c0481 | 258 | } |
eb891eaa | 259 | goto out; |
008c0481 BJ |
260 | done: |
261 | dp->b_forw = NULL; | |
3f3a34c3 BJ |
262 | if (um->um_tab.b_actf == NULL) |
263 | um->um_tab.b_actf = dp; | |
008c0481 | 264 | else |
3f3a34c3 BJ |
265 | um->um_tab.b_actl->b_forw = dp; |
266 | um->um_tab.b_actl = dp; | |
eb891eaa BJ |
267 | out: |
268 | return (didie); | |
008c0481 BJ |
269 | } |
270 | ||
3f3a34c3 BJ |
271 | upstart(um) |
272 | register struct uba_minfo *um; | |
008c0481 BJ |
273 | { |
274 | register struct buf *bp, *dp; | |
3f3a34c3 | 275 | register struct uba_dinfo *ui; |
008c0481 | 276 | register struct device *upaddr; |
7e00c42b | 277 | struct upst *st; |
008c0481 | 278 | daddr_t bn; |
5aa9d5ea | 279 | int dn, sn, tn, cmd; |
008c0481 | 280 | |
008c0481 | 281 | loop: |
3f3a34c3 | 282 | if ((dp = um->um_tab.b_actf) == NULL) |
eb891eaa | 283 | return (0); |
008c0481 | 284 | if ((bp = dp->b_actf) == NULL) { |
3f3a34c3 | 285 | um->um_tab.b_actf = dp->b_forw; |
008c0481 BJ |
286 | goto loop; |
287 | } | |
7bc8d985 BJ |
288 | /* |
289 | * Mark the controller busy, and multi-part disk address. | |
290 | * Select the unit on which the i/o is to take place. | |
291 | */ | |
3f3a34c3 BJ |
292 | um->um_tab.b_active++; |
293 | ui = updinfo[dkunit(bp)]; | |
008c0481 | 294 | bn = dkblock(bp); |
3f3a34c3 BJ |
295 | dn = ui->ui_slave; |
296 | st = &upst[ui->ui_type]; | |
297 | sn = bn%st->nspc; | |
298 | tn = sn/st->nsect; | |
299 | sn %= st->nsect; | |
300 | upaddr = (struct device *)ui->ui_addr; | |
71236e46 | 301 | upaddr->upcs2 = dn; |
7bc8d985 BJ |
302 | /* |
303 | * If drive is not present and on-line, then | |
304 | * get rid of this with an error and loop to get | |
305 | * rid of the rest of its queued requests. | |
306 | * (Then on to any other ready drives.) | |
307 | */ | |
008c0481 | 308 | if ((upaddr->upds & (DPR|MOL)) != (DPR|MOL)) { |
71236e46 | 309 | printf("up%d not ready", dkunit(bp)); |
88253fd2 | 310 | if ((upaddr->upds & (DPR|MOL)) != (DPR|MOL)) { |
71236e46 | 311 | printf("\n"); |
3f3a34c3 BJ |
312 | um->um_tab.b_active = 0; |
313 | um->um_tab.b_errcnt = 0; | |
88253fd2 BJ |
314 | dp->b_actf = bp->av_forw; |
315 | dp->b_active = 0; | |
316 | bp->b_flags |= B_ERROR; | |
317 | iodone(bp); | |
88253fd2 BJ |
318 | goto loop; |
319 | } | |
71236e46 | 320 | printf(" (flakey... it came back)\n"); |
008c0481 | 321 | } |
7bc8d985 BJ |
322 | /* |
323 | * If this is a retry, then with the 16'th retry we | |
324 | * begin to try offsetting the heads to recover the data. | |
325 | */ | |
3f3a34c3 BJ |
326 | if (um->um_tab.b_errcnt >= 16 && (bp->b_flags&B_READ) != 0) { |
327 | upaddr->upof = up_offset[um->um_tab.b_errcnt & 017] | FMT22; | |
7bc8d985 | 328 | upaddr->upcs1 = IE|OFFSET|GO; |
7bc8d985 | 329 | while (upaddr->upds & PIP) |
008c0481 BJ |
330 | DELAY(25); |
331 | } | |
7bc8d985 BJ |
332 | /* |
333 | * Now set up the transfer, retrieving the high | |
334 | * 2 bits of the UNIBUS address from the information | |
335 | * returned by ubasetup() for the cs1 register bits 8 and 9. | |
336 | */ | |
5aa9d5ea | 337 | upaddr->updc = bp->b_cylin; |
008c0481 | 338 | upaddr->upda = (tn << 8) + sn; |
008c0481 BJ |
339 | upaddr->upwc = -bp->b_bcount / sizeof (short); |
340 | if (bp->b_flags & B_READ) | |
b7333467 | 341 | cmd = IE|RCOM|GO; |
008c0481 | 342 | else |
b7333467 BJ |
343 | cmd = IE|WCOM|GO; |
344 | um->um_cmd = cmd; | |
345 | ubago(ui); | |
eb891eaa | 346 | return (1); |
008c0481 BJ |
347 | } |
348 | ||
b7333467 BJ |
349 | updgo(um) |
350 | struct uba_minfo *um; | |
3f3a34c3 | 351 | { |
b7333467 | 352 | register struct device *upaddr = (struct device *)um->um_addr; |
7e00c42b | 353 | |
b7333467 BJ |
354 | upaddr->upba = um->um_ubinfo; |
355 | upaddr->upcs1 = um->um_cmd|((um->um_ubinfo>>8)&0x300); | |
3f3a34c3 BJ |
356 | } |
357 | ||
008c0481 BJ |
358 | /* |
359 | * Handle a device interrupt. | |
360 | * | |
361 | * If the transferring drive needs attention, service it | |
362 | * retrying on error or beginning next transfer. | |
363 | * Service all other ready drives, calling ustart to transfer | |
3f3a34c3 | 364 | * their blocks to the ready queue in um->um_tab, and then restart |
008c0481 BJ |
365 | * the controller if there is anything to do. |
366 | */ | |
0801d37f | 367 | scintr(sc21) |
3f3a34c3 | 368 | register sc21; |
008c0481 BJ |
369 | { |
370 | register struct buf *bp, *dp; | |
3f3a34c3 BJ |
371 | register struct uba_minfo *um = upminfo[sc21]; |
372 | register struct uba_dinfo *ui; | |
373 | register struct device *upaddr = (struct device *)um->um_addr; | |
008c0481 | 374 | register unit; |
7e00c42b | 375 | struct up_softc *sc = &up_softc[um->um_ctlr]; |
71236e46 | 376 | int as = (upaddr->upas & 0377) | sc->sc_softas; |
eb891eaa | 377 | int needie = 1; |
008c0481 | 378 | |
7e00c42b | 379 | sc->sc_wticks = 0; |
71236e46 | 380 | sc->sc_softas = 0; |
3f3a34c3 | 381 | if (um->um_tab.b_active) { |
7e00c42b BJ |
382 | if ((upaddr->upcs1 & RDY) == 0) |
383 | printf("upintr !RDY\n"); | |
3f3a34c3 | 384 | dp = um->um_tab.b_actf; |
008c0481 | 385 | bp = dp->b_actf; |
3f3a34c3 BJ |
386 | ui = updinfo[dkunit(bp)]; |
387 | dk_busy &= ~(1 << ui->ui_dk); | |
388 | upaddr->upcs2 = ui->ui_slave; | |
10fb932f | 389 | if ((upaddr->upds&ERR) || (upaddr->upcs1&TRE)) { |
0ad5097e | 390 | int cs2; |
7bc8d985 | 391 | while ((upaddr->upds & DRY) == 0) |
008c0481 | 392 | DELAY(25); |
71236e46 BJ |
393 | if (upaddr->uper1&WLE) |
394 | printf("up%d is write locked\n", dkunit(bp)); | |
3f3a34c3 | 395 | if (++um->um_tab.b_errcnt > 28 || upaddr->uper1&WLE) |
008c0481 BJ |
396 | bp->b_flags |= B_ERROR; |
397 | else | |
3f3a34c3 BJ |
398 | um->um_tab.b_active = 0; /* force retry */ |
399 | if (um->um_tab.b_errcnt > 27) { | |
0ad5097e | 400 | cs2 = (int)upaddr->upcs2; |
3f3a34c3 BJ |
401 | deverror(bp, cs2, (int)upaddr->uper1); |
402 | } | |
403 | if ((upaddr->uper1&(DCK|ECH))==DCK && upecc(ui)) | |
7bc8d985 | 404 | return; |
008c0481 | 405 | upaddr->upcs1 = TRE|IE|DCLR|GO; |
eb891eaa | 406 | needie = 0; |
3f3a34c3 | 407 | if ((um->um_tab.b_errcnt&07) == 4) { |
008c0481 | 408 | upaddr->upcs1 = RECAL|GO|IE; |
008c0481 BJ |
409 | while(upaddr->upds & PIP) |
410 | DELAY(25); | |
411 | } | |
3f3a34c3 | 412 | if (um->um_tab.b_errcnt == 28 && cs2&(NEM|MXF)) { |
0ad5097e | 413 | printf("FLAKEY UP "); |
3f3a34c3 | 414 | ubareset(um->um_ubanum); |
0ad5097e BJ |
415 | return; |
416 | } | |
008c0481 | 417 | } |
0801d37f | 418 | ubadone(um); |
3f3a34c3 BJ |
419 | if (um->um_tab.b_active) { |
420 | if (um->um_tab.b_errcnt >= 16) { | |
7bc8d985 | 421 | upaddr->upcs1 = RTC|GO|IE; |
7bc8d985 | 422 | while (upaddr->upds & PIP) |
008c0481 | 423 | DELAY(25); |
eb891eaa | 424 | needie = 0; |
008c0481 | 425 | } |
3f3a34c3 BJ |
426 | um->um_tab.b_active = 0; |
427 | um->um_tab.b_errcnt = 0; | |
428 | um->um_tab.b_actf = dp->b_forw; | |
008c0481 BJ |
429 | dp->b_active = 0; |
430 | dp->b_errcnt = 0; | |
431 | dp->b_actf = bp->av_forw; | |
7bc8d985 | 432 | bp->b_resid = (-upaddr->upwc * sizeof(short)); |
008c0481 | 433 | iodone(bp); |
3f3a34c3 BJ |
434 | if (dp->b_actf) |
435 | if (upustart(ui)) | |
eb891eaa | 436 | needie = 0; |
008c0481 | 437 | } |
71236e46 | 438 | as &= ~(1<<ui->ui_slave); |
1f3d30ee | 439 | } else { |
355250d9 | 440 | if (upaddr->upcs1 & TRE) |
008c0481 | 441 | upaddr->upcs1 = TRE; |
008c0481 | 442 | } |
71236e46 BJ |
443 | for (unit = 0; as; as >>= 1, unit++) |
444 | if (as & 1) { | |
7e00c42b | 445 | upaddr->upas = 1<<unit; |
71236e46 | 446 | if (upustart(upip[sc21][unit])) |
1f3d30ee BJ |
447 | needie = 0; |
448 | } | |
3f3a34c3 BJ |
449 | if (um->um_tab.b_actf && um->um_tab.b_active == 0) |
450 | if (upstart(um)) | |
eb891eaa | 451 | needie = 0; |
2a3b9a7f | 452 | if (needie) |
7bc8d985 | 453 | upaddr->upcs1 = IE; |
008c0481 BJ |
454 | } |
455 | ||
456 | upread(dev) | |
0801d37f | 457 | dev_t dev; |
008c0481 | 458 | { |
0801d37f | 459 | register int unit = minor(dev) >> 3; |
7e00c42b | 460 | |
0801d37f BJ |
461 | if (unit >= NUP) |
462 | u.u_error = ENXIO; | |
463 | else | |
464 | physio(upstrategy, &rupbuf[unit], dev, B_READ, minphys); | |
008c0481 BJ |
465 | } |
466 | ||
467 | upwrite(dev) | |
0801d37f | 468 | dev_t dev; |
008c0481 | 469 | { |
0801d37f | 470 | register int unit = minor(dev) >> 3; |
7e00c42b | 471 | |
0801d37f BJ |
472 | if (unit >= NUP) |
473 | u.u_error = ENXIO; | |
474 | else | |
475 | physio(upstrategy, &rupbuf[unit], dev, B_WRITE, minphys); | |
008c0481 BJ |
476 | } |
477 | ||
7bc8d985 BJ |
478 | /* |
479 | * Correct an ECC error, and restart the i/o to complete | |
480 | * the transfer if necessary. This is quite complicated because | |
481 | * the transfer may be going to an odd memory address base and/or | |
482 | * across a page boundary. | |
483 | */ | |
3f3a34c3 BJ |
484 | upecc(ui) |
485 | register struct uba_dinfo *ui; | |
008c0481 | 486 | { |
3f3a34c3 BJ |
487 | register struct device *up = (struct device *)ui->ui_addr; |
488 | register struct buf *bp = uputab[ui->ui_unit].b_actf; | |
489 | register struct uba_minfo *um = ui->ui_mi; | |
490 | register struct upst *st; | |
491 | struct uba_regs *ubp = ui->ui_hd->uh_uba; | |
7bc8d985 | 492 | register int i; |
008c0481 | 493 | caddr_t addr; |
7bc8d985 | 494 | int reg, bit, byte, npf, mask, o, cmd, ubaddr; |
008c0481 BJ |
495 | int bn, cn, tn, sn; |
496 | ||
008c0481 | 497 | /* |
7bc8d985 BJ |
498 | * Npf is the number of sectors transferred before the sector |
499 | * containing the ECC error, and reg is the UBA register | |
500 | * mapping (the first part of) the transfer. | |
501 | * O is offset within a memory page of the first byte transferred. | |
008c0481 | 502 | */ |
7bc8d985 | 503 | npf = btop((up->upwc * sizeof(short)) + bp->b_bcount) - 1; |
b7333467 | 504 | reg = btop(um->um_ubinfo&0x3ffff) + npf; |
008c0481 BJ |
505 | o = (int)bp->b_un.b_addr & PGOFSET; |
506 | printf("%D ", bp->b_blkno+npf); | |
507 | prdev("ECC", bp->b_dev); | |
508 | mask = up->upec2; | |
509 | if (mask == 0) { | |
7bc8d985 | 510 | up->upof = FMT22; /* == RTC ???? */ |
008c0481 BJ |
511 | return (0); |
512 | } | |
7bc8d985 BJ |
513 | /* |
514 | * Flush the buffered data path, and compute the | |
515 | * byte and bit position of the error. The variable i | |
516 | * is the byte offset in the transfer, the variable byte | |
517 | * is the offset from a page boundary in main memory. | |
518 | */ | |
b7333467 | 519 | ubp->uba_dpr[(um->um_ubinfo>>28)&0x0f] |= UBA_BNE; |
7bc8d985 BJ |
520 | i = up->upec1 - 1; /* -1 makes 0 origin */ |
521 | bit = i&07; | |
522 | i = (i&~07)>>3; | |
008c0481 | 523 | byte = i + o; |
7bc8d985 BJ |
524 | /* |
525 | * Correct while possible bits remain of mask. Since mask | |
526 | * contains 11 bits, we continue while the bit offset is > -11. | |
527 | * Also watch out for end of this block and the end of the whole | |
528 | * transfer. | |
529 | */ | |
530 | while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) { | |
531 | addr = ptob(ubp->uba_map[reg+btop(byte)].pg_pfnum)+ | |
532 | (byte & PGOFSET); | |
533 | putmemc(addr, getmemc(addr)^(mask<<bit)); | |
534 | byte++; | |
535 | i++; | |
536 | bit -= 8; | |
008c0481 | 537 | } |
3f3a34c3 | 538 | um->um_tab.b_active++; /* Either complete or continuing... */ |
008c0481 BJ |
539 | if (up->upwc == 0) |
540 | return (0); | |
7bc8d985 BJ |
541 | /* |
542 | * Have to continue the transfer... clear the drive, | |
543 | * and compute the position where the transfer is to continue. | |
544 | * We have completed npf+1 sectors of the transfer already; | |
545 | * restart at offset o of next sector (i.e. in UBA register reg+1). | |
546 | */ | |
547 | up->upcs1 = TRE|IE|DCLR|GO; | |
008c0481 | 548 | bn = dkblock(bp); |
3f3a34c3 | 549 | st = &upst[ui->ui_type]; |
008c0481 | 550 | cn = bp->b_cylin; |
3f3a34c3 BJ |
551 | sn = bn%st->nspc + npf + 1; |
552 | tn = sn/st->nsect; | |
553 | sn %= st->nsect; | |
554 | cn += tn/st->ntrak; | |
555 | tn %= st->ntrak; | |
008c0481 | 556 | up->updc = cn; |
7bc8d985 BJ |
557 | up->upda = (tn << 8) | sn; |
558 | ubaddr = (int)ptob(reg+1) + o; | |
559 | up->upba = ubaddr; | |
560 | cmd = (ubaddr >> 8) & 0x300; | |
561 | cmd |= IE|GO|RCOM; | |
562 | up->upcs1 = cmd; | |
008c0481 BJ |
563 | return (1); |
564 | } | |
977c2848 BJ |
565 | |
566 | /* | |
567 | * Reset driver after UBA init. | |
568 | * Cancel software state of all pending transfers | |
569 | * and restart all units and the controller. | |
570 | */ | |
3f3a34c3 | 571 | upreset(uban) |
977c2848 | 572 | { |
3f3a34c3 BJ |
573 | register struct uba_minfo *um; |
574 | register struct uba_dinfo *ui; | |
575 | register sc21, unit; | |
5aa9d5ea | 576 | int any = 0; |
3f3a34c3 | 577 | |
3f3a34c3 | 578 | for (sc21 = 0; sc21 < NSC21; sc21++) { |
7e00c42b BJ |
579 | if ((um = upminfo[sc21]) == 0 || um->um_ubanum != uban || |
580 | um->um_alive == 0) | |
3f3a34c3 | 581 | continue; |
5aa9d5ea RE |
582 | if (any == 0) { |
583 | printf(" up"); | |
7e00c42b | 584 | DELAY(10000000); /* give it time to self-test */ |
5aa9d5ea RE |
585 | any++; |
586 | } | |
3f3a34c3 BJ |
587 | um->um_tab.b_active = 0; |
588 | um->um_tab.b_actf = um->um_tab.b_actl = 0; | |
b7333467 BJ |
589 | if (um->um_ubinfo) { |
590 | printf("<%d>", (um->um_ubinfo>>28)&0xf); | |
0801d37f | 591 | ubadone(um); |
3f3a34c3 BJ |
592 | } |
593 | ((struct device *)(um->um_addr))->upcs2 = CLR; | |
594 | for (unit = 0; unit < NUP; unit++) { | |
595 | if ((ui = updinfo[unit]) == 0) | |
596 | continue; | |
597 | if (ui->ui_alive == 0) | |
598 | continue; | |
599 | uputab[unit].b_active = 0; | |
600 | (void) upustart(ui); | |
601 | } | |
602 | (void) upstart(um); | |
977c2848 | 603 | } |
977c2848 | 604 | } |
6a81870e BJ |
605 | |
606 | /* | |
607 | * Wake up every second and if an interrupt is pending | |
608 | * but nothing has happened increment a counter. | |
609 | * If nothing happens for 20 seconds, reset the controller | |
610 | * and begin anew. | |
611 | */ | |
612 | upwatch() | |
613 | { | |
3f3a34c3 BJ |
614 | register struct uba_minfo *um; |
615 | register sc21, unit; | |
7e00c42b | 616 | register struct up_softc *sc; |
6a81870e | 617 | |
49c84d3f | 618 | timeout(upwatch, (caddr_t)0, HZ); |
3f3a34c3 BJ |
619 | for (sc21 = 0; sc21 < NSC21; sc21++) { |
620 | um = upminfo[sc21]; | |
7e00c42b BJ |
621 | if (um == 0 || um->um_alive == 0) |
622 | continue; | |
623 | sc = &up_softc[sc21]; | |
3f3a34c3 BJ |
624 | if (um->um_tab.b_active == 0) { |
625 | for (unit = 0; unit < NUP; unit++) | |
626 | if (updinfo[unit]->ui_mi == um && | |
627 | uputab[unit].b_active) | |
628 | goto active; | |
7e00c42b | 629 | sc->sc_wticks = 0; |
3f3a34c3 BJ |
630 | continue; |
631 | } | |
632 | active: | |
7e00c42b BJ |
633 | sc->sc_wticks++; |
634 | if (sc->sc_wticks >= 20) { | |
635 | sc->sc_wticks = 0; | |
3f3a34c3 | 636 | printf("LOST INTERRUPT RESET"); |
7e00c42b | 637 | /* SHOULD JUST RESET ONE CTLR, NOT ALL ON UBA */ |
3f3a34c3 BJ |
638 | upreset(um->um_ubanum); |
639 | printf("\n"); | |
640 | } | |
6a81870e BJ |
641 | } |
642 | } | |
0ff318b2 BJ |
643 | |
644 | #define DBSIZE 20 | |
645 | ||
646 | updump(dev) | |
647 | dev_t dev; | |
648 | { | |
649 | struct device *upaddr; | |
650 | char *start; | |
71236e46 | 651 | int num, blk, unit; |
0ff318b2 | 652 | struct size *sizes; |
3f3a34c3 BJ |
653 | register struct uba_regs *uba; |
654 | register struct uba_dinfo *ui; | |
0ff318b2 | 655 | register short *rp; |
3f3a34c3 | 656 | struct upst *st; |
0ff318b2 | 657 | |
0ff318b2 BJ |
658 | unit = minor(dev) >> 3; |
659 | if (unit >= NUP) { | |
660 | printf("bad unit\n"); | |
661 | return (-1); | |
662 | } | |
7e00c42b | 663 | #define phys(cast, addr) ((cast)((int)addr & 0x7fffffff)) |
3f3a34c3 BJ |
664 | ui = phys(struct uba_dinfo *, updinfo[unit]); |
665 | if (ui->ui_alive == 0) { | |
666 | printf("dna\n"); | |
667 | return(-1); | |
668 | } | |
669 | uba = phys(struct uba_hd *, ui->ui_hd)->uh_physuba; | |
670 | #if VAX780 | |
7e00c42b BJ |
671 | if (cpu == VAX_780) |
672 | ubainit(uba); | |
3f3a34c3 BJ |
673 | #endif |
674 | DELAY(1000000); | |
675 | upaddr = (struct device *)ui->ui_physaddr; | |
676 | while ((upaddr->upcs1&DVA) == 0) | |
677 | ; | |
678 | num = maxfree; | |
679 | start = 0; | |
0ff318b2 BJ |
680 | upaddr->upcs2 = unit; |
681 | if ((upaddr->upds & VV) == 0) { | |
682 | upaddr->upcs1 = DCLR|GO; | |
683 | upaddr->upcs1 = PRESET|GO; | |
684 | upaddr->upof = FMT22; | |
685 | } | |
686 | if ((upaddr->upds & (DPR|MOL)) != (DPR|MOL)) { | |
687 | printf("up !DPR || !MOL\n"); | |
688 | return (-1); | |
689 | } | |
7e00c42b | 690 | st = &upst[ui->ui_type]; |
3f3a34c3 | 691 | sizes = phys(struct size *, st->sizes); |
0ff318b2 | 692 | if (dumplo < 0 || dumplo + num >= sizes[minor(dev)&07].nblocks) { |
3f3a34c3 | 693 | printf("oor\n"); |
0ff318b2 BJ |
694 | return (-1); |
695 | } | |
0ff318b2 BJ |
696 | while (num > 0) { |
697 | register struct pte *io; | |
698 | register int i; | |
699 | int cn, sn, tn; | |
700 | daddr_t bn; | |
701 | ||
702 | blk = num > DBSIZE ? DBSIZE : num; | |
3f3a34c3 | 703 | io = uba->uba_map; |
0ff318b2 | 704 | for (i = 0; i < blk; i++) |
3f3a34c3 | 705 | *(int *)io++ = (btop(start)+i) | (1<<21) | UBA_MRV; |
0ff318b2 BJ |
706 | *(int *)io = 0; |
707 | bn = dumplo + btop(start); | |
71236e46 BJ |
708 | cn = bn/st->nspc + sizes[minor(dev)&07].cyloff; |
709 | sn = bn%st->nspc; | |
710 | tn = sn/st->nsect; | |
711 | sn = sn%st->nsect; | |
0ff318b2 BJ |
712 | upaddr->updc = cn; |
713 | rp = (short *) &upaddr->upda; | |
714 | *rp = (tn << 8) + sn; | |
715 | *--rp = 0; | |
716 | *--rp = -blk*NBPG / sizeof (short); | |
717 | *--rp = GO|WCOM; | |
718 | do { | |
719 | DELAY(25); | |
720 | } while ((upaddr->upcs1 & RDY) == 0); | |
721 | if (upaddr->upcs1&ERR) { | |
722 | printf("up dump dsk err: (%d,%d,%d) cs1=%x, er1=%x\n", | |
723 | cn, tn, sn, upaddr->upcs1, upaddr->uper1); | |
724 | return (-1); | |
725 | } | |
726 | start += blk*NBPG; | |
727 | num -= blk; | |
728 | } | |
0ff318b2 BJ |
729 | return (0); |
730 | } | |
63c35a63 | 731 | #endif |