[unix-history] / usr / src / sys / vax / uba / va.c

/*	va.c	4.18	82/11/28	*/

#include "va.h"
#if NVA > 0
/*
 * Varian printer plotter
 */
#include "../h/param.h"
#include "../h/dir.h"
#include "../h/user.h"
#include "../h/buf.h"
#include "../h/systm.h"
#include "../h/map.h"
#include "../h/pte.h"
#include "../h/vcmd.h"
#include "../h/uio.h"

#include "../vaxuba/ubareg.h"
#include "../vaxuba/ubavar.h"

int	vadebug = 0;
#define	dprintf	if(vadebug)printf

unsigned minvaph();

#define	VAPRI	(PZERO-1)

struct	vadevice {
	u_short	vaba;			/* buffer address */
	short	vawc;			/* word count (2's complement) */
	union {
		short	Vacsw;		/* control status as word */
		struct {		/* control status as bytes */
			char Vacsl;
			char Vacsh;
		} vacsr;
	} vacs;
	short	vadata;			/* programmed i/o data buffer */
};

#define	vacsw	vacs.Vacsw
#define	vacsh	vacs.vacsr.Vacsh
#define	vacsl	vacs.vacsr.Vacsl

/* vacsw bits */
#define	VA_ERROR	0100000		/* some error has occurred */
#define	VA_NPRTIMO	0001000		/* DMA timeout error */
#define	VA_NOTREADY	0000400		/* something besides NPRTIMO */
#define	VA_DONE		0000200
#define	VA_IENABLE	0000100		/* interrupt enable */
#define	VA_DMAGO	0000010		/* DMA go bit */
#define	VA_DMAGO	0000010		/* DMA go bit */
#define	VA_SUPPLIESLOW	0000004
#define	VA_BOTOFFORM	0000002
#define	VA_BYTEREVERSE	0000001		/* reverse byte order in words */

/* vacsh command bytes */
#define	VAPLOT		0000340
#define	VAPRINT		0000100
#define	VAPRINTPLOT	0000160
#define	VAAUTOSTEP	0000244
#define	VANOAUTOSTEP	0000045
#define	VAFORMFEED	0000263
#define	VASLEW		0000265
#define	VASTEP		0000064

struct va_softc {
	u_char	sc_openf;		/* exclusive open flag */
	u_char	sc_iostate;		/* kind of I/O going on */
#define	VAS_IDLE	0	/* no I/O, free */
#define	VAS_PIO		1	/* programmed I/O */
#define	VAS_DMA		2	/* DMA, block pio */
#define	VAS_WANT	4	/* wakeup when iostate changes */
	short	sc_tocnt;		/* time out counter */
	short	sc_info;		/* csw passed from vaintr */
	int	sc_state;		/* print/plot state of device */
} va_softc[NVA];

#define	VAUNIT(dev)	(minor(dev))

struct	buf rvabuf[NVA];

int	vaprobe(), vaslave(), vaattach(), vadgo();
struct	uba_device *vadinfo[NVA];
struct	uba_ctlr *vaminfo[NVA];
struct	buf vabhdr[NVA];
u_short	vastd[] = { 0764000, 0 };
struct	uba_driver vadriver =
    { vaprobe, vaslave, vaattach, vadgo, vastd, "vz", vadinfo, "va", vaminfo };

vaprobe(reg)
	caddr_t reg;
{
	register int br, cvec;		/* value-result */
	register struct vadevice *vaaddr = (struct vadevice *)reg;

#ifdef lint
	br = 0; cvec = br; br = cvec;
	vaintr(0);
#endif
#ifndef UCBVAX
	vaaddr->vacsl = VA_IENABLE;
	vaaddr->vaba = 0;
	vaaddr->vacsh = VAPLOT;
	vaaddr->vacsl = VA_IENABLE|VA_DMAGO;
	vaaddr->vawc = -1;
	DELAY(10000);
	vaaddr->vacsl = 0;
	vaaddr->vawc = 0;
#else
	br=0x14;
	cvec=0170;
#endif
	return (sizeof (struct vadevice));
}

/*ARGSUSED*/
vaslave(ui, reg)
	struct uba_device *ui;
	caddr_t reg;
{

	ui->ui_dk = 0;
	return (ui->ui_unit <= 0);
}

/*ARGSUSED*/
vaattach(ui)
	struct uba_device *ui;
{

	ui->ui_mi->um_tab.b_actf = &vabhdr[ui->ui_unit];
}

vaopen(dev)
	dev_t dev;
{
	register struct va_softc *sc;
	register struct vadevice *vaaddr;
	register struct uba_device *ui;
	int error;
	int unit = VAUNIT(dev);

	if (unit >= NVA || (sc = &va_softc[unit])->sc_openf ||
	    (ui = vadinfo[unit]) == 0 || ui->ui_alive == 0)
		return (ENXIO);
	vaaddr = (struct vadevice *)ui->ui_addr;
	sc->sc_openf = 1;
	vaaddr->vawc = 0;
	sc->sc_state = 0;
	sc->sc_tocnt = 0;
	sc->sc_iostate = VAS_IDLE;
	vaaddr->vacsl = VA_IENABLE;
	vatimo(dev);
	error = vacmd(dev, VPRINT);
	if (error)
		vaclose(dev);
	return (error);
}

vastrategy(bp)
	register struct buf *bp;
{
	register struct uba_device *ui;
	register struct uba_ctlr *um;
	int s;

	dprintf("vastrategy(%x)\n", bp);
	ui = vadinfo[VAUNIT(bp->b_dev)];
	if (ui == 0 || ui->ui_alive == 0) {
		bp->b_flags |= B_ERROR;
		iodone(bp);
		return;
	}
	s = spl4();
	um = ui->ui_mi;
	bp->b_actf = NULL;
	if (um->um_tab.b_actf->b_actf == NULL)
		um->um_tab.b_actf->b_actf = bp;
	else {
		printf("bp = 0x%x, um->um_tab.b_actf->b_actf = 0x%x\n",
			bp, um->um_tab.b_actf->b_actf);
		panic("vastrategy");
		um->um_tab.b_actf->b_actl->b_forw = bp;
	}
	um->um_tab.b_actf->b_actl = bp;
	bp = um->um_tab.b_actf;
	dprintf("vastrategy: bp=%x actf=%x active=%d\n",
		bp, bp->b_actf, bp->b_active);
	if (bp->b_actf && bp->b_active == 0)
		(void) vastart(um);
	splx(s);
}

int	vablock = 16384;

unsigned
minvaph(bp)
	struct buf *bp;
{

	if (bp->b_bcount > vablock)
		bp->b_bcount = vablock;
}

/*ARGSUSED*/
vawrite(dev, uio)
	dev_t dev;
	struct uio *uio;
{

	if (VAUNIT(dev) > NVA)
		return (ENXIO);
	return (physio(vastrategy, &rvabuf[VAUNIT(dev)], dev, B_WRITE,
		    minvaph, uio));
}

vastart(um)
	register struct uba_ctlr *um;
{
	struct buf *bp;
	struct vadevice *vaaddr;
	register struct va_softc *sc;
	int unit;

	dprintf("vastart(%x), bp=%x\n", um, um->um_tab.b_actf->b_actf);
	if ((bp = um->um_tab.b_actf->b_actf) == NULL)
		return;
	unit = VAUNIT(bp->b_dev);
	sc = &va_softc[unit];
	sc->sc_tocnt = 0;
	while (sc->sc_iostate&VAS_PIO) {
		sc->sc_iostate |= VAS_WANT;
		sleep((caddr_t)&sc->sc_iostate, VAPRI);
	}
	sc->sc_iostate |= VAS_DMA;
	vaaddr = (struct vadevice *)um->um_addr;
	vaaddr->vacsl = 0;
	vaaddr->vawc = -(bp->b_bcount / 2);
	um->um_cmd = VA_DMAGO | VA_IENABLE;
	(void) ubago(vadinfo[unit]);
}

vadgo(um)
	register struct uba_ctlr *um;
{
	register struct vadevice *vaaddr = (struct vadevice *)um->um_addr;
	register struct buf *bp;

	bp = um->um_tab.b_actf;
	va_softc[VAUNIT(bp->b_actf->b_dev)].sc_tocnt = 0;
	bp->b_active++;
	vaaddr->vaba = um->um_ubinfo;
	vaaddr->vacsl = ((um->um_ubinfo >> 12) & 0x30) | um->um_cmd;
}

/*ARGSUSED*/
vaioctl(dev, cmd, data, flag)
	register caddr_t data;
{
	register int vcmd;
	register struct va_softc *sc = &va_softc[VAUNIT(dev)];

	switch (cmd) {

	case VGETSTATE:
		*(int *)data = sc->sc_state;
		break;

	case VSETSTATE:
		return (vacmd(dev, *(int *)data));
		break;

	default:
		return (ENOTTY);
	}
	return (0);
}

vacmd(dev, vcmd)
	dev_t dev;
	int vcmd;
{
	register struct va_softc *sc = &va_softc[VAUNIT(dev)];
	int s, cmd;

	s = spl4();
	while (sc->sc_iostate&VAS_DMA) {
		sc->sc_iostate |= VAS_WANT;
		sleep((caddr_t)&sc->sc_iostate, VAPRI);
	}
	sc->sc_iostate |= VAS_PIO;
	sc->sc_tocnt = 0;
	cmd = 0;
	switch (vcmd) {

	case VPLOT:
		/* Must turn on plot AND autostep modes. */
		if (vadopio(dev, VAPLOT))
			error = EIO;
		cmd = VAAUTOSTEP;
		break;

	case VPRINT:
		cmd = VAPRINT;
		break;

	case VPRINTPLOT:
		cmd = VAPRINTPLOT;
		break;
	}
	sc->sc_state = (sc->sc_state & ~(VPLOT|VPRINT|VPRINTPLOT)) | vcmd;
	if (cmd && vadopio(dev, cmd))
		error = EIO;
	sc->sc_iostate &= ~VAS_PIO;
	if (sc->sc_iostate&VAS_WANT) {
		sc->sc_iostate &= ~VAS_WANT;
		wakeup((caddr_t)&sc->sc_iostate);
	}
	splx(s);
	return (error);
}

vadopio(dev, cmd)
	dev_t dev;
	int cmd;
{
	register struct vadevice *vaaddr =
	    (struct vadevice *)vaminfo[VAUNIT(dev)]->um_addr;
	register struct va_softc *sc = &va_softc[VAUNIT(dev)];

	sc->sc_info = 0;
	vaaddr->vacsh = cmd;
	while ((sc->sc_info&(VA_DONE|VA_ERROR)) == 0)
		sleep((caddr_t)&sc->sc_info, VAPRI);
	return (sc->sc_info&VA_ERROR);
}

vatimo(dev)
	dev_t dev;
{
	register struct va_softc *sc = &va_softc[VAUNIT(dev)];

	if (sc->sc_openf)
		timeout(vatimo, (caddr_t)dev, hz/2);
	if (++sc->sc_tocnt < 2)
		return;
	sc->sc_tocnt = 0;
	dprintf("vatimo: calling vaintr\n");
	vaintr(dev);
}

/*ARGSUSED*/
vaintr(dev)
	dev_t dev;
{
	register struct uba_ctlr *um;
	struct vadevice *vaaddr;
	struct buf *bp;
	register int unit = VAUNIT(dev), e;
	register struct va_softc *sc = &va_softc[unit];

	um = vaminfo[unit];
	vaaddr = (struct vadevice *)um->um_addr;
	e = vaaddr->vacsw;
	dprintf("vaintr: um=0x%x, e=0x%x, b_active %d\n",
		um, e, um->um_tab.b_actf->b_active);
	if ((e&(VA_DONE|VA_ERROR)) == 0)
		return;
	vaaddr->vacsl = 0;
	if ((e&VA_ERROR) && (e&VA_NPRTIMO))
		printf("va%d: npr timeout\n", unit);
	if (sc->sc_iostate&VAS_PIO) {
		sc->sc_info = e;
		wakeup((caddr_t)&sc->sc_info);
		return;
	}
	if (um->um_tab.b_actf->b_active) {
		bp = um->um_tab.b_actf->b_actf;
		if (e&VA_ERROR)
			bp->b_flags |= B_ERROR;
		if (sc->sc_state&VPRINTPLOT) {
			sc->sc_state = (sc->sc_state & ~VPRINTPLOT) | VPLOT;
			vaaddr->vacsh = VAAUTOSTEP;
			return;
		}
		ubadone(um);
		um->um_tab.b_actf->b_active = 0;
		um->um_tab.b_actf->b_actf = bp->b_forw;
		bp->b_active = 0;
		bp->b_errcnt = 0;
		bp->b_resid = 0;
		iodone(bp);
	}
	if (um->um_tab.b_actf->b_actf == 0) {
		sc->sc_iostate &= ~VAS_DMA;
		if (sc->sc_iostate&VAS_WANT) {
			sc->sc_iostate &= ~VAS_WANT;
			wakeup((caddr_t)&sc->sc_iostate);
		}
		return;
	}
	if (um->um_tab.b_actf->b_active == 0)
		vastart(um);
}

vaclose(dev)
	dev_t dev;
{
	register struct va_softc *sc = &va_softc[VAUNIT(dev)];
	register struct vadevice *vaaddr =
	    (struct vadevice *)vadinfo[VAUNIT(dev)]->ui_addr;

	sc->sc_openf = 0;
	sc->sc_state = 0;
	if (sc->sc_iostate != VAS_IDLE)
		wakeup((caddr_t)&sc->sc_iostate);
	sc->sc_iostate = VAS_IDLE;
	vaaddr->vacsl = 0;
	vaaddr->vawc = 0;
}

vareset(uban)
	int uban;
{
	register int va11;
	register struct uba_ctlr *um;
	register struct vadevice *vaaddr;
	register struct va_softc *sc;

	for (va11 = 0; va11 < NVA; va11++, sc++) {
		if ((um = vaminfo[va11]) == 0 || um->um_ubanum != uban ||
		    um->um_alive == 0)
			continue;
		sc = &va_softc[um->um_ctlr];
		if (sc->sc_openf == 0)
			continue;
		printf(" va%d", va11);
		vaaddr = (struct vadevice *)um->um_addr;
		vaaddr->vacsl = VA_IENABLE;
		if (sc->sc_state & VPLOT) {
			vaaddr->vacsh = VAPLOT;
			DELAY(10000);
			vaaddr->vacsh = VAAUTOSTEP;
		} else if (sc->sc_state & VPRINTPLOT)
			vaaddr->vacsh = VPRINTPLOT;
		else
			vaaddr->vacsh = VAPRINTPLOT;
		DELAY(10000);
		sc->sc_iostate = VAS_IDLE;
		um->um_tab.b_actf->b_active = 0;
		um->um_tab.b_actf->b_actf = um->um_tab.b_actf->b_actl = 0;
		if (um->um_ubinfo) {
			printf("<%d>", (um->um_ubinfo >> 28) & 0xf);
			um->um_ubinfo = 0;
		}
		(void) vastart(um);
	}
}

vaselect()
{

	return (1);
}
#endif
Commit	Line	Data
cfc05775	1	/* va.c 4.18 82/11/28 */
20cc8b5b	2
66b4fb09	3	#include "va.h"
a5cc519e BJ	4	#if NVA > 0
a5cc519e BJ	5	/*
fc4d0a69	6	* Varian printer plotter
a5cc519e	7	*/
20cc8b5b BJ	8	#include "../h/param.h"
	9	#include "../h/dir.h"
	10	#include "../h/user.h"
	11	#include "../h/buf.h"
	12	#include "../h/systm.h"
	13	#include "../h/map.h"
	14	#include "../h/pte.h"
20cc8b5b	15	#include "../h/vcmd.h"
515ce90f	16	#include "../h/uio.h"
20cc8b5b	17
697e6d05 KM	18	#include "../vaxuba/ubareg.h"
	19	#include "../vaxuba/ubavar.h"
	20
410d35e9	21	int vadebug = 0;
915905f4 KM	22	#define dprintf if(vadebug)printf
915905f4 KM	23
71357272	24	unsigned minvaph();
20cc8b5b BJ	25
	26	#define VAPRI (PZERO-1)
	27
fc4d0a69 BJ	28	struct vadevice {
	29	u_short vaba; /* buffer address */
	30	short vawc; /* word count (2's complement) */
20cc8b5b	31	union {
fc4d0a69 BJ	32	short Vacsw; /* control status as word */
fc4d0a69 BJ	33	struct { /* control status as bytes */
71357272 BJ	34	char Vacsl;
	35	char Vacsh;
	36	} vacsr;
	37	} vacs;
fc4d0a69	38	short vadata; /* programmed i/o data buffer */
20cc8b5b BJ	39	};
20cc8b5b BJ	40
71357272 BJ	41	#define vacsw vacs.Vacsw
	42	#define vacsh vacs.vacsr.Vacsh
	43	#define vacsl vacs.vacsr.Vacsl
	44
71357272	45	/* vacsw bits */
fc4d0a69 BJ	46	#define VA_ERROR 0100000 /* some error has occurred */
	47	#define VA_NPRTIMO 0001000 /* DMA timeout error */
	48	#define VA_NOTREADY 0000400 /* something besides NPRTIMO */
	49	#define VA_DONE 0000200
	50	#define VA_IENABLE 0000100 /* interrupt enable */
915905f4	51	#define VA_DMAGO 0000010 /* DMA go bit */
515ce90f	52	#define VA_DMAGO 0000010 /* DMA go bit */
fc4d0a69 BJ	53	#define VA_SUPPLIESLOW 0000004
	54	#define VA_BOTOFFORM 0000002
	55	#define VA_BYTEREVERSE 0000001 /* reverse byte order in words */
71357272 BJ	56
71357272 BJ	57	/* vacsh command bytes */
fc4d0a69 BJ	58	#define VAPLOT 0000340
	59	#define VAPRINT 0000100
	60	#define VAPRINTPLOT 0000160
	61	#define VAAUTOSTEP 0000244
	62	#define VANOAUTOSTEP 0000045
	63	#define VAFORMFEED 0000263
	64	#define VASLEW 0000265
	65	#define VASTEP 0000064
	66
	67	struct va_softc {
915905f4 KM	68	u_char sc_openf; /* exclusive open flag */
	69	u_char sc_iostate; /* kind of I/O going on */
	70	#define VAS_IDLE 0 /* no I/O, free */
	71	#define VAS_PIO 1 /* programmed I/O */
	72	#define VAS_DMA 2 /* DMA, block pio */
	73	#define VAS_WANT 4 /* wakeup when iostate changes */
	74	short sc_tocnt; /* time out counter */
	75	short sc_info; /* csw passed from vaintr */
	76	int sc_state; /* print/plot state of device */
fc4d0a69 BJ	77	} va_softc[NVA];
fc4d0a69 BJ	78
fc4d0a69 BJ	79	#define VAUNIT(dev) (minor(dev))
	80
	81	struct buf rvabuf[NVA];
	82
915905f4	83	int vaprobe(), vaslave(), vaattach(), vadgo();
fc4d0a69	84	struct uba_device *vadinfo[NVA];
915905f4	85	struct uba_ctlr *vaminfo[NVA];
410d35e9	86	struct buf vabhdr[NVA];
fc4d0a69 BJ	87	u_short vastd[] = { 0764000, 0 };
fc4d0a69 BJ	88	struct uba_driver vadriver =
915905f4	89	{ vaprobe, vaslave, vaattach, vadgo, vastd, "vz", vadinfo, "va", vaminfo };
fc4d0a69 BJ	90
	91	vaprobe(reg)
	92	caddr_t reg;
	93	{
	94	register int br, cvec; /* value-result */
	95	register struct vadevice vaaddr = (struct vadevice )reg;
	96
915905f4 KM	97	#ifdef lint
	98	br = 0; cvec = br; br = cvec;
	99	vaintr(0);
	100	#endif
877283f6	101	#ifndef UCBVAX
fc4d0a69 BJ	102	vaaddr->vacsl = VA_IENABLE;
	103	vaaddr->vaba = 0;
	104	vaaddr->vacsh = VAPLOT;
877283f6	105	vaaddr->vacsl = VA_IENABLE\|VA_DMAGO;
fc4d0a69	106	vaaddr->vawc = -1;
877283f6	107	DELAY(10000);
fc4d0a69	108	vaaddr->vacsl = 0;
877283f6 KM	109	vaaddr->vawc = 0;
	110	#else
	111	br=0x14;
	112	cvec=0170;
	113	#endif
2395b7ca	114	return (sizeof (struct vadevice));
fc4d0a69 BJ	115	}
fc4d0a69 BJ	116
915905f4 KM	117	/ARGSUSED/
	118	vaslave(ui, reg)
	119	struct uba_device *ui;
	120	caddr_t reg;
	121	{
	122
	123	ui->ui_dk = 0;
	124	return (ui->ui_unit <= 0);
	125	}
	126
fc4d0a69 BJ	127	/ARGSUSED/
	128	vaattach(ui)
	129	struct uba_device *ui;
	130	{
	131
410d35e9	132	ui->ui_mi->um_tab.b_actf = &vabhdr[ui->ui_unit];
fc4d0a69 BJ	133	}
	134
	135	vaopen(dev)
	136	dev_t dev;
20cc8b5b	137	{
fc4d0a69 BJ	138	register struct va_softc *sc;
	139	register struct vadevice *vaaddr;
	140	register struct uba_device *ui;
697e6d05	141	int error;
915905f4	142	int unit = VAUNIT(dev);
20cc8b5b	143
cfc05775 KM	144	if (unit >= NVA \|\| (sc = &va_softc[unit])->sc_openf \|\|
cfc05775 KM	145	(ui = vadinfo[unit]) == 0 \|\| ui->ui_alive == 0)
697e6d05	146	return (ENXIO);
fc4d0a69 BJ	147	vaaddr = (struct vadevice *)ui->ui_addr;
	148	sc->sc_openf = 1;
	149	vaaddr->vawc = 0;
fc4d0a69	150	sc->sc_state = 0;
877283f6	151	sc->sc_tocnt = 0;
915905f4	152	sc->sc_iostate = VAS_IDLE;
fc4d0a69 BJ	153	vaaddr->vacsl = VA_IENABLE;
fc4d0a69 BJ	154	vatimo(dev);
697e6d05 KM	155	error = vacmd(dev, VPRINT);
697e6d05 KM	156	if (error)
fc4d0a69	157	vaclose(dev);
697e6d05	158	return (error);
20cc8b5b BJ	159	}
	160
	161	vastrategy(bp)
	162	register struct buf *bp;
	163	{
915905f4 KM	164	register struct uba_device *ui;
	165	register struct uba_ctlr *um;
	166	int s;
	167
410d35e9	168	dprintf("vastrategy(%x)\n", bp);
915905f4 KM	169	ui = vadinfo[VAUNIT(bp->b_dev)];
	170	if (ui == 0 \|\| ui->ui_alive == 0) {
	171	bp->b_flags \|= B_ERROR;
	172	iodone(bp);
	173	return;
20cc8b5b	174	}
915905f4 KM	175	s = spl4();
915905f4 KM	176	um = ui->ui_mi;
410d35e9 KM	177	bp->b_actf = NULL;
	178	if (um->um_tab.b_actf->b_actf == NULL)
	179	um->um_tab.b_actf->b_actf = bp;
	180	else {
	181	printf("bp = 0x%x, um->um_tab.b_actf->b_actf = 0x%x\n",
	182	bp, um->um_tab.b_actf->b_actf);
	183	panic("vastrategy");
	184	um->um_tab.b_actf->b_actl->b_forw = bp;
	185	}
	186	um->um_tab.b_actf->b_actl = bp;
	187	bp = um->um_tab.b_actf;
	188	dprintf("vastrategy: bp=%x actf=%x active=%d\n",
	189	bp, bp->b_actf, bp->b_active);
915905f4 KM	190	if (bp->b_actf && bp->b_active == 0)
	191	(void) vastart(um);
	192	splx(s);
20cc8b5b BJ	193	}
	194
	195	int vablock = 16384;
	196
	197	unsigned
	198	minvaph(bp)
fc4d0a69	199	struct buf *bp;
20cc8b5b	200	{
fc4d0a69	201
20cc8b5b BJ	202	if (bp->b_bcount > vablock)
	203	bp->b_bcount = vablock;
	204	}
	205
	206	/ARGSUSED/
515ce90f	207	vawrite(dev, uio)
fc4d0a69	208	dev_t dev;
515ce90f	209	struct uio *uio;
20cc8b5b	210	{
915905f4	211
515ce90f	212	if (VAUNIT(dev) > NVA)
697e6d05 KM	213	return (ENXIO);
	214	return (physio(vastrategy, &rvabuf[VAUNIT(dev)], dev, B_WRITE,
	215	minvaph, uio));
20cc8b5b BJ	216	}
20cc8b5b BJ	217
915905f4 KM	218	vastart(um)
915905f4 KM	219	register struct uba_ctlr *um;
20cc8b5b	220	{
915905f4 KM	221	struct buf *bp;
	222	struct vadevice *vaaddr;
	223	register struct va_softc *sc;
	224	int unit;
20cc8b5b	225
410d35e9 KM	226	dprintf("vastart(%x), bp=%x\n", um, um->um_tab.b_actf->b_actf);
410d35e9 KM	227	if ((bp = um->um_tab.b_actf->b_actf) == NULL)
915905f4	228	return;
915905f4 KM	229	unit = VAUNIT(bp->b_dev);
915905f4 KM	230	sc = &va_softc[unit];
410d35e9	231	sc->sc_tocnt = 0;
915905f4 KM	232	while (sc->sc_iostate&VAS_PIO) {
	233	sc->sc_iostate \|= VAS_WANT;
	234	sleep((caddr_t)&sc->sc_iostate, VAPRI);
877283f6	235	}
915905f4 KM	236	sc->sc_iostate \|= VAS_DMA;
	237	vaaddr = (struct vadevice *)um->um_addr;
	238	vaaddr->vacsl = 0;
	239	vaaddr->vawc = -(bp->b_bcount / 2);
	240	um->um_cmd = VA_DMAGO \| VA_IENABLE;
	241	(void) ubago(vadinfo[unit]);
20cc8b5b BJ	242	}
20cc8b5b BJ	243
915905f4 KM	244	vadgo(um)
915905f4 KM	245	register struct uba_ctlr *um;
20cc8b5b	246	{
915905f4	247	register struct vadevice vaaddr = (struct vadevice )um->um_addr;
410d35e9	248	register struct buf *bp;
915905f4	249
410d35e9 KM	250	bp = um->um_tab.b_actf;
	251	va_softc[VAUNIT(bp->b_actf->b_dev)].sc_tocnt = 0;
	252	bp->b_active++;
915905f4 KM	253	vaaddr->vaba = um->um_ubinfo;
915905f4 KM	254	vaaddr->vacsl = ((um->um_ubinfo >> 12) & 0x30) \| um->um_cmd;
20cc8b5b BJ	255	}
	256
	257	/ARGSUSED/
515ce90f KM	258	vaioctl(dev, cmd, data, flag)
515ce90f KM	259	register caddr_t data;
20cc8b5b BJ	260	{
20cc8b5b BJ	261	register int vcmd;
fc4d0a69	262	register struct va_softc *sc = &va_softc[VAUNIT(dev)];
20cc8b5b BJ	263
	264	switch (cmd) {
	265
	266	case VGETSTATE:
515ce90f	267	(int )data = sc->sc_state;
697e6d05	268	break;
20cc8b5b BJ	269
20cc8b5b BJ	270	case VSETSTATE:
697e6d05 KM	271	return (vacmd(dev, (int )data));
697e6d05 KM	272	break;
20cc8b5b BJ	273
20cc8b5b BJ	274	default:
697e6d05	275	return (ENOTTY);
20cc8b5b	276	}
697e6d05	277	return (0);
20cc8b5b BJ	278	}
20cc8b5b BJ	279
fc4d0a69 BJ	280	vacmd(dev, vcmd)
	281	dev_t dev;
	282	int vcmd;
20cc8b5b	283	{
fc4d0a69	284	register struct va_softc *sc = &va_softc[VAUNIT(dev)];
915905f4	285	int s, cmd;
fc4d0a69	286
915905f4 KM	287	s = spl4();
	288	while (sc->sc_iostate&VAS_DMA) {
	289	sc->sc_iostate \|= VAS_WANT;
	290	sleep((caddr_t)&sc->sc_iostate, VAPRI);
	291	}
	292	sc->sc_iostate \|= VAS_PIO;
877283f6	293	sc->sc_tocnt = 0;
915905f4	294	cmd = 0;
20cc8b5b BJ	295	switch (vcmd) {
	296
	297	case VPLOT:
	298	/* Must turn on plot AND autostep modes. */
915905f4	299	if (vadopio(dev, VAPLOT))
697e6d05	300	error = EIO;
915905f4	301	cmd = VAAUTOSTEP;
20cc8b5b BJ	302	break;
	303
	304	case VPRINT:
915905f4	305	cmd = VAPRINT;
20cc8b5b BJ	306	break;
	307
	308	case VPRINTPLOT:
915905f4	309	cmd = VAPRINTPLOT;
20cc8b5b BJ	310	break;
20cc8b5b BJ	311	}
fc4d0a69	312	sc->sc_state = (sc->sc_state & ~(VPLOT\|VPRINT\|VPRINTPLOT)) \| vcmd;
915905f4	313	if (cmd && vadopio(dev, cmd))
697e6d05	314	error = EIO;
915905f4 KM	315	sc->sc_iostate &= ~VAS_PIO;
	316	if (sc->sc_iostate&VAS_WANT) {
	317	sc->sc_iostate &= ~VAS_WANT;
	318	wakeup((caddr_t)&sc->sc_iostate);
	319	}
	320	splx(s);
2395b7ca	321	return (error);
915905f4 KM	322	}
	323
	324	vadopio(dev, cmd)
	325	dev_t dev;
	326	int cmd;
	327	{
	328	register struct vadevice *vaaddr =
	329	(struct vadevice *)vaminfo[VAUNIT(dev)]->um_addr;
	330	register struct va_softc *sc = &va_softc[VAUNIT(dev)];
	331
	332	sc->sc_info = 0;
	333	vaaddr->vacsh = cmd;
	334	while ((sc->sc_info&(VA_DONE\|VA_ERROR)) == 0)
	335	sleep((caddr_t)&sc->sc_info, VAPRI);
	336	return (sc->sc_info&VA_ERROR);
20cc8b5b BJ	337	}
20cc8b5b BJ	338
fc4d0a69 BJ	339	vatimo(dev)
fc4d0a69 BJ	340	dev_t dev;
20cc8b5b	341	{
fc4d0a69 BJ	342	register struct va_softc *sc = &va_softc[VAUNIT(dev)];
	343
	344	if (sc->sc_openf)
877283f6	345	timeout(vatimo, (caddr_t)dev, hz/2);
915905f4 KM	346	if (++sc->sc_tocnt < 2)
	347	return;
	348	sc->sc_tocnt = 0;
410d35e9	349	dprintf("vatimo: calling vaintr\n");
915905f4	350	vaintr(dev);
20cc8b5b BJ	351	}
	352
	353	/ARGSUSED/
	354	vaintr(dev)
fc4d0a69	355	dev_t dev;
20cc8b5b	356	{
915905f4 KM	357	register struct uba_ctlr *um;
	358	struct vadevice *vaaddr;
	359	struct buf *bp;
	360	register int unit = VAUNIT(dev), e;
	361	register struct va_softc *sc = &va_softc[unit];
	362
	363	um = vaminfo[unit];
	364	vaaddr = (struct vadevice *)um->um_addr;
	365	e = vaaddr->vacsw;
410d35e9 KM	366	dprintf("vaintr: um=0x%x, e=0x%x, b_active %d\n",
410d35e9 KM	367	um, e, um->um_tab.b_actf->b_active);
915905f4 KM	368	if ((e&(VA_DONE\|VA_ERROR)) == 0)
	369	return;
	370	vaaddr->vacsl = 0;
	371	if ((e&VA_ERROR) && (e&VA_NPRTIMO))
	372	printf("va%d: npr timeout\n", unit);
	373	if (sc->sc_iostate&VAS_PIO) {
	374	sc->sc_info = e;
	375	wakeup((caddr_t)&sc->sc_info);
	376	return;
	377	}
410d35e9 KM	378	if (um->um_tab.b_actf->b_active) {
410d35e9 KM	379	bp = um->um_tab.b_actf->b_actf;
915905f4 KM	380	if (e&VA_ERROR)
	381	bp->b_flags \|= B_ERROR;
	382	if (sc->sc_state&VPRINTPLOT) {
	383	sc->sc_state = (sc->sc_state & ~VPRINTPLOT) \| VPLOT;
	384	vaaddr->vacsh = VAAUTOSTEP;
	385	return;
	386	}
410d35e9 KM	387	ubadone(um);
	388	um->um_tab.b_actf->b_active = 0;
	389	um->um_tab.b_actf->b_actf = bp->b_forw;
915905f4 KM	390	bp->b_active = 0;
	391	bp->b_errcnt = 0;
	392	bp->b_resid = 0;
	393	iodone(bp);
	394	}
410d35e9	395	if (um->um_tab.b_actf->b_actf == 0) {
915905f4 KM	396	sc->sc_iostate &= ~VAS_DMA;
	397	if (sc->sc_iostate&VAS_WANT) {
	398	sc->sc_iostate &= ~VAS_WANT;
	399	wakeup((caddr_t)&sc->sc_iostate);
	400	}
	401	return;
	402	}
410d35e9	403	if (um->um_tab.b_actf->b_active == 0)
915905f4	404	vastart(um);
20cc8b5b BJ	405	}
20cc8b5b BJ	406
fc4d0a69 BJ	407	vaclose(dev)
fc4d0a69 BJ	408	dev_t dev;
20cc8b5b	409	{
fc4d0a69 BJ	410	register struct va_softc *sc = &va_softc[VAUNIT(dev)];
	411	register struct vadevice *vaaddr =
	412	(struct vadevice *)vadinfo[VAUNIT(dev)]->ui_addr;
	413
	414	sc->sc_openf = 0;
fc4d0a69	415	sc->sc_state = 0;
915905f4 KM	416	if (sc->sc_iostate != VAS_IDLE)
	417	wakeup((caddr_t)&sc->sc_iostate);
	418	sc->sc_iostate = VAS_IDLE;
fc4d0a69	419	vaaddr->vacsl = 0;
877283f6	420	vaaddr->vawc = 0;
71357272 BJ	421	}
71357272 BJ	422
fc4d0a69 BJ	423	vareset(uban)
fc4d0a69 BJ	424	int uban;
71357272	425	{
fc4d0a69	426	register int va11;
915905f4	427	register struct uba_ctlr *um;
fc4d0a69	428	register struct vadevice *vaaddr;
915905f4	429	register struct va_softc *sc;
fc4d0a69 BJ	430
fc4d0a69 BJ	431	for (va11 = 0; va11 < NVA; va11++, sc++) {
915905f4 KM	432	if ((um = vaminfo[va11]) == 0 \|\| um->um_ubanum != uban \|\|
	433	um->um_alive == 0)
	434	continue;
	435	sc = &va_softc[um->um_ctlr];
	436	if (sc->sc_openf == 0)
fc4d0a69 BJ	437	continue;
fc4d0a69 BJ	438	printf(" va%d", va11);
915905f4	439	vaaddr = (struct vadevice *)um->um_addr;
fc4d0a69 BJ	440	vaaddr->vacsl = VA_IENABLE;
	441	if (sc->sc_state & VPLOT) {
	442	vaaddr->vacsh = VAPLOT;
	443	DELAY(10000);
	444	vaaddr->vacsh = VAAUTOSTEP;
	445	} else if (sc->sc_state & VPRINTPLOT)
	446	vaaddr->vacsh = VPRINTPLOT;
	447	else
	448	vaaddr->vacsh = VAPRINTPLOT;
71357272	449	DELAY(10000);
cfc05775 KM	450	sc->sc_iostate = VAS_IDLE;
	451	um->um_tab.b_actf->b_active = 0;
	452	um->um_tab.b_actf->b_actf = um->um_tab.b_actf->b_actl = 0;
	453	if (um->um_ubinfo) {
	454	printf("<%d>", (um->um_ubinfo >> 28) & 0xf);
	455	um->um_ubinfo = 0;
	456	}
915905f4	457	(void) vastart(um);
71357272	458	}
20cc8b5b	459	}
941b74fe SL	460
	461	vaselect()
	462	{
697e6d05	463
941b74fe SL	464	return (1);
941b74fe SL	465	}
a5cc519e	466	#endif